Commit | Line | Data |
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1da177e4 | 1 | /* |
54dfe5dd | 2 | * arch/s390/kernel/entry64.S |
1da177e4 LT |
3 | * S390 low-level entry points. |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/sys.h> | |
13 | #include <linux/linkage.h> | |
2bc89b5e | 14 | #include <linux/init.h> |
1da177e4 LT |
15 | #include <asm/cache.h> |
16 | #include <asm/lowcore.h> | |
17 | #include <asm/errno.h> | |
18 | #include <asm/ptrace.h> | |
19 | #include <asm/thread_info.h> | |
0013a854 | 20 | #include <asm/asm-offsets.h> |
1da177e4 LT |
21 | #include <asm/unistd.h> |
22 | #include <asm/page.h> | |
23 | ||
24 | /* | |
25 | * Stack layout for the system_call stack entry. | |
26 | * The first few entries are identical to the user_regs_struct. | |
27 | */ | |
25d83cbf HC |
28 | SP_PTREGS = STACK_FRAME_OVERHEAD |
29 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
30 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
31 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
32 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
33 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
34 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
35 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
36 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
37 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
38 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
39 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64 | |
40 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72 | |
41 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80 | |
42 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88 | |
43 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96 | |
44 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104 | |
45 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112 | |
46 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120 | |
47 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
48 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
59da2139 | 49 | SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR |
25d83cbf | 50 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE |
1da177e4 LT |
51 | |
52 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
53 | STACK_SIZE = 1 << STACK_SHIFT | |
54 | ||
753c4dd6 | 55 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 56 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) |
753c4dd6 | 57 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 58 | _TIF_MCCK_PENDING) |
1da177e4 LT |
59 | |
60 | #define BASED(name) name-system_call(%r13) | |
61 | ||
1f194a4c HC |
62 | #ifdef CONFIG_TRACE_IRQFLAGS |
63 | .macro TRACE_IRQS_ON | |
50bec4ce HC |
64 | basr %r2,%r0 |
65 | brasl %r14,trace_hardirqs_on_caller | |
1f194a4c HC |
66 | .endm |
67 | ||
68 | .macro TRACE_IRQS_OFF | |
50bec4ce HC |
69 | basr %r2,%r0 |
70 | brasl %r14,trace_hardirqs_off_caller | |
1f194a4c | 71 | .endm |
523b44cf | 72 | |
411788ea | 73 | .macro TRACE_IRQS_CHECK |
50bec4ce | 74 | basr %r2,%r0 |
411788ea HC |
75 | tm SP_PSW(%r15),0x03 # irqs enabled? |
76 | jz 0f | |
50bec4ce | 77 | brasl %r14,trace_hardirqs_on_caller |
411788ea | 78 | j 1f |
50bec4ce | 79 | 0: brasl %r14,trace_hardirqs_off_caller |
411788ea | 80 | 1: |
523b44cf | 81 | .endm |
1f194a4c HC |
82 | #else |
83 | #define TRACE_IRQS_ON | |
84 | #define TRACE_IRQS_OFF | |
411788ea HC |
85 | #define TRACE_IRQS_CHECK |
86 | #endif | |
87 | ||
88 | #ifdef CONFIG_LOCKDEP | |
89 | .macro LOCKDEP_SYS_EXIT | |
90 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
91 | jz 0f | |
92 | brasl %r14,lockdep_sys_exit | |
93 | 0: | |
94 | .endm | |
95 | #else | |
523b44cf | 96 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
97 | #endif |
98 | ||
25d83cbf | 99 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
100 | lg %r10,\lc_from |
101 | slg %r10,\lc_to | |
102 | alg %r10,\lc_sum | |
103 | stg %r10,\lc_sum | |
104 | .endm | |
1da177e4 LT |
105 | |
106 | /* | |
107 | * Register usage in interrupt handlers: | |
108 | * R9 - pointer to current task structure | |
109 | * R13 - pointer to literal pool | |
110 | * R14 - return register for function calls | |
111 | * R15 - kernel stack pointer | |
112 | */ | |
113 | ||
25d83cbf | 114 | .macro SAVE_ALL_BASE savearea |
1da177e4 LT |
115 | stmg %r12,%r15,\savearea |
116 | larl %r13,system_call | |
117 | .endm | |
118 | ||
987ad70a MS |
119 | .macro SAVE_ALL_SVC psworg,savearea |
120 | la %r12,\psworg | |
121 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
122 | .endm | |
123 | ||
63b12246 | 124 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 125 | la %r12,\psworg |
1da177e4 LT |
126 | tm \psworg+1,0x01 # test problem state bit |
127 | jz 2f # skip stack setup save | |
128 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
129 | #ifdef CONFIG_CHECK_STACK |
130 | j 3f | |
131 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
132 | jz stack_overflow | |
133 | 3: | |
134 | #endif | |
135 | 2: | |
136 | .endm | |
137 | ||
138 | .macro SAVE_ALL_ASYNC psworg,savearea | |
139 | la %r12,\psworg | |
1da177e4 LT |
140 | tm \psworg+1,0x01 # test problem state bit |
141 | jnz 1f # from user -> load kernel stack | |
142 | clc \psworg+8(8),BASED(.Lcritical_end) | |
143 | jhe 0f | |
144 | clc \psworg+8(8),BASED(.Lcritical_start) | |
145 | jl 0f | |
146 | brasl %r14,cleanup_critical | |
6add9f7f | 147 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
148 | jnz 1f |
149 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? | |
150 | slgr %r14,%r15 | |
151 | srag %r14,%r14,STACK_SHIFT | |
152 | jz 2f | |
153 | 1: lg %r15,__LC_ASYNC_STACK # load async stack | |
1da177e4 LT |
154 | #ifdef CONFIG_CHECK_STACK |
155 | j 3f | |
156 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
157 | jz stack_overflow | |
158 | 3: | |
159 | #endif | |
77fa2245 HC |
160 | 2: |
161 | .endm | |
162 | ||
163 | .macro CREATE_STACK_FRAME psworg,savearea | |
25d83cbf HC |
164 | aghi %r15,-SP_SIZE # make room for registers & psw |
165 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack | |
1da177e4 | 166 | stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 |
59da2139 | 167 | icm %r12,3,__LC_SVC_ILC |
1da177e4 | 168 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack |
59da2139 | 169 | st %r12,SP_SVCNR(%r15) |
1da177e4 LT |
170 | mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack |
171 | la %r12,0 | |
172 | stg %r12,__SF_BACKCHAIN(%r15) | |
25d83cbf | 173 | .endm |
1da177e4 | 174 | |
ae6aa2ea MS |
175 | .macro RESTORE_ALL psworg,sync |
176 | mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore | |
1da177e4 | 177 | .if !\sync |
ae6aa2ea | 178 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
179 | .endif |
180 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
c185b783 | 181 | stpt __LC_EXIT_TIMER |
ae6aa2ea | 182 | lpswe \psworg # back to caller |
1da177e4 LT |
183 | .endm |
184 | ||
185 | /* | |
186 | * Scheduler resume function, called by switch_to | |
187 | * gpr2 = (task_struct *) prev | |
188 | * gpr3 = (task_struct *) next | |
189 | * Returns: | |
190 | * gpr2 = prev | |
191 | */ | |
25d83cbf | 192 | .globl __switch_to |
1da177e4 LT |
193 | __switch_to: |
194 | tm __THREAD_per+4(%r3),0xe8 # is the new process using per ? | |
195 | jz __switch_to_noper # if not we're fine | |
25d83cbf HC |
196 | stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff |
197 | clc __THREAD_per(24,%r3),__SF_EMPTY(%r15) | |
198 | je __switch_to_noper # we got away without bashing TLB's | |
199 | lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
1da177e4 | 200 | __switch_to_noper: |
25d83cbf | 201 | lg %r4,__THREAD_info(%r2) # get thread_info of prev |
77fa2245 HC |
202 | tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending? |
203 | jz __switch_to_no_mcck | |
204 | ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
205 | lg %r4,__THREAD_info(%r3) # get thread_info of next | |
206 | oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next | |
207 | __switch_to_no_mcck: | |
25d83cbf | 208 | stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
1da177e4 LT |
209 | stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp |
210 | lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
25d83cbf | 211 | lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task |
1da177e4 LT |
212 | stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct |
213 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
25d83cbf | 214 | lg %r3,__THREAD_info(%r3) # load thread_info from task struct |
1da177e4 LT |
215 | stg %r3,__LC_THREAD_INFO |
216 | aghi %r3,STACK_SIZE | |
217 | stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
218 | br %r14 | |
219 | ||
220 | __critical_start: | |
221 | /* | |
222 | * SVC interrupt handler routine. System calls are synchronous events and | |
223 | * are executed with interrupts enabled. | |
224 | */ | |
225 | ||
25d83cbf | 226 | .globl system_call |
1da177e4 | 227 | system_call: |
c185b783 | 228 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 LT |
229 | sysc_saveall: |
230 | SAVE_ALL_BASE __LC_SAVE_AREA | |
987ad70a | 231 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
25d83cbf HC |
232 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
233 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore | |
1da177e4 | 234 | sysc_vtime: |
1da177e4 LT |
235 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
236 | sysc_stime: | |
237 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
238 | sysc_update: | |
239 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
240 | sysc_do_svc: |
241 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
59da2139 | 242 | ltgr %r7,%r7 # test for svc 0 |
1da177e4 LT |
243 | jnz sysc_nr_ok |
244 | # svc 0: system call number in %r1 | |
245 | cl %r1,BASED(.Lnr_syscalls) | |
246 | jnl sysc_nr_ok | |
25d83cbf | 247 | lgfr %r7,%r1 # clear high word in r1 |
1da177e4 LT |
248 | sysc_nr_ok: |
249 | mvc SP_ARGS(8,%r15),SP_R7(%r15) | |
250 | sysc_do_restart: | |
59da2139 MS |
251 | sth %r7,SP_SVCNR(%r15) |
252 | sllg %r7,%r7,2 # svc number * 4 | |
25d83cbf | 253 | larl %r10,sys_call_table |
347a8dc3 | 254 | #ifdef CONFIG_COMPAT |
c563077e HC |
255 | tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ? |
256 | jno sysc_noemu | |
25d83cbf | 257 | larl %r10,sys_call_table_emu # use 31 bit emulation system calls |
1da177e4 LT |
258 | sysc_noemu: |
259 | #endif | |
260 | tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
25d83cbf HC |
261 | lgf %r8,0(%r7,%r10) # load address of system call routine |
262 | jnz sysc_tracesys | |
263 | basr %r14,%r8 # call sys_xxxx | |
264 | stg %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
265 | |
266 | sysc_return: | |
1da177e4 | 267 | tm __TI_flags+7(%r9),_TIF_WORK_SVC |
25d83cbf | 268 | jnz sysc_work # there is work to do (signals etc.) |
411788ea HC |
269 | sysc_restore: |
270 | #ifdef CONFIG_TRACE_IRQFLAGS | |
271 | larl %r1,sysc_restore_trace_psw | |
272 | lpswe 0(%r1) | |
273 | sysc_restore_trace: | |
274 | TRACE_IRQS_CHECK | |
523b44cf | 275 | LOCKDEP_SYS_EXIT |
411788ea | 276 | #endif |
1da177e4 | 277 | sysc_leave: |
25d83cbf | 278 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
279 | sysc_done: |
280 | ||
281 | #ifdef CONFIG_TRACE_IRQFLAGS | |
282 | .align 8 | |
283 | .globl sysc_restore_trace_psw | |
284 | sysc_restore_trace_psw: | |
285 | .quad 0, sysc_restore_trace | |
286 | #endif | |
1da177e4 LT |
287 | |
288 | # | |
289 | # recheck if there is more work to do | |
290 | # | |
291 | sysc_work_loop: | |
292 | tm __TI_flags+7(%r9),_TIF_WORK_SVC | |
411788ea | 293 | jz sysc_restore # there is no work to do |
1da177e4 LT |
294 | # |
295 | # One of the work bits is on. Find out which one. | |
296 | # | |
297 | sysc_work: | |
2688905e MS |
298 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
299 | jno sysc_restore | |
77fa2245 HC |
300 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
301 | jo sysc_mcck_pending | |
1da177e4 LT |
302 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
303 | jo sysc_reschedule | |
02a029b3 | 304 | tm __TI_flags+7(%r9),_TIF_SIGPENDING |
54dfe5dd | 305 | jnz sysc_sigpending |
753c4dd6 MS |
306 | tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME |
307 | jnz sysc_notify_resume | |
1da177e4 LT |
308 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC |
309 | jo sysc_restart | |
310 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
311 | jo sysc_singlestep | |
411788ea HC |
312 | j sysc_restore |
313 | sysc_work_done: | |
1da177e4 LT |
314 | |
315 | # | |
316 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
317 | # |
318 | sysc_reschedule: | |
319 | larl %r14,sysc_work_loop | |
320 | jg schedule # return point is sysc_return | |
1da177e4 | 321 | |
77fa2245 HC |
322 | # |
323 | # _TIF_MCCK_PENDING is set, call handler | |
324 | # | |
325 | sysc_mcck_pending: | |
326 | larl %r14,sysc_work_loop | |
25d83cbf | 327 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 328 | |
1da177e4 | 329 | # |
02a029b3 | 330 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 331 | # |
25d83cbf | 332 | sysc_sigpending: |
1da177e4 | 333 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
25d83cbf HC |
334 | la %r2,SP_PTREGS(%r15) # load pt_regs |
335 | brasl %r14,do_signal # call do_signal | |
1da177e4 LT |
336 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC |
337 | jo sysc_restart | |
338 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
339 | jo sysc_singlestep | |
e1c3ad96 | 340 | j sysc_work_loop |
1da177e4 | 341 | |
753c4dd6 MS |
342 | # |
343 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
344 | # | |
345 | sysc_notify_resume: | |
346 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
347 | larl %r14,sysc_work_loop | |
348 | jg do_notify_resume # call do_notify_resume | |
349 | ||
1da177e4 LT |
350 | # |
351 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
352 | # | |
353 | sysc_restart: | |
354 | ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
25d83cbf | 355 | lg %r7,SP_R2(%r15) # load new svc number |
1da177e4 | 356 | mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument |
25d83cbf HC |
357 | lmg %r2,%r6,SP_R2(%r15) # load svc arguments |
358 | j sysc_do_restart # restart svc | |
1da177e4 LT |
359 | |
360 | # | |
361 | # _TIF_SINGLE_STEP is set, call do_single_step | |
362 | # | |
363 | sysc_singlestep: | |
59da2139 MS |
364 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
365 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number | |
1da177e4 LT |
366 | la %r2,SP_PTREGS(%r15) # address of register-save area |
367 | larl %r14,sysc_return # load adr. of system return | |
368 | jg do_single_step # branch to do_sigtrap | |
369 | ||
1da177e4 | 370 | # |
753c4dd6 MS |
371 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
372 | # and after the system call | |
1da177e4 LT |
373 | # |
374 | sysc_tracesys: | |
25d83cbf | 375 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
376 | la %r3,0 |
377 | srl %r7,2 | |
25d83cbf | 378 | stg %r7,SP_R2(%r15) |
753c4dd6 | 379 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 380 | lghi %r0,NR_syscalls |
753c4dd6 | 381 | clgr %r0,%r2 |
1da177e4 | 382 | jnh sysc_tracenogo |
59da2139 | 383 | sllg %r7,%r2,2 # svc number *4 |
1da177e4 LT |
384 | lgf %r8,0(%r7,%r10) |
385 | sysc_tracego: | |
25d83cbf HC |
386 | lmg %r3,%r6,SP_R3(%r15) |
387 | lg %r2,SP_ORIG_R2(%r15) | |
388 | basr %r14,%r8 # call sys_xxx | |
389 | stg %r2,SP_R2(%r15) # store return value | |
1da177e4 LT |
390 | sysc_tracenogo: |
391 | tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
25d83cbf HC |
392 | jz sysc_return |
393 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
25d83cbf | 394 | larl %r14,sysc_return # return point is sysc_return |
753c4dd6 | 395 | jg do_syscall_trace_exit |
1da177e4 LT |
396 | |
397 | # | |
398 | # a new process exits the kernel with ret_from_fork | |
399 | # | |
25d83cbf | 400 | .globl ret_from_fork |
1da177e4 LT |
401 | ret_from_fork: |
402 | lg %r13,__LC_SVC_NEW_PSW+8 | |
403 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
404 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
405 | jo 0f | |
406 | stg %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf | 407 | 0: brasl %r14,schedule_tail |
1f194a4c | 408 | TRACE_IRQS_ON |
25d83cbf | 409 | stosm 24(%r15),0x03 # reenable interrupts |
8f2961c3 | 410 | j sysc_tracenogo |
1da177e4 LT |
411 | |
412 | # | |
03ff9a23 MS |
413 | # kernel_execve function needs to deal with pt_regs that is not |
414 | # at the usual place | |
1da177e4 | 415 | # |
03ff9a23 MS |
416 | .globl kernel_execve |
417 | kernel_execve: | |
418 | stmg %r12,%r15,96(%r15) | |
419 | lgr %r14,%r15 | |
420 | aghi %r15,-SP_SIZE | |
421 | stg %r14,__SF_BACKCHAIN(%r15) | |
422 | la %r12,SP_PTREGS(%r15) | |
423 | xc 0(__PT_SIZE,%r12),0(%r12) | |
424 | lgr %r5,%r12 | |
425 | brasl %r14,do_execve | |
426 | ltgfr %r2,%r2 | |
427 | je 0f | |
428 | aghi %r15,SP_SIZE | |
429 | lmg %r12,%r15,96(%r15) | |
430 | br %r14 | |
431 | # execve succeeded. | |
432 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
433 | lg %r15,__LC_KERNEL_STACK # load ksp | |
434 | aghi %r15,-SP_SIZE # make room for registers & psw | |
435 | lg %r13,__LC_SVC_NEW_PSW+8 | |
436 | lg %r9,__LC_THREAD_INFO | |
437 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs | |
438 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
439 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
440 | brasl %r14,execve_tail | |
441 | j sysc_return | |
1da177e4 LT |
442 | |
443 | /* | |
444 | * Program check handler routine | |
445 | */ | |
446 | ||
25d83cbf | 447 | .globl pgm_check_handler |
1da177e4 LT |
448 | pgm_check_handler: |
449 | /* | |
450 | * First we need to check for a special case: | |
451 | * Single stepping an instruction that disables the PER event mask will | |
452 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
453 | * For a single stepped SVC the program check handler gets control after | |
454 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
455 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
456 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
457 | * if we have to load the kernel stack register. | |
458 | * For every other possible cause for PER event without the PER mask set | |
459 | * we just ignore the PER event (FIXME: is there anything we have to do | |
460 | * for LPSW?). | |
461 | */ | |
c185b783 | 462 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 | 463 | SAVE_ALL_BASE __LC_SAVE_AREA |
25d83cbf HC |
464 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
465 | jnz pgm_per # got per exception -> special case | |
63b12246 | 466 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 467 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
468 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
469 | jz pgm_no_vtime | |
470 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
471 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
472 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
473 | pgm_no_vtime: | |
1da177e4 | 474 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
9e74a6b8 | 475 | mvc SP_ARGS(8,%r15),__LC_LAST_BREAK |
411788ea | 476 | TRACE_IRQS_OFF |
25d83cbf | 477 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 LT |
478 | lghi %r8,0x7f |
479 | ngr %r8,%r3 | |
480 | pgm_do_call: | |
25d83cbf HC |
481 | sll %r8,3 |
482 | larl %r1,pgm_check_table | |
483 | lg %r1,0(%r8,%r1) # load address of handler routine | |
484 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
1da177e4 | 485 | larl %r14,sysc_return |
25d83cbf | 486 | br %r1 # branch to interrupt-handler |
1da177e4 LT |
487 | |
488 | # | |
489 | # handle per exception | |
490 | # | |
491 | pgm_per: | |
25d83cbf HC |
492 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
493 | jnz pgm_per_std # ok, normal per event from user space | |
1da177e4 | 494 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
495 | clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW |
496 | je pgm_svcper | |
1da177e4 LT |
497 | # no interesting special case, ignore PER event |
498 | lmg %r12,%r15,__LC_SAVE_AREA | |
25d83cbf | 499 | lpswe __LC_PGM_OLD_PSW |
1da177e4 LT |
500 | |
501 | # | |
502 | # Normal per exception | |
503 | # | |
504 | pgm_per_std: | |
63b12246 | 505 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 506 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
507 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
508 | jz pgm_no_vtime2 | |
509 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
510 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
511 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
512 | pgm_no_vtime2: | |
1da177e4 | 513 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
411788ea | 514 | TRACE_IRQS_OFF |
1da177e4 | 515 | lg %r1,__TI_task(%r9) |
4ba069b8 MG |
516 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
517 | jz kernel_per | |
1da177e4 LT |
518 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID |
519 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
520 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
521 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
25d83cbf | 522 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 | 523 | lghi %r8,0x7f |
25d83cbf | 524 | ngr %r8,%r3 # clear per-event-bit and ilc |
1da177e4 LT |
525 | je sysc_return |
526 | j pgm_do_call | |
527 | ||
528 | # | |
529 | # it was a single stepped SVC that is causing all the trouble | |
530 | # | |
531 | pgm_svcper: | |
63b12246 | 532 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 533 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
534 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
535 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
536 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
25d83cbf | 537 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore |
1da177e4 LT |
538 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
539 | lg %r1,__TI_task(%r9) | |
540 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
541 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
542 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
543 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
1f194a4c | 544 | TRACE_IRQS_ON |
1da177e4 LT |
545 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
546 | j sysc_do_svc | |
547 | ||
4ba069b8 MG |
548 | # |
549 | # per was called from kernel, must be kprobes | |
550 | # | |
551 | kernel_per: | |
59da2139 | 552 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number |
4ba069b8 | 553 | la %r2,SP_PTREGS(%r15) # address of register-save area |
411788ea | 554 | larl %r14,sysc_restore # load adr. of system ret, no work |
4ba069b8 MG |
555 | jg do_single_step # branch to do_single_step |
556 | ||
1da177e4 LT |
557 | /* |
558 | * IO interrupt handler routine | |
559 | */ | |
25d83cbf | 560 | .globl io_int_handler |
1da177e4 | 561 | io_int_handler: |
1da177e4 | 562 | stck __LC_INT_CLOCK |
9cfb9b3c | 563 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 564 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
63b12246 | 565 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 566 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
567 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
568 | jz io_no_vtime | |
569 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
570 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
571 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
572 | io_no_vtime: | |
1da177e4 | 573 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 574 | TRACE_IRQS_OFF |
25d83cbf HC |
575 | la %r2,SP_PTREGS(%r15) # address of register-save area |
576 | brasl %r14,do_IRQ # call standard irq handler | |
1da177e4 | 577 | io_return: |
1da177e4 | 578 | tm __TI_flags+7(%r9),_TIF_WORK_INT |
25d83cbf | 579 | jnz io_work # there is work to do (signals etc.) |
411788ea HC |
580 | io_restore: |
581 | #ifdef CONFIG_TRACE_IRQFLAGS | |
582 | larl %r1,io_restore_trace_psw | |
583 | lpswe 0(%r1) | |
584 | io_restore_trace: | |
585 | TRACE_IRQS_CHECK | |
523b44cf | 586 | LOCKDEP_SYS_EXIT |
411788ea | 587 | #endif |
1da177e4 | 588 | io_leave: |
25d83cbf | 589 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 590 | io_done: |
1da177e4 | 591 | |
411788ea HC |
592 | #ifdef CONFIG_TRACE_IRQFLAGS |
593 | .align 8 | |
594 | .globl io_restore_trace_psw | |
595 | io_restore_trace_psw: | |
596 | .quad 0, io_restore_trace | |
597 | #endif | |
598 | ||
2688905e | 599 | # |
0eaeafa1 CB |
600 | # There is work todo, we need to check if we return to userspace, then |
601 | # check, if we are in SIE, if yes leave it | |
2688905e MS |
602 | # |
603 | io_work: | |
604 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
605 | #ifndef CONFIG_PREEMPT | |
0eaeafa1 CB |
606 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) |
607 | jnz io_work_user # yes -> no need to check for SIE | |
608 | la %r1, BASED(sie_opcode) # we return to kernel here | |
609 | lg %r2, SP_PSW+8(%r15) | |
610 | clc 0(2,%r1), 0(%r2) # is current instruction = SIE? | |
611 | jne io_restore # no-> return to kernel | |
612 | lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE | |
613 | aghi %r1, 4 | |
614 | stg %r1, SP_PSW+8(%r15) | |
615 | j io_restore # return to kernel | |
616 | #else | |
2688905e | 617 | jno io_restore # no-> skip resched & signal |
0eaeafa1 | 618 | #endif |
2688905e MS |
619 | #else |
620 | jnz io_work_user # yes -> do resched & signal | |
0eaeafa1 CB |
621 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) |
622 | la %r1, BASED(sie_opcode) | |
623 | lg %r2, SP_PSW+8(%r15) | |
624 | clc 0(2,%r1), 0(%r2) # is current instruction = SIE? | |
625 | jne 0f # no -> leave PSW alone | |
626 | lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE | |
627 | aghi %r1, 4 | |
628 | stg %r1, SP_PSW+8(%r15) | |
629 | 0: | |
630 | #endif | |
2688905e | 631 | # check for preemptive scheduling |
25d83cbf | 632 | icm %r0,15,__TI_precount(%r9) |
2688905e | 633 | jnz io_restore # preemption is disabled |
1da177e4 LT |
634 | # switch to kernel stack |
635 | lg %r1,SP_R15(%r15) | |
636 | aghi %r1,-SP_SIZE | |
637 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 638 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
639 | lgr %r15,%r1 |
640 | io_resume_loop: | |
641 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED | |
411788ea | 642 | jno io_restore |
b8e7a54c HC |
643 | larl %r14,io_resume_loop |
644 | jg preempt_schedule_irq | |
1da177e4 LT |
645 | #endif |
646 | ||
2688905e | 647 | io_work_user: |
1da177e4 LT |
648 | lg %r1,__LC_KERNEL_STACK |
649 | aghi %r1,-SP_SIZE | |
650 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 651 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
652 | lgr %r15,%r1 |
653 | # | |
654 | # One of the work bits is on. Find out which one. | |
54dfe5dd HC |
655 | # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED |
656 | # and _TIF_MCCK_PENDING | |
1da177e4 LT |
657 | # |
658 | io_work_loop: | |
77fa2245 HC |
659 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
660 | jo io_mcck_pending | |
1da177e4 LT |
661 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
662 | jo io_reschedule | |
02a029b3 | 663 | tm __TI_flags+7(%r9),_TIF_SIGPENDING |
54dfe5dd | 664 | jnz io_sigpending |
753c4dd6 MS |
665 | tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME |
666 | jnz io_notify_resume | |
411788ea HC |
667 | j io_restore |
668 | io_work_done: | |
1da177e4 | 669 | |
0eaeafa1 CB |
670 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) |
671 | sie_opcode: | |
672 | .long 0xb2140000 | |
673 | #endif | |
674 | ||
77fa2245 HC |
675 | # |
676 | # _TIF_MCCK_PENDING is set, call handler | |
677 | # | |
678 | io_mcck_pending: | |
b771aeac | 679 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
b771aeac | 680 | j io_work_loop |
77fa2245 | 681 | |
1da177e4 LT |
682 | # |
683 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
684 | # |
685 | io_reschedule: | |
411788ea | 686 | TRACE_IRQS_ON |
25d83cbf HC |
687 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
688 | brasl %r14,schedule # call scheduler | |
689 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 690 | TRACE_IRQS_OFF |
1da177e4 | 691 | tm __TI_flags+7(%r9),_TIF_WORK_INT |
411788ea | 692 | jz io_restore # there is no work to do |
1da177e4 LT |
693 | j io_work_loop |
694 | ||
695 | # | |
02a029b3 | 696 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 697 | # |
25d83cbf | 698 | io_sigpending: |
411788ea | 699 | TRACE_IRQS_ON |
25d83cbf HC |
700 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
701 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 | 702 | brasl %r14,do_signal # call do_signal |
25d83cbf | 703 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts |
411788ea | 704 | TRACE_IRQS_OFF |
e1c3ad96 | 705 | j io_work_loop |
1da177e4 | 706 | |
753c4dd6 MS |
707 | # |
708 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
709 | # | |
710 | io_notify_resume: | |
711 | TRACE_IRQS_ON | |
712 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
713 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
714 | brasl %r14,do_notify_resume # call do_notify_resume | |
715 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
716 | TRACE_IRQS_OFF | |
717 | j io_work_loop | |
718 | ||
1da177e4 LT |
719 | /* |
720 | * External interrupt handler routine | |
721 | */ | |
25d83cbf | 722 | .globl ext_int_handler |
1da177e4 | 723 | ext_int_handler: |
1da177e4 | 724 | stck __LC_INT_CLOCK |
9cfb9b3c | 725 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 726 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
63b12246 | 727 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 728 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
729 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
730 | jz ext_no_vtime | |
731 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
732 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
733 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
734 | ext_no_vtime: | |
1da177e4 | 735 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 736 | TRACE_IRQS_OFF |
25d83cbf HC |
737 | la %r2,SP_PTREGS(%r15) # address of register-save area |
738 | llgh %r3,__LC_EXT_INT_CODE # get interruption code | |
739 | brasl %r14,do_extint | |
1da177e4 LT |
740 | j io_return |
741 | ||
ae6aa2ea MS |
742 | __critical_end: |
743 | ||
1da177e4 LT |
744 | /* |
745 | * Machine check handler routines | |
746 | */ | |
25d83cbf | 747 | .globl mcck_int_handler |
1da177e4 | 748 | mcck_int_handler: |
9cfb9b3c | 749 | stck __LC_INT_CLOCK |
77fa2245 HC |
750 | la %r1,4095 # revalidate r1 |
751 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 752 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
1da177e4 | 753 | SAVE_ALL_BASE __LC_SAVE_AREA+64 |
77fa2245 | 754 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 755 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 756 | jo mcck_int_main # yes -> rest of mcck code invalid |
63b12246 MS |
757 | la %r14,4095 |
758 | mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER | |
759 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) | |
760 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
761 | jo 1f | |
762 | la %r14,__LC_SYNC_ENTER_TIMER | |
763 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
764 | jl 0f | |
765 | la %r14,__LC_ASYNC_ENTER_TIMER | |
766 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
767 | jl 0f | |
768 | la %r14,__LC_EXIT_TIMER | |
769 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
770 | jl 0f | |
771 | la %r14,__LC_LAST_UPDATE_TIMER | |
772 | 0: spt 0(%r14) | |
773 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | |
c185b783 | 774 | 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 | 775 | jno mcck_int_main # no -> skip cleanup critical |
25d83cbf | 776 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit |
77fa2245 HC |
777 | jnz mcck_int_main # from user -> load kernel stack |
778 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end) | |
779 | jhe mcck_int_main | |
25d83cbf | 780 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start) |
77fa2245 | 781 | jl mcck_int_main |
25d83cbf | 782 | brasl %r14,cleanup_critical |
77fa2245 | 783 | mcck_int_main: |
25d83cbf | 784 | lg %r14,__LC_PANIC_STACK # are we already on the panic stack? |
77fa2245 HC |
785 | slgr %r14,%r15 |
786 | srag %r14,%r14,PAGE_SHIFT | |
787 | jz 0f | |
25d83cbf | 788 | lg %r15,__LC_PANIC_STACK # load panic stack |
77fa2245 | 789 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 |
ae6aa2ea MS |
790 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
791 | jno mcck_no_vtime # no -> no timer update | |
63b12246 | 792 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea MS |
793 | jz mcck_no_vtime |
794 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
795 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
796 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
797 | mcck_no_vtime: | |
77fa2245 HC |
798 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
799 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
800 | brasl %r14,s390_do_machine_check | |
25d83cbf | 801 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
77fa2245 HC |
802 | jno mcck_return |
803 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack | |
804 | aghi %r1,-SP_SIZE | |
805 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
806 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
807 | lgr %r15,%r1 | |
808 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
809 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING | |
810 | jno mcck_return | |
1f194a4c | 811 | TRACE_IRQS_OFF |
77fa2245 | 812 | brasl %r14,s390_handle_mcck |
1f194a4c | 813 | TRACE_IRQS_ON |
1da177e4 | 814 | mcck_return: |
63b12246 MS |
815 | mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW |
816 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
817 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
63b12246 MS |
818 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104 |
819 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | |
820 | jno 0f | |
821 | stpt __LC_EXIT_TIMER | |
c185b783 | 822 | 0: lpswe __LC_RETURN_MCCK_PSW # back to caller |
1da177e4 | 823 | |
1da177e4 LT |
824 | /* |
825 | * Restart interruption handler, kick starter for additional CPUs | |
826 | */ | |
84b36a8e | 827 | #ifdef CONFIG_SMP |
2bc89b5e | 828 | __CPUINIT |
25d83cbf | 829 | .globl restart_int_handler |
1da177e4 | 830 | restart_int_handler: |
25d83cbf HC |
831 | lg %r15,__LC_SAVE_AREA+120 # load ksp |
832 | lghi %r10,__LC_CREGS_SAVE_AREA | |
833 | lctlg %c0,%c15,0(%r10) # get new ctl regs | |
834 | lghi %r10,__LC_AREGS_SAVE_AREA | |
835 | lam %a0,%a15,0(%r10) | |
836 | lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
837 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on | |
838 | jg start_secondary | |
84b36a8e | 839 | .previous |
1da177e4 LT |
840 | #else |
841 | /* | |
842 | * If we do not run with SMP enabled, let the new CPU crash ... | |
843 | */ | |
25d83cbf | 844 | .globl restart_int_handler |
1da177e4 | 845 | restart_int_handler: |
25d83cbf | 846 | basr %r1,0 |
1da177e4 | 847 | restart_base: |
25d83cbf HC |
848 | lpswe restart_crash-restart_base(%r1) |
849 | .align 8 | |
1da177e4 | 850 | restart_crash: |
25d83cbf | 851 | .long 0x000a0000,0x00000000,0x00000000,0x00000000 |
1da177e4 LT |
852 | restart_go: |
853 | #endif | |
854 | ||
855 | #ifdef CONFIG_CHECK_STACK | |
856 | /* | |
857 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
858 | * No need to properly save the registers, we are going to panic anyway. | |
859 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
860 | */ | |
861 | stack_overflow: | |
862 | lg %r15,__LC_PANIC_STACK # change to panic stack | |
9514e231 | 863 | aghi %r15,-SP_SIZE |
1da177e4 LT |
864 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack |
865 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
866 | la %r1,__LC_SAVE_AREA | |
867 | chi %r12,__LC_SVC_OLD_PSW | |
868 | je 0f | |
869 | chi %r12,__LC_PGM_OLD_PSW | |
870 | je 0f | |
9514e231 | 871 | la %r1,__LC_SAVE_AREA+32 |
25d83cbf | 872 | 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack |
9e74a6b8 | 873 | mvc SP_ARGS(8,%r15),__LC_LAST_BREAK |
25d83cbf HC |
874 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
875 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
876 | jg kernel_stack_overflow |
877 | #endif | |
878 | ||
879 | cleanup_table_system_call: | |
880 | .quad system_call, sysc_do_svc | |
881 | cleanup_table_sysc_return: | |
882 | .quad sysc_return, sysc_leave | |
883 | cleanup_table_sysc_leave: | |
411788ea | 884 | .quad sysc_leave, sysc_done |
1da177e4 | 885 | cleanup_table_sysc_work_loop: |
411788ea | 886 | .quad sysc_work_loop, sysc_work_done |
63b12246 MS |
887 | cleanup_table_io_return: |
888 | .quad io_return, io_leave | |
ae6aa2ea MS |
889 | cleanup_table_io_leave: |
890 | .quad io_leave, io_done | |
891 | cleanup_table_io_work_loop: | |
411788ea | 892 | .quad io_work_loop, io_work_done |
1da177e4 LT |
893 | |
894 | cleanup_critical: | |
895 | clc 8(8,%r12),BASED(cleanup_table_system_call) | |
896 | jl 0f | |
897 | clc 8(8,%r12),BASED(cleanup_table_system_call+8) | |
898 | jl cleanup_system_call | |
899 | 0: | |
900 | clc 8(8,%r12),BASED(cleanup_table_sysc_return) | |
901 | jl 0f | |
902 | clc 8(8,%r12),BASED(cleanup_table_sysc_return+8) | |
903 | jl cleanup_sysc_return | |
904 | 0: | |
905 | clc 8(8,%r12),BASED(cleanup_table_sysc_leave) | |
906 | jl 0f | |
907 | clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8) | |
908 | jl cleanup_sysc_leave | |
909 | 0: | |
910 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop) | |
911 | jl 0f | |
912 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) | |
77fa2245 | 913 | jl cleanup_sysc_return |
63b12246 MS |
914 | 0: |
915 | clc 8(8,%r12),BASED(cleanup_table_io_return) | |
916 | jl 0f | |
917 | clc 8(8,%r12),BASED(cleanup_table_io_return+8) | |
918 | jl cleanup_io_return | |
ae6aa2ea MS |
919 | 0: |
920 | clc 8(8,%r12),BASED(cleanup_table_io_leave) | |
921 | jl 0f | |
922 | clc 8(8,%r12),BASED(cleanup_table_io_leave+8) | |
923 | jl cleanup_io_leave | |
924 | 0: | |
925 | clc 8(8,%r12),BASED(cleanup_table_io_work_loop) | |
926 | jl 0f | |
927 | clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8) | |
928 | jl cleanup_io_return | |
1da177e4 LT |
929 | 0: |
930 | br %r14 | |
931 | ||
932 | cleanup_system_call: | |
933 | mvc __LC_RETURN_PSW(16),0(%r12) | |
ae6aa2ea MS |
934 | cghi %r12,__LC_MCK_OLD_PSW |
935 | je 0f | |
936 | la %r12,__LC_SAVE_AREA+32 | |
937 | j 1f | |
938 | 0: la %r12,__LC_SAVE_AREA+64 | |
939 | 1: | |
1da177e4 LT |
940 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) |
941 | jh 0f | |
942 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
943 | 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) | |
944 | jhe cleanup_vtime | |
1da177e4 LT |
945 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) |
946 | jh 0f | |
ae6aa2ea MS |
947 | mvc __LC_SAVE_AREA(32),0(%r12) |
948 | 0: stg %r13,8(%r12) | |
949 | stg %r12,__LC_SAVE_AREA+96 # argh | |
63b12246 | 950 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 951 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
952 | lg %r12,__LC_SAVE_AREA+96 # argh |
953 | stg %r15,24(%r12) | |
1da177e4 | 954 | llgh %r7,__LC_SVC_INT_CODE |
1da177e4 LT |
955 | cleanup_vtime: |
956 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) | |
957 | jhe cleanup_stime | |
1da177e4 LT |
958 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
959 | cleanup_stime: | |
960 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32) | |
961 | jh cleanup_update | |
962 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
963 | cleanup_update: | |
964 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
965 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) |
966 | la %r12,__LC_RETURN_PSW | |
967 | br %r14 | |
968 | cleanup_system_call_insn: | |
969 | .quad sysc_saveall | |
25d83cbf HC |
970 | .quad system_call |
971 | .quad sysc_vtime | |
972 | .quad sysc_stime | |
973 | .quad sysc_update | |
1da177e4 LT |
974 | |
975 | cleanup_sysc_return: | |
976 | mvc __LC_RETURN_PSW(8),0(%r12) | |
977 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return) | |
978 | la %r12,__LC_RETURN_PSW | |
979 | br %r14 | |
980 | ||
981 | cleanup_sysc_leave: | |
982 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) | |
ae6aa2ea | 983 | je 2f |
1da177e4 LT |
984 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
985 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) | |
ae6aa2ea | 986 | je 2f |
1da177e4 | 987 | mvc __LC_RETURN_PSW(16),SP_PSW(%r15) |
ae6aa2ea MS |
988 | cghi %r12,__LC_MCK_OLD_PSW |
989 | jne 0f | |
990 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) | |
991 | j 1f | |
992 | 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | |
993 | 1: lmg %r0,%r11,SP_R0(%r15) | |
1da177e4 | 994 | lg %r15,SP_R15(%r15) |
ae6aa2ea | 995 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
996 | br %r14 |
997 | cleanup_sysc_leave_insn: | |
411788ea | 998 | .quad sysc_done - 4 |
411788ea | 999 | .quad sysc_done - 8 |
1da177e4 | 1000 | |
ae6aa2ea MS |
1001 | cleanup_io_return: |
1002 | mvc __LC_RETURN_PSW(8),0(%r12) | |
1003 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop) | |
1004 | la %r12,__LC_RETURN_PSW | |
1005 | br %r14 | |
1006 | ||
1007 | cleanup_io_leave: | |
1008 | clc 8(8,%r12),BASED(cleanup_io_leave_insn) | |
1009 | je 2f | |
ae6aa2ea MS |
1010 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
1011 | clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) | |
1012 | je 2f | |
ae6aa2ea MS |
1013 | mvc __LC_RETURN_PSW(16),SP_PSW(%r15) |
1014 | cghi %r12,__LC_MCK_OLD_PSW | |
1015 | jne 0f | |
1016 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) | |
1017 | j 1f | |
1018 | 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | |
1019 | 1: lmg %r0,%r11,SP_R0(%r15) | |
1020 | lg %r15,SP_R15(%r15) | |
1021 | 2: la %r12,__LC_RETURN_PSW | |
1022 | br %r14 | |
1023 | cleanup_io_leave_insn: | |
411788ea | 1024 | .quad io_done - 4 |
411788ea | 1025 | .quad io_done - 8 |
ae6aa2ea | 1026 | |
1da177e4 LT |
1027 | /* |
1028 | * Integer constants | |
1029 | */ | |
25d83cbf | 1030 | .align 4 |
1da177e4 | 1031 | .Lconst: |
25d83cbf HC |
1032 | .Lnr_syscalls: .long NR_syscalls |
1033 | .L0x0130: .short 0x130 | |
1034 | .L0x0140: .short 0x140 | |
1035 | .L0x0150: .short 0x150 | |
1036 | .L0x0160: .short 0x160 | |
1037 | .L0x0170: .short 0x170 | |
1da177e4 | 1038 | .Lcritical_start: |
25d83cbf | 1039 | .quad __critical_start |
1da177e4 | 1040 | .Lcritical_end: |
25d83cbf | 1041 | .quad __critical_end |
1da177e4 | 1042 | |
25d83cbf | 1043 | .section .rodata, "a" |
1da177e4 | 1044 | #define SYSCALL(esa,esame,emu) .long esame |
1da177e4 LT |
1045 | sys_call_table: |
1046 | #include "syscalls.S" | |
1047 | #undef SYSCALL | |
1048 | ||
347a8dc3 | 1049 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
1050 | |
1051 | #define SYSCALL(esa,esame,emu) .long emu | |
1da177e4 LT |
1052 | sys_call_table_emu: |
1053 | #include "syscalls.S" | |
1054 | #undef SYSCALL | |
1055 | #endif |