projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0ad775db HC |
1 | /* |
| 2 | * arch/s390/kernel/head31.S | |
| 3 | * | |
| 1844c9bc | 4 | * Copyright (C) IBM Corp. 2005,2010 |
| 0ad775db HC |
5 | * |
| 6 | * Author(s): Hartmut Penner <hp@de.ibm.com> | |
| 7 | * Martin Schwidefsky <schwidefsky@de.ibm.com> | |
| 8 | * Rob van der Heij <rvdhei@iae.nl> | |
| 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> | |
| 10 | * | |
| 11 | */ | |
| 12 | ||
| 1844c9bc | 13 | #include <linux/init.h> |
| 144d634a | 14 | #include <linux/linkage.h> |
| 1844c9bc MS |
15 | #include <asm/asm-offsets.h> |
| 16 | #include <asm/thread_info.h> | |
| 17 | #include <asm/page.h> | |
| b1b70306 | 18 | |
| 1844c9bc | 19 | __HEAD |
| 144d634a | 20 | ENTRY(startup_continue) |
| b1b70306 | 21 | basr %r13,0 # get base |
| e37f50e1 MS |
22 | .LPG1: |
| 23 | ||
| 1844c9bc MS |
24 | l %r1,.Lbase_cc-.LPG1(%r13) |
| 25 | mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK | |
| 0ad775db | 26 | lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers |
| b1b70306 HC |
27 | l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area |
| 28 | # move IPL device to lowcore | |
| e87bfe51 HC |
29 | # |
| 30 | # Setup stack | |
| 31 | # | |
| 32 | l %r15,.Linittu-.LPG1(%r13) | |
| 0c88ee5b | 33 | st %r15,__LC_THREAD_INFO # cache thread info in lowcore |
| e87bfe51 HC |
34 | mvc __LC_CURRENT(4),__TI_task(%r15) |
| 35 | ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE | |
| 36 | st %r15,__LC_KERNEL_STACK # set end of kernel stack | |
| 37 | ahi %r15,-96 | |
| 0ad775db | 38 | # |
| fe355b7f HY |
39 | # Save ipl parameters, clear bss memory, initialize storage key for kernel pages, |
| 40 | # and create a kernel NSS if the SAVESYS= parm is defined | |
| 0ad775db | 41 | # |
| fe355b7f HY |
42 | l %r14,.Lstartup_init-.LPG1(%r13) |
| 43 | basr %r14,%r14 | |
| 0ad775db HC |
44 | lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space, |
| 45 | # virtual and never return ... | |
| 46 | .align 8 | |
| 47 | .Lentry:.long 0x00080000,0x80000000 + _stext | |
| 5beab991 | 48 | .Lctl: .long 0x04b50000 # cr0: various things |
| 0ad775db HC |
49 | .long 0 # cr1: primary space segment table |
| 50 | .long .Lduct # cr2: dispatchable unit control table | |
| 51 | .long 0 # cr3: instruction authorization | |
| 52 | .long 0 # cr4: instruction authorization | |
| 482b05dd | 53 | .long .Lduct # cr5: primary-aste origin |
| 0ad775db HC |
54 | .long 0 # cr6: I/O interrupts |
| 55 | .long 0 # cr7: secondary space segment table | |
| 56 | .long 0 # cr8: access registers translation | |
| 57 | .long 0 # cr9: tracing off | |
| 58 | .long 0 # cr10: tracing off | |
| 59 | .long 0 # cr11: tracing off | |
| 60 | .long 0 # cr12: tracing off | |
| 61 | .long 0 # cr13: home space segment table | |
| 62 | .long 0xc0000000 # cr14: machine check handling off | |
| 63 | .long 0 # cr15: linkage stack operations | |
| 0ad775db | 64 | .Lmchunk:.long memory_chunk |
| 0ad775db HC |
65 | .Lbss_bgn: .long __bss_start |
| 66 | .Lbss_end: .long _end | |
| b1b70306 | 67 | .Lparmaddr: .long PARMAREA |
| ab14de6c HC |
68 | .Linittu: .long init_thread_union |
| 69 | .Lstartup_init: | |
| 70 | .long startup_init | |
| 482b05dd GS |
71 | .align 64 |
| 72 | .Lduct: .long 0,0,0,0,.Lduald,0,0,0 | |
| 73 | .long 0,0,0,0,0,0,0,0 | |
| 74 | .align 128 | |
| 75 | .Lduald:.rept 8 | |
| 76 | .long 0x80000000,0,0,0 # invalid access-list entries | |
| 77 | .endr | |
| 1844c9bc MS |
78 | .Lbase_cc: |
| 79 | .long sched_clock_base_cc | |
| e87bfe51 | 80 | |
| 144d634a | 81 | ENTRY(_ehead) |
| 1844c9bc | 82 | |
| 0ad775db | 83 | #ifdef CONFIG_SHARED_KERNEL |
| 57d84906 | 84 | .org 0x100000 - 0x11000 # head.o ends at 0x11000 |
| 0ad775db HC |
85 | #endif |
| 86 | ||
| 87 | # | |
| b1b70306 | 88 | # startup-code, running in absolute addressing mode |
| 0ad775db | 89 | # |
| 144d634a JG |
90 | ENTRY(_stext) |
| 91 | basr %r13,0 # get base | |
| 0ad775db | 92 | .LPG3: |
| 0ad775db HC |
93 | # check control registers |
| 94 | stctl %c0,%c15,0(%r15) | |
| d98e19cc | 95 | oi 2(%r15),0x60 # enable sigp emergency & external call |
| 0ad775db HC |
96 | oi 0(%r15),0x10 # switch on low address protection |
| 97 | lctl %c0,%c15,0(%r15) | |
| 98 | ||
| 99 | # | |
| 100 | lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess | |
| 101 | l %r14,.Lstart-.LPG3(%r13) | |
| 102 | basr %r14,%r14 # call start_kernel | |
| 103 | # | |
| 104 | # We returned from start_kernel ?!? PANIK | |
| 105 | # | |
| 106 | basr %r13,0 | |
| 107 | lpsw .Ldw-.(%r13) # load disabled wait psw | |
| 108 | # | |
| 109 | .align 8 | |
| 110 | .Ldw: .long 0x000a0000,0x00000000 | |
| 0ad775db HC |
111 | .Lstart:.long start_kernel |
| 112 | .Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 |