Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
f5daba1d | 2 | * Machine check handler |
1da177e4 | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 2000, 2009 |
f5daba1d HC |
5 | * Author(s): Ingo Adlung <adlung@de.ibm.com>, |
6 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | |
7 | * Cornelia Huck <cornelia.huck@de.ibm.com>, | |
8 | * Heiko Carstens <heiko.carstens@de.ibm.com>, | |
1da177e4 LT |
9 | */ |
10 | ||
052ff461 | 11 | #include <linux/kernel_stat.h> |
1da177e4 | 12 | #include <linux/init.h> |
1da177e4 | 13 | #include <linux/errno.h> |
81f64b87 | 14 | #include <linux/hardirq.h> |
022e4fc0 | 15 | #include <linux/time.h> |
f5daba1d | 16 | #include <linux/module.h> |
1da177e4 | 17 | #include <asm/lowcore.h> |
f5daba1d | 18 | #include <asm/smp.h> |
fd5ada04 | 19 | #include <asm/stp.h> |
76d4e00a | 20 | #include <asm/cputime.h> |
f5daba1d HC |
21 | #include <asm/nmi.h> |
22 | #include <asm/crw.h> | |
80703617 | 23 | #include <asm/switch_to.h> |
cad49cfc | 24 | #include <asm/ctl_reg.h> |
1da177e4 | 25 | |
77fa2245 | 26 | struct mcck_struct { |
36324963 HC |
27 | unsigned int kill_task : 1; |
28 | unsigned int channel_report : 1; | |
29 | unsigned int warning : 1; | |
29b0a825 | 30 | unsigned int stp_queue : 1; |
dc6e1555 | 31 | unsigned long mcck_code; |
77fa2245 HC |
32 | }; |
33 | ||
34 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
35 | ||
3d68286a | 36 | static void s390_handle_damage(void) |
f5daba1d HC |
37 | { |
38 | smp_send_stop(); | |
39 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
40 | while (1); | |
41 | } | |
42 | ||
1da177e4 | 43 | /* |
77fa2245 HC |
44 | * Main machine check handler function. Will be called with interrupts enabled |
45 | * or disabled and machine checks enabled or disabled. | |
1da177e4 | 46 | */ |
f5daba1d | 47 | void s390_handle_mcck(void) |
1da177e4 | 48 | { |
77fa2245 HC |
49 | unsigned long flags; |
50 | struct mcck_struct mcck; | |
1da177e4 | 51 | |
77fa2245 HC |
52 | /* |
53 | * Disable machine checks and get the current state of accumulated | |
54 | * machine checks. Afterwards delete the old state and enable machine | |
55 | * checks again. | |
56 | */ | |
57 | local_irq_save(flags); | |
58 | local_mcck_disable(); | |
2cb4a182 SO |
59 | mcck = *this_cpu_ptr(&cpu_mcck); |
60 | memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck)); | |
d3a73acb | 61 | clear_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 HC |
62 | local_mcck_enable(); |
63 | local_irq_restore(flags); | |
1da177e4 | 64 | |
77fa2245 | 65 | if (mcck.channel_report) |
f5daba1d | 66 | crw_handle_channel_report(); |
7b886416 HC |
67 | /* |
68 | * A warning may remain for a prolonged period on the bare iron. | |
69 | * (actually until the machine is powered off, or the problem is gone) | |
70 | * So we just stop listening for the WARNING MCH and avoid continuously | |
71 | * being interrupted. One caveat is however, that we must do this per | |
72 | * processor and cannot use the smp version of ctl_clear_bit(). | |
73 | * On VM we only get one interrupt per virtally presented machinecheck. | |
74 | * Though one suffices, we may get one interrupt per (virtual) cpu. | |
75 | */ | |
77fa2245 | 76 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 | 77 | static int mchchk_wng_posted = 0; |
7b886416 HC |
78 | |
79 | /* Use single cpu clear, as we cannot handle smp here. */ | |
1da177e4 LT |
80 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ |
81 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
9ec52099 | 82 | kill_cad_pid(SIGPWR, 1); |
1da177e4 | 83 | } |
29b0a825 HC |
84 | if (mcck.stp_queue) |
85 | stp_queue_work(); | |
77fa2245 HC |
86 | if (mcck.kill_task) { |
87 | local_irq_enable(); | |
88 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
dc6e1555 | 89 | "malfunction (code 0x%016lx).\n", mcck.mcck_code); |
77fa2245 HC |
90 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", |
91 | current->comm, current->pid); | |
92 | do_exit(SIGSEGV); | |
93 | } | |
94 | } | |
71cde587 | 95 | EXPORT_SYMBOL_GPL(s390_handle_mcck); |
77fa2245 HC |
96 | |
97 | /* | |
98 | * returns 0 if all registers could be validated | |
99 | * returns 1 otherwise | |
100 | */ | |
8f149ea6 | 101 | static int notrace s390_validate_registers(union mci mci, int umode) |
77fa2245 HC |
102 | { |
103 | int kill_task; | |
77fa2245 HC |
104 | u64 zero; |
105 | void *fpt_save_area, *fpt_creg_save_area; | |
106 | ||
107 | kill_task = 0; | |
108 | zero = 0; | |
f5daba1d | 109 | |
dc6e1555 | 110 | if (!mci.gr) { |
77fa2245 HC |
111 | /* |
112 | * General purpose registers couldn't be restored and have | |
8f149ea6 | 113 | * unknown contents. Stop system or terminate process. |
77fa2245 | 114 | */ |
8f149ea6 MS |
115 | if (!umode) |
116 | s390_handle_damage(); | |
77fa2245 | 117 | kill_task = 1; |
f5daba1d | 118 | } |
dc6e1555 | 119 | if (!mci.fp) { |
77fa2245 | 120 | /* |
8f149ea6 MS |
121 | * Floating point registers can't be restored. If the |
122 | * kernel currently uses floating point registers the | |
123 | * system is stopped. If the process has its floating | |
124 | * pointer registers loaded it is terminated. | |
125 | * Otherwise just revalidate the registers. | |
77fa2245 | 126 | */ |
8f149ea6 MS |
127 | if (S390_lowcore.fpu_flags & KERNEL_VXR_V0V7) |
128 | s390_handle_damage(); | |
129 | if (!test_cpu_flag(CIF_FPU)) | |
130 | kill_task = 1; | |
f5daba1d | 131 | } |
5a79859a HC |
132 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
133 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; | |
dc6e1555 | 134 | if (!mci.fc) { |
5a79859a HC |
135 | /* |
136 | * Floating point control register can't be restored. | |
8f149ea6 MS |
137 | * If the kernel currently uses the floating pointer |
138 | * registers and needs the FPC register the system is | |
139 | * stopped. If the process has its floating pointer | |
140 | * registers loaded it is terminated. Otherwiese the | |
141 | * FPC is just revalidated. | |
5a79859a | 142 | */ |
8f149ea6 MS |
143 | if (S390_lowcore.fpu_flags & KERNEL_FPC) |
144 | s390_handle_damage(); | |
5a79859a | 145 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
8f149ea6 MS |
146 | if (!test_cpu_flag(CIF_FPU)) |
147 | kill_task = 1; | |
5a79859a HC |
148 | } else |
149 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); | |
150 | ||
cad49cfc | 151 | if (!MACHINE_HAS_VX) { |
975be635 | 152 | /* Validate floating point registers */ |
cad49cfc HC |
153 | asm volatile( |
154 | " ld 0,0(%0)\n" | |
155 | " ld 1,8(%0)\n" | |
156 | " ld 2,16(%0)\n" | |
157 | " ld 3,24(%0)\n" | |
158 | " ld 4,32(%0)\n" | |
159 | " ld 5,40(%0)\n" | |
160 | " ld 6,48(%0)\n" | |
161 | " ld 7,56(%0)\n" | |
162 | " ld 8,64(%0)\n" | |
163 | " ld 9,72(%0)\n" | |
164 | " ld 10,80(%0)\n" | |
165 | " ld 11,88(%0)\n" | |
166 | " ld 12,96(%0)\n" | |
167 | " ld 13,104(%0)\n" | |
168 | " ld 14,112(%0)\n" | |
169 | " ld 15,120(%0)\n" | |
170 | : : "a" (fpt_save_area)); | |
171 | } else { | |
975be635 | 172 | /* Validate vector registers */ |
cad49cfc HC |
173 | union ctlreg0 cr0; |
174 | ||
dc6e1555 | 175 | if (!mci.vr) { |
80703617 | 176 | /* |
8f149ea6 MS |
177 | * Vector registers can't be restored. If the kernel |
178 | * currently uses vector registers the system is | |
179 | * stopped. If the process has its vector registers | |
180 | * loaded it is terminated. Otherwise just revalidate | |
181 | * the registers. | |
80703617 | 182 | */ |
8f149ea6 MS |
183 | if (S390_lowcore.fpu_flags & KERNEL_VXR) |
184 | s390_handle_damage(); | |
185 | if (!test_cpu_flag(CIF_FPU)) | |
186 | kill_task = 1; | |
80703617 | 187 | } |
cad49cfc HC |
188 | cr0.val = S390_lowcore.cregs_save_area[0]; |
189 | cr0.afp = cr0.vx = 1; | |
190 | __ctl_load(cr0.val, 0, 0); | |
9977e886 HB |
191 | asm volatile( |
192 | " la 1,%0\n" | |
193 | " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */ | |
194 | " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */ | |
195 | : : "Q" (*(struct vx_array *) | |
196 | &S390_lowcore.vector_save_area) : "1"); | |
cad49cfc | 197 | __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0); |
80703617 | 198 | } |
975be635 | 199 | /* Validate access registers */ |
94c12cc7 MS |
200 | asm volatile( |
201 | " lam 0,15,0(%0)" | |
202 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
dc6e1555 | 203 | if (!mci.ar) { |
77fa2245 HC |
204 | /* |
205 | * Access registers have unknown contents. | |
206 | * Terminating task. | |
207 | */ | |
208 | kill_task = 1; | |
f5daba1d | 209 | } |
975be635 | 210 | /* Validate control registers */ |
dc6e1555 | 211 | if (!mci.cr) { |
77fa2245 HC |
212 | /* |
213 | * Control registers have unknown contents. | |
214 | * Can't recover and therefore stopping machine. | |
215 | */ | |
3d68286a | 216 | s390_handle_damage(); |
f5daba1d | 217 | } else { |
94c12cc7 MS |
218 | asm volatile( |
219 | " lctlg 0,15,0(%0)" | |
220 | : : "a" (&S390_lowcore.cregs_save_area)); | |
f5daba1d | 221 | } |
77fa2245 | 222 | /* |
975be635 | 223 | * We don't even try to validate the TOD register, since we simply |
77fa2245 HC |
224 | * can't write something sensible into that register. |
225 | */ | |
77fa2245 | 226 | /* |
975be635 | 227 | * See if we can validate the TOD programmable register with its |
77fa2245 HC |
228 | * old contents (should be zero) otherwise set it to zero. |
229 | */ | |
dc6e1555 | 230 | if (!mci.pr) |
94c12cc7 MS |
231 | asm volatile( |
232 | " sr 0,0\n" | |
233 | " sckpf" | |
234 | : : : "0", "cc"); | |
77fa2245 HC |
235 | else |
236 | asm volatile( | |
94c12cc7 MS |
237 | " l 0,0(%0)\n" |
238 | " sckpf" | |
239 | : : "a" (&S390_lowcore.tod_progreg_save_area) | |
240 | : "0", "cc"); | |
975be635 | 241 | /* Validate clock comparator register */ |
b6bed093 | 242 | set_clock_comparator(S390_lowcore.clock_comparator); |
77fa2245 | 243 | /* Check if old PSW is valid */ |
dc6e1555 | 244 | if (!mci.wp) |
77fa2245 HC |
245 | /* |
246 | * Can't tell if we come from user or kernel mode | |
247 | * -> stopping machine. | |
248 | */ | |
3d68286a | 249 | s390_handle_damage(); |
77fa2245 | 250 | |
dc6e1555 | 251 | if (!mci.ms || !mci.pm || !mci.ia) |
77fa2245 HC |
252 | kill_task = 1; |
253 | ||
254 | return kill_task; | |
255 | } | |
256 | ||
b73d40c6 | 257 | #define MAX_IPD_COUNT 29 |
022e4fc0 | 258 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
b73d40c6 | 259 | |
f5daba1d HC |
260 | #define ED_STP_ISLAND 6 /* External damage STP island check */ |
261 | #define ED_STP_SYNC 7 /* External damage STP sync check */ | |
f5daba1d | 262 | |
77fa2245 HC |
263 | /* |
264 | * machine check handler. | |
265 | */ | |
cc54c1e6 | 266 | void notrace s390_do_machine_check(struct pt_regs *regs) |
77fa2245 | 267 | { |
f5daba1d | 268 | static int ipd_count; |
b73d40c6 HC |
269 | static DEFINE_SPINLOCK(ipd_lock); |
270 | static unsigned long long last_ipd; | |
f5daba1d | 271 | struct mcck_struct *mcck; |
b73d40c6 | 272 | unsigned long long tmp; |
dc6e1555 | 273 | union mci mci; |
77fa2245 | 274 | |
81f64b87 | 275 | nmi_enter(); |
420f42ec | 276 | inc_irq_stat(NMI_NMI); |
dc6e1555 | 277 | mci.val = S390_lowcore.mcck_interruption_code; |
eb7e7d76 | 278 | mcck = this_cpu_ptr(&cpu_mcck); |
77fa2245 | 279 | |
dc6e1555 | 280 | if (mci.sd) { |
77fa2245 | 281 | /* System damage -> stopping machine */ |
3d68286a | 282 | s390_handle_damage(); |
f5daba1d | 283 | } |
dc6e1555 HC |
284 | if (mci.pd) { |
285 | if (mci.b) { | |
77fa2245 HC |
286 | /* Processing backup -> verify if we can survive this */ |
287 | u64 z_mcic, o_mcic, t_mcic; | |
77fa2245 HC |
288 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
289 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
290 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
291 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
292 | 1ULL<<16); | |
dc6e1555 | 293 | t_mcic = mci.val; |
77fa2245 HC |
294 | |
295 | if (((t_mcic & z_mcic) != 0) || | |
296 | ((t_mcic & o_mcic) != o_mcic)) { | |
3d68286a | 297 | s390_handle_damage(); |
77fa2245 | 298 | } |
b73d40c6 HC |
299 | |
300 | /* | |
301 | * Nullifying exigent condition, therefore we might | |
302 | * retry this instruction. | |
303 | */ | |
b73d40c6 | 304 | spin_lock(&ipd_lock); |
1aae0560 | 305 | tmp = get_tod_clock(); |
b73d40c6 HC |
306 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) |
307 | ipd_count++; | |
308 | else | |
309 | ipd_count = 1; | |
b73d40c6 | 310 | last_ipd = tmp; |
b73d40c6 | 311 | if (ipd_count == MAX_IPD_COUNT) |
3d68286a | 312 | s390_handle_damage(); |
b73d40c6 | 313 | spin_unlock(&ipd_lock); |
f5daba1d | 314 | } else { |
77fa2245 | 315 | /* Processing damage -> stopping machine */ |
3d68286a | 316 | s390_handle_damage(); |
77fa2245 HC |
317 | } |
318 | } | |
8f149ea6 MS |
319 | if (s390_validate_registers(mci, user_mode(regs))) { |
320 | /* | |
321 | * Couldn't restore all register contents for the | |
322 | * user space process -> mark task for termination. | |
323 | */ | |
324 | mcck->kill_task = 1; | |
325 | mcck->mcck_code = mci.val; | |
326 | set_cpu_flag(CIF_MCCK_PENDING); | |
77fa2245 | 327 | } |
dc6e1555 | 328 | if (mci.cd) { |
d54853ef | 329 | /* Timing facility damage */ |
3d68286a | 330 | s390_handle_damage(); |
d54853ef | 331 | } |
dc6e1555 | 332 | if (mci.ed && mci.ec) { |
d54853ef | 333 | /* External damage */ |
d2fec595 | 334 | if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC)) |
29b0a825 | 335 | mcck->stp_queue |= stp_sync_check(); |
d2fec595 | 336 | if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND)) |
29b0a825 | 337 | mcck->stp_queue |= stp_island_check(); |
fd5ada04 | 338 | if (mcck->stp_queue) |
29b0a825 | 339 | set_cpu_flag(CIF_MCCK_PENDING); |
d54853ef | 340 | } |
dc6e1555 | 341 | if (mci.se) |
77fa2245 | 342 | /* Storage error uncorrected */ |
3d68286a | 343 | s390_handle_damage(); |
dc6e1555 | 344 | if (mci.ke) |
77fa2245 | 345 | /* Storage key-error uncorrected */ |
3d68286a | 346 | s390_handle_damage(); |
dc6e1555 | 347 | if (mci.ds && mci.fa) |
77fa2245 | 348 | /* Storage degradation */ |
3d68286a | 349 | s390_handle_damage(); |
dc6e1555 | 350 | if (mci.cp) { |
77fa2245 HC |
351 | /* Channel report word pending */ |
352 | mcck->channel_report = 1; | |
d3a73acb | 353 | set_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 | 354 | } |
dc6e1555 | 355 | if (mci.w) { |
77fa2245 HC |
356 | /* Warning pending */ |
357 | mcck->warning = 1; | |
d3a73acb | 358 | set_cpu_flag(CIF_MCCK_PENDING); |
77fa2245 | 359 | } |
81f64b87 | 360 | nmi_exit(); |
1da177e4 LT |
361 | } |
362 | ||
f5daba1d | 363 | static int __init machine_check_init(void) |
1da177e4 | 364 | { |
d54853ef | 365 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
f5daba1d | 366 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
1da177e4 | 367 | ctl_set_bit(14, 24); /* enable warning MCH */ |
1da177e4 LT |
368 | return 0; |
369 | } | |
24d05ff8 | 370 | early_initcall(machine_check_init); |