Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
f5daba1d | 2 | * Machine check handler |
1da177e4 | 3 | * |
f5daba1d HC |
4 | * Copyright IBM Corp. 2000,2009 |
5 | * Author(s): Ingo Adlung <adlung@de.ibm.com>, | |
6 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | |
7 | * Cornelia Huck <cornelia.huck@de.ibm.com>, | |
8 | * Heiko Carstens <heiko.carstens@de.ibm.com>, | |
1da177e4 LT |
9 | */ |
10 | ||
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/errno.h> |
022e4fc0 | 13 | #include <linux/time.h> |
f5daba1d | 14 | #include <linux/module.h> |
1da177e4 | 15 | #include <asm/lowcore.h> |
f5daba1d HC |
16 | #include <asm/smp.h> |
17 | #include <asm/etr.h> | |
9cfb9b3c | 18 | #include <asm/cpu.h> |
f5daba1d HC |
19 | #include <asm/nmi.h> |
20 | #include <asm/crw.h> | |
1da177e4 | 21 | |
77fa2245 HC |
22 | struct mcck_struct { |
23 | int kill_task; | |
24 | int channel_report; | |
25 | int warning; | |
26 | unsigned long long mcck_code; | |
27 | }; | |
28 | ||
29 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
30 | ||
f5daba1d HC |
31 | static NORET_TYPE void s390_handle_damage(char *msg) |
32 | { | |
33 | smp_send_stop(); | |
34 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
35 | while (1); | |
36 | } | |
37 | ||
1da177e4 | 38 | /* |
77fa2245 HC |
39 | * Main machine check handler function. Will be called with interrupts enabled |
40 | * or disabled and machine checks enabled or disabled. | |
1da177e4 | 41 | */ |
f5daba1d | 42 | void s390_handle_mcck(void) |
1da177e4 | 43 | { |
77fa2245 HC |
44 | unsigned long flags; |
45 | struct mcck_struct mcck; | |
1da177e4 | 46 | |
77fa2245 HC |
47 | /* |
48 | * Disable machine checks and get the current state of accumulated | |
49 | * machine checks. Afterwards delete the old state and enable machine | |
50 | * checks again. | |
51 | */ | |
52 | local_irq_save(flags); | |
53 | local_mcck_disable(); | |
54 | mcck = __get_cpu_var(cpu_mcck); | |
55 | memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct)); | |
56 | clear_thread_flag(TIF_MCCK_PENDING); | |
57 | local_mcck_enable(); | |
58 | local_irq_restore(flags); | |
1da177e4 | 59 | |
77fa2245 | 60 | if (mcck.channel_report) |
f5daba1d | 61 | crw_handle_channel_report(); |
1da177e4 LT |
62 | |
63 | #ifdef CONFIG_MACHCHK_WARNING | |
64 | /* | |
65 | * The warning may remain for a prolonged period on the bare iron. | |
66 | * (actually till the machine is powered off, or until the problem is gone) | |
67 | * So we just stop listening for the WARNING MCH and prevent continuously | |
68 | * being interrupted. One caveat is however, that we must do this per | |
69 | * processor and cannot use the smp version of ctl_clear_bit(). | |
70 | * On VM we only get one interrupt per virtally presented machinecheck. | |
71 | * Though one suffices, we may get one interrupt per (virtual) processor. | |
72 | */ | |
77fa2245 | 73 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 LT |
74 | static int mchchk_wng_posted = 0; |
75 | /* | |
76 | * Use single machine clear, as we cannot handle smp right now | |
77 | */ | |
78 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ | |
79 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
9ec52099 | 80 | kill_cad_pid(SIGPWR, 1); |
1da177e4 LT |
81 | } |
82 | #endif | |
77fa2245 HC |
83 | |
84 | if (mcck.kill_task) { | |
85 | local_irq_enable(); | |
86 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
87 | "malfunction (code 0x%016llx).\n", mcck.mcck_code); | |
88 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", | |
89 | current->comm, current->pid); | |
90 | do_exit(SIGSEGV); | |
91 | } | |
92 | } | |
71cde587 | 93 | EXPORT_SYMBOL_GPL(s390_handle_mcck); |
77fa2245 HC |
94 | |
95 | /* | |
96 | * returns 0 if all registers could be validated | |
97 | * returns 1 otherwise | |
98 | */ | |
f5daba1d | 99 | static int notrace s390_revalidate_registers(struct mci *mci) |
77fa2245 HC |
100 | { |
101 | int kill_task; | |
102 | u64 tmpclock; | |
103 | u64 zero; | |
104 | void *fpt_save_area, *fpt_creg_save_area; | |
105 | ||
106 | kill_task = 0; | |
107 | zero = 0; | |
f5daba1d HC |
108 | |
109 | if (!mci->gr) { | |
77fa2245 HC |
110 | /* |
111 | * General purpose registers couldn't be restored and have | |
112 | * unknown contents. Process needs to be terminated. | |
113 | */ | |
114 | kill_task = 1; | |
f5daba1d HC |
115 | } |
116 | if (!mci->fp) { | |
77fa2245 HC |
117 | /* |
118 | * Floating point registers can't be restored and | |
119 | * therefore the process needs to be terminated. | |
120 | */ | |
121 | kill_task = 1; | |
f5daba1d | 122 | } |
347a8dc3 | 123 | #ifndef CONFIG_64BIT |
94c12cc7 MS |
124 | asm volatile( |
125 | " ld 0,0(%0)\n" | |
126 | " ld 2,8(%0)\n" | |
127 | " ld 4,16(%0)\n" | |
128 | " ld 6,24(%0)" | |
129 | : : "a" (&S390_lowcore.floating_pt_save_area)); | |
77fa2245 HC |
130 | #endif |
131 | ||
132 | if (MACHINE_HAS_IEEE) { | |
347a8dc3 | 133 | #ifdef CONFIG_64BIT |
77fa2245 HC |
134 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
135 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; | |
136 | #else | |
137 | fpt_save_area = (void *) S390_lowcore.extended_save_area_addr; | |
f5daba1d | 138 | fpt_creg_save_area = fpt_save_area + 128; |
77fa2245 | 139 | #endif |
77fa2245 HC |
140 | if (!mci->fc) { |
141 | /* | |
142 | * Floating point control register can't be restored. | |
143 | * Task will be terminated. | |
144 | */ | |
94c12cc7 | 145 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
77fa2245 HC |
146 | kill_task = 1; |
147 | ||
94c12cc7 MS |
148 | } else |
149 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); | |
77fa2245 | 150 | |
94c12cc7 MS |
151 | asm volatile( |
152 | " ld 0,0(%0)\n" | |
153 | " ld 1,8(%0)\n" | |
154 | " ld 2,16(%0)\n" | |
155 | " ld 3,24(%0)\n" | |
156 | " ld 4,32(%0)\n" | |
157 | " ld 5,40(%0)\n" | |
158 | " ld 6,48(%0)\n" | |
159 | " ld 7,56(%0)\n" | |
160 | " ld 8,64(%0)\n" | |
161 | " ld 9,72(%0)\n" | |
162 | " ld 10,80(%0)\n" | |
163 | " ld 11,88(%0)\n" | |
164 | " ld 12,96(%0)\n" | |
165 | " ld 13,104(%0)\n" | |
166 | " ld 14,112(%0)\n" | |
167 | " ld 15,120(%0)\n" | |
168 | : : "a" (fpt_save_area)); | |
77fa2245 | 169 | } |
77fa2245 | 170 | /* Revalidate access registers */ |
94c12cc7 MS |
171 | asm volatile( |
172 | " lam 0,15,0(%0)" | |
173 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
f5daba1d | 174 | if (!mci->ar) { |
77fa2245 HC |
175 | /* |
176 | * Access registers have unknown contents. | |
177 | * Terminating task. | |
178 | */ | |
179 | kill_task = 1; | |
f5daba1d | 180 | } |
77fa2245 | 181 | /* Revalidate control registers */ |
f5daba1d | 182 | if (!mci->cr) { |
77fa2245 HC |
183 | /* |
184 | * Control registers have unknown contents. | |
185 | * Can't recover and therefore stopping machine. | |
186 | */ | |
187 | s390_handle_damage("invalid control registers."); | |
f5daba1d | 188 | } else { |
347a8dc3 | 189 | #ifdef CONFIG_64BIT |
94c12cc7 MS |
190 | asm volatile( |
191 | " lctlg 0,15,0(%0)" | |
192 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 | 193 | #else |
94c12cc7 MS |
194 | asm volatile( |
195 | " lctl 0,15,0(%0)" | |
196 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 | 197 | #endif |
f5daba1d | 198 | } |
77fa2245 HC |
199 | /* |
200 | * We don't even try to revalidate the TOD register, since we simply | |
201 | * can't write something sensible into that register. | |
202 | */ | |
347a8dc3 | 203 | #ifdef CONFIG_64BIT |
77fa2245 HC |
204 | /* |
205 | * See if we can revalidate the TOD programmable register with its | |
206 | * old contents (should be zero) otherwise set it to zero. | |
207 | */ | |
208 | if (!mci->pr) | |
94c12cc7 MS |
209 | asm volatile( |
210 | " sr 0,0\n" | |
211 | " sckpf" | |
212 | : : : "0", "cc"); | |
77fa2245 HC |
213 | else |
214 | asm volatile( | |
94c12cc7 MS |
215 | " l 0,0(%0)\n" |
216 | " sckpf" | |
217 | : : "a" (&S390_lowcore.tod_progreg_save_area) | |
218 | : "0", "cc"); | |
77fa2245 | 219 | #endif |
77fa2245 | 220 | /* Revalidate clock comparator register */ |
94c12cc7 MS |
221 | asm volatile( |
222 | " stck 0(%1)\n" | |
223 | " sckc 0(%1)" | |
224 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | |
77fa2245 HC |
225 | |
226 | /* Check if old PSW is valid */ | |
227 | if (!mci->wp) | |
228 | /* | |
229 | * Can't tell if we come from user or kernel mode | |
230 | * -> stopping machine. | |
231 | */ | |
232 | s390_handle_damage("old psw invalid."); | |
233 | ||
234 | if (!mci->ms || !mci->pm || !mci->ia) | |
235 | kill_task = 1; | |
236 | ||
237 | return kill_task; | |
238 | } | |
239 | ||
b73d40c6 | 240 | #define MAX_IPD_COUNT 29 |
022e4fc0 | 241 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
b73d40c6 | 242 | |
f5daba1d HC |
243 | #define ED_STP_ISLAND 6 /* External damage STP island check */ |
244 | #define ED_STP_SYNC 7 /* External damage STP sync check */ | |
245 | #define ED_ETR_SYNC 12 /* External damage ETR sync check */ | |
246 | #define ED_ETR_SWITCH 13 /* External damage ETR switch to local */ | |
247 | ||
77fa2245 HC |
248 | /* |
249 | * machine check handler. | |
250 | */ | |
cc54c1e6 | 251 | void notrace s390_do_machine_check(struct pt_regs *regs) |
77fa2245 | 252 | { |
f5daba1d | 253 | static int ipd_count; |
b73d40c6 HC |
254 | static DEFINE_SPINLOCK(ipd_lock); |
255 | static unsigned long long last_ipd; | |
f5daba1d | 256 | struct mcck_struct *mcck; |
b73d40c6 | 257 | unsigned long long tmp; |
77fa2245 | 258 | struct mci *mci; |
77fa2245 HC |
259 | int umode; |
260 | ||
8e9ccae6 | 261 | lockdep_off(); |
9cfb9b3c | 262 | s390_idle_check(); |
8e9ccae6 | 263 | |
77fa2245 HC |
264 | mci = (struct mci *) &S390_lowcore.mcck_interruption_code; |
265 | mcck = &__get_cpu_var(cpu_mcck); | |
266 | umode = user_mode(regs); | |
267 | ||
f5daba1d | 268 | if (mci->sd) { |
77fa2245 HC |
269 | /* System damage -> stopping machine */ |
270 | s390_handle_damage("received system damage machine check."); | |
f5daba1d | 271 | } |
77fa2245 HC |
272 | if (mci->pd) { |
273 | if (mci->b) { | |
274 | /* Processing backup -> verify if we can survive this */ | |
275 | u64 z_mcic, o_mcic, t_mcic; | |
347a8dc3 | 276 | #ifdef CONFIG_64BIT |
77fa2245 HC |
277 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
278 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
279 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
280 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
281 | 1ULL<<16); | |
282 | #else | |
283 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 | | |
284 | 1ULL<<29); | |
285 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
286 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
287 | 1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16); | |
288 | #endif | |
289 | t_mcic = *(u64 *)mci; | |
290 | ||
291 | if (((t_mcic & z_mcic) != 0) || | |
292 | ((t_mcic & o_mcic) != o_mcic)) { | |
293 | s390_handle_damage("processing backup machine " | |
294 | "check with damage."); | |
295 | } | |
b73d40c6 HC |
296 | |
297 | /* | |
298 | * Nullifying exigent condition, therefore we might | |
299 | * retry this instruction. | |
300 | */ | |
b73d40c6 | 301 | spin_lock(&ipd_lock); |
b73d40c6 | 302 | tmp = get_clock(); |
b73d40c6 HC |
303 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) |
304 | ipd_count++; | |
305 | else | |
306 | ipd_count = 1; | |
b73d40c6 | 307 | last_ipd = tmp; |
b73d40c6 HC |
308 | if (ipd_count == MAX_IPD_COUNT) |
309 | s390_handle_damage("too many ipd retries."); | |
b73d40c6 | 310 | spin_unlock(&ipd_lock); |
f5daba1d | 311 | } else { |
77fa2245 HC |
312 | /* Processing damage -> stopping machine */ |
313 | s390_handle_damage("received instruction processing " | |
314 | "damage machine check."); | |
315 | } | |
316 | } | |
317 | if (s390_revalidate_registers(mci)) { | |
318 | if (umode) { | |
319 | /* | |
320 | * Couldn't restore all register contents while in | |
321 | * user mode -> mark task for termination. | |
322 | */ | |
323 | mcck->kill_task = 1; | |
324 | mcck->mcck_code = *(unsigned long long *) mci; | |
325 | set_thread_flag(TIF_MCCK_PENDING); | |
f5daba1d | 326 | } else { |
77fa2245 HC |
327 | /* |
328 | * Couldn't restore all register contents while in | |
329 | * kernel mode -> stopping machine. | |
330 | */ | |
331 | s390_handle_damage("unable to revalidate registers."); | |
f5daba1d | 332 | } |
77fa2245 | 333 | } |
d54853ef MS |
334 | if (mci->cd) { |
335 | /* Timing facility damage */ | |
336 | s390_handle_damage("TOD clock damaged"); | |
337 | } | |
d54853ef MS |
338 | if (mci->ed && mci->ec) { |
339 | /* External damage */ | |
340 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC)) | |
341 | etr_sync_check(); | |
342 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH)) | |
343 | etr_switch_to_local(); | |
d2fec595 MS |
344 | if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC)) |
345 | stp_sync_check(); | |
346 | if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND)) | |
347 | stp_island_check(); | |
d54853ef | 348 | } |
77fa2245 HC |
349 | if (mci->se) |
350 | /* Storage error uncorrected */ | |
351 | s390_handle_damage("received storage error uncorrected " | |
352 | "machine check."); | |
77fa2245 HC |
353 | if (mci->ke) |
354 | /* Storage key-error uncorrected */ | |
355 | s390_handle_damage("received storage key-error uncorrected " | |
356 | "machine check."); | |
77fa2245 HC |
357 | if (mci->ds && mci->fa) |
358 | /* Storage degradation */ | |
359 | s390_handle_damage("received storage degradation machine " | |
360 | "check."); | |
77fa2245 HC |
361 | if (mci->cp) { |
362 | /* Channel report word pending */ | |
363 | mcck->channel_report = 1; | |
364 | set_thread_flag(TIF_MCCK_PENDING); | |
365 | } | |
77fa2245 HC |
366 | if (mci->w) { |
367 | /* Warning pending */ | |
368 | mcck->warning = 1; | |
369 | set_thread_flag(TIF_MCCK_PENDING); | |
370 | } | |
8e9ccae6 | 371 | lockdep_on(); |
1da177e4 LT |
372 | } |
373 | ||
f5daba1d | 374 | static int __init machine_check_init(void) |
1da177e4 | 375 | { |
d54853ef | 376 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
f5daba1d | 377 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
1da177e4 LT |
378 | #ifdef CONFIG_MACHCHK_WARNING |
379 | ctl_set_bit(14, 24); /* enable warning MCH */ | |
380 | #endif | |
381 | return 0; | |
382 | } | |
1da177e4 | 383 | arch_initcall(machine_check_init); |