Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux...
[deliverable/linux.git] / arch / s390 / kernel / ptrace.c
CommitLineData
1da177e4 1/*
5e9a2692 2 * Ptrace user space interface.
1da177e4 3 *
a53c8fab 4 * Copyright IBM Corp. 1999, 2010
5e9a2692 5 * Author(s): Denis Joseph Barrow
1da177e4 6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
1da177e4
LT
7 */
8
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
1da177e4
LT
13#include <linux/errno.h>
14#include <linux/ptrace.h>
15#include <linux/user.h>
16#include <linux/security.h>
17#include <linux/audit.h>
7ed20e1a 18#include <linux/signal.h>
63506c41
MS
19#include <linux/elf.h>
20#include <linux/regset.h>
753c4dd6 21#include <linux/tracehook.h>
bcf5cef7 22#include <linux/seccomp.h>
048cd4e5 23#include <linux/compat.h>
9bf1226b 24#include <trace/syscall.h>
1da177e4
LT
25#include <asm/segment.h>
26#include <asm/page.h>
27#include <asm/pgtable.h>
28#include <asm/pgalloc.h>
1da177e4 29#include <asm/uaccess.h>
778959db 30#include <asm/unistd.h>
a0616cde 31#include <asm/switch_to.h>
a806170e 32#include "entry.h"
1da177e4 33
347a8dc3 34#ifdef CONFIG_COMPAT
1da177e4
LT
35#include "compat_ptrace.h"
36#endif
37
1c569f02
JS
38#define CREATE_TRACE_POINTS
39#include <trace/events/syscalls.h>
5e9ad7df 40
64597f9d 41void update_cr_regs(struct task_struct *task)
1da177e4 42{
5e9a2692
MS
43 struct pt_regs *regs = task_pt_regs(task);
44 struct thread_struct *thread = &task->thread;
a45aff52 45 struct per_regs old, new;
5e9a2692 46
d35339a4 47 /* Take care of the enable/disable of transactional execution. */
9977e886 48 if (MACHINE_HAS_TE) {
c63badeb 49 unsigned long cr, cr_new;
d35339a4 50
c63badeb 51 __ctl_store(cr, 0, 0);
9977e886
HB
52 /* Set or clear transaction execution TXC bit 8. */
53 cr_new = cr | (1UL << 55);
54 if (task->thread.per_flags & PER_FLAG_NO_TE)
55 cr_new &= ~(1UL << 55);
c63badeb 56 if (cr_new != cr)
a8a934e4 57 __ctl_load(cr_new, 0, 0);
9977e886
HB
58 /* Set or clear transaction execution TDC bits 62 and 63. */
59 __ctl_store(cr, 2, 2);
60 cr_new = cr & ~3UL;
61 if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) {
62 if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND_TEND)
63 cr_new |= 1UL;
64 else
65 cr_new |= 2UL;
64597f9d 66 }
9977e886
HB
67 if (cr_new != cr)
68 __ctl_load(cr_new, 2, 2);
d35339a4 69 }
a45aff52
MS
70 /* Copy user specified PER registers */
71 new.control = thread->per_user.control;
72 new.start = thread->per_user.start;
73 new.end = thread->per_user.end;
74
75 /* merge TIF_SINGLE_STEP into user specified PER registers. */
2a0a5b22
JW
76 if (test_tsk_thread_flag(task, TIF_SINGLE_STEP) ||
77 test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) {
818a330c
MS
78 if (test_tsk_thread_flag(task, TIF_BLOCK_STEP))
79 new.control |= PER_EVENT_BRANCH;
80 else
81 new.control |= PER_EVENT_IFETCH;
d35339a4
MS
82 new.control |= PER_CONTROL_SUSPENSION;
83 new.control |= PER_EVENT_TRANSACTION_END;
2a0a5b22
JW
84 if (test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP))
85 new.control |= PER_EVENT_IFETCH;
a45aff52 86 new.start = 0;
9cb1ccec 87 new.end = -1UL;
a45aff52 88 }
5e9a2692
MS
89
90 /* Take care of the PER enablement bit in the PSW. */
a45aff52 91 if (!(new.control & PER_EVENT_MASK)) {
1da177e4 92 regs->psw.mask &= ~PSW_MASK_PER;
5e9a2692 93 return;
c3311c13 94 }
5e9a2692
MS
95 regs->psw.mask |= PSW_MASK_PER;
96 __ctl_store(old, 9, 11);
a45aff52
MS
97 if (memcmp(&new, &old, sizeof(struct per_regs)) != 0)
98 __ctl_load(new, 9, 11);
1da177e4
LT
99}
100
0ac30be4 101void user_enable_single_step(struct task_struct *task)
1da177e4 102{
818a330c 103 clear_tsk_thread_flag(task, TIF_BLOCK_STEP);
5e9a2692 104 set_tsk_thread_flag(task, TIF_SINGLE_STEP);
1da177e4
LT
105}
106
0ac30be4 107void user_disable_single_step(struct task_struct *task)
1da177e4 108{
818a330c 109 clear_tsk_thread_flag(task, TIF_BLOCK_STEP);
5e9a2692 110 clear_tsk_thread_flag(task, TIF_SINGLE_STEP);
1da177e4
LT
111}
112
818a330c
MS
113void user_enable_block_step(struct task_struct *task)
114{
115 set_tsk_thread_flag(task, TIF_SINGLE_STEP);
116 set_tsk_thread_flag(task, TIF_BLOCK_STEP);
117}
118
1da177e4
LT
119/*
120 * Called by kernel/ptrace.c when detaching..
121 *
5e9a2692 122 * Clear all debugging related fields.
1da177e4 123 */
5e9a2692 124void ptrace_disable(struct task_struct *task)
1da177e4 125{
5e9a2692
MS
126 memset(&task->thread.per_user, 0, sizeof(task->thread.per_user));
127 memset(&task->thread.per_event, 0, sizeof(task->thread.per_event));
128 clear_tsk_thread_flag(task, TIF_SINGLE_STEP);
d3a73acb 129 clear_pt_regs_flag(task_pt_regs(task), PIF_PER_TRAP);
d35339a4 130 task->thread.per_flags = 0;
1da177e4
LT
131}
132
5a79859a 133#define __ADDR_MASK 7
1da177e4 134
5e9a2692
MS
135static inline unsigned long __peek_user_per(struct task_struct *child,
136 addr_t addr)
137{
138 struct per_struct_kernel *dummy = NULL;
139
140 if (addr == (addr_t) &dummy->cr9)
141 /* Control bits of the active per set. */
142 return test_thread_flag(TIF_SINGLE_STEP) ?
143 PER_EVENT_IFETCH : child->thread.per_user.control;
144 else if (addr == (addr_t) &dummy->cr10)
145 /* Start address of the active per set. */
146 return test_thread_flag(TIF_SINGLE_STEP) ?
147 0 : child->thread.per_user.start;
148 else if (addr == (addr_t) &dummy->cr11)
149 /* End address of the active per set. */
150 return test_thread_flag(TIF_SINGLE_STEP) ?
9cb1ccec 151 -1UL : child->thread.per_user.end;
5e9a2692
MS
152 else if (addr == (addr_t) &dummy->bits)
153 /* Single-step bit. */
154 return test_thread_flag(TIF_SINGLE_STEP) ?
155 (1UL << (BITS_PER_LONG - 1)) : 0;
156 else if (addr == (addr_t) &dummy->starting_addr)
157 /* Start address of the user specified per set. */
158 return child->thread.per_user.start;
159 else if (addr == (addr_t) &dummy->ending_addr)
160 /* End address of the user specified per set. */
161 return child->thread.per_user.end;
162 else if (addr == (addr_t) &dummy->perc_atmid)
163 /* PER code, ATMID and AI of the last PER trap */
164 return (unsigned long)
165 child->thread.per_event.cause << (BITS_PER_LONG - 16);
166 else if (addr == (addr_t) &dummy->address)
167 /* Address of the last PER trap */
168 return child->thread.per_event.address;
169 else if (addr == (addr_t) &dummy->access_id)
170 /* Access id of the last PER trap */
171 return (unsigned long)
172 child->thread.per_event.paid << (BITS_PER_LONG - 8);
173 return 0;
174}
175
1da177e4
LT
176/*
177 * Read the word at offset addr from the user area of a process. The
178 * trouble here is that the information is littered over different
179 * locations. The process registers are found on the kernel stack,
180 * the floating point stuff and the trace settings are stored in
181 * the task structure. In addition the different structures in
182 * struct user contain pad bytes that should be read as zeroes.
183 * Lovely...
184 */
63506c41 185static unsigned long __peek_user(struct task_struct *child, addr_t addr)
1da177e4
LT
186{
187 struct user *dummy = NULL;
63506c41 188 addr_t offset, tmp;
1da177e4
LT
189
190 if (addr < (addr_t) &dummy->regs.acrs) {
191 /*
192 * psw and gprs are stored on the stack
193 */
c7584fb6 194 tmp = *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr);
5ebf250d 195 if (addr == (addr_t) &dummy->regs.psw.mask) {
b50511e4 196 /* Return a clean psw mask. */
5ebf250d
HC
197 tmp &= PSW_MASK_USER | PSW_MASK_RI;
198 tmp |= PSW_USER_BITS;
199 }
1da177e4
LT
200
201 } else if (addr < (addr_t) &dummy->regs.orig_gpr2) {
202 /*
203 * access registers are stored in the thread structure
204 */
205 offset = addr - (addr_t) &dummy->regs.acrs;
778959db
MS
206 /*
207 * Very special case: old & broken 64 bit gdb reading
208 * from acrs[15]. Result is a 64 bit value. Read the
209 * 32 bit acrs[15] value and shift it by 32. Sick...
210 */
211 if (addr == (addr_t) &dummy->regs.acrs[15])
212 tmp = ((unsigned long) child->thread.acrs[15]) << 32;
213 else
5a79859a 214 tmp = *(addr_t *)((addr_t) &child->thread.acrs + offset);
1da177e4
LT
215
216 } else if (addr == (addr_t) &dummy->regs.orig_gpr2) {
217 /*
218 * orig_gpr2 is stored on the kernel stack
219 */
c7584fb6 220 tmp = (addr_t) task_pt_regs(child)->orig_gpr2;
1da177e4 221
3d6e48f4
JW
222 } else if (addr < (addr_t) &dummy->regs.fp_regs) {
223 /*
224 * prevent reads of padding hole between
225 * orig_gpr2 and fp_regs on s390.
226 */
227 tmp = 0;
228
86c558e8
MS
229 } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) {
230 /*
231 * floating point control reg. is in the thread structure
232 */
904818e2 233 tmp = child->thread.fpu.fpc;
86c558e8
MS
234 tmp <<= BITS_PER_LONG - 32;
235
1da177e4 236 } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) {
86c558e8 237 /*
904818e2
HB
238 * floating point regs. are either in child->thread.fpu
239 * or the child->thread.fpu.vxrs array
1da177e4 240 */
86c558e8 241 offset = addr - (addr_t) &dummy->regs.fp_regs.fprs;
b5510d9b 242 if (MACHINE_HAS_VX)
86c558e8 243 tmp = *(addr_t *)
904818e2 244 ((addr_t) child->thread.fpu.vxrs + 2*offset);
86c558e8 245 else
86c558e8 246 tmp = *(addr_t *)
55a423b6 247 ((addr_t) child->thread.fpu.fprs + offset);
1da177e4
LT
248
249 } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) {
250 /*
5e9a2692 251 * Handle access to the per_info structure.
1da177e4 252 */
5e9a2692
MS
253 addr -= (addr_t) &dummy->regs.per_info;
254 tmp = __peek_user_per(child, addr);
1da177e4
LT
255
256 } else
257 tmp = 0;
258
63506c41 259 return tmp;
1da177e4
LT
260}
261
1da177e4 262static int
63506c41 263peek_user(struct task_struct *child, addr_t addr, addr_t data)
1da177e4 264{
63506c41 265 addr_t tmp, mask;
1da177e4
LT
266
267 /*
268 * Stupid gdb peeks/pokes the access registers in 64 bit with
63506c41 269 * an alignment of 4. Programmers from hell...
1da177e4 270 */
778959db 271 mask = __ADDR_MASK;
547e3cec
MS
272 if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
273 addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
778959db 274 mask = 3;
778959db 275 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
1da177e4
LT
276 return -EIO;
277
63506c41
MS
278 tmp = __peek_user(child, addr);
279 return put_user(tmp, (addr_t __user *) data);
280}
281
5e9a2692
MS
282static inline void __poke_user_per(struct task_struct *child,
283 addr_t addr, addr_t data)
284{
285 struct per_struct_kernel *dummy = NULL;
286
287 /*
288 * There are only three fields in the per_info struct that the
289 * debugger user can write to.
290 * 1) cr9: the debugger wants to set a new PER event mask
291 * 2) starting_addr: the debugger wants to set a new starting
292 * address to use with the PER event mask.
293 * 3) ending_addr: the debugger wants to set a new ending
294 * address to use with the PER event mask.
295 * The user specified PER event mask and the start and end
296 * addresses are used only if single stepping is not in effect.
297 * Writes to any other field in per_info are ignored.
298 */
299 if (addr == (addr_t) &dummy->cr9)
300 /* PER event mask of the user specified per set. */
301 child->thread.per_user.control =
302 data & (PER_EVENT_MASK | PER_CONTROL_MASK);
303 else if (addr == (addr_t) &dummy->starting_addr)
304 /* Starting address of the user specified per set. */
305 child->thread.per_user.start = data;
306 else if (addr == (addr_t) &dummy->ending_addr)
307 /* Ending address of the user specified per set. */
308 child->thread.per_user.end = data;
309}
310
63506c41
MS
311/*
312 * Write a word to the user area of a process at location addr. This
313 * operation does have an additional problem compared to peek_user.
314 * Stores to the program status word and on the floating point
315 * control register needs to get checked for validity.
316 */
317static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
318{
319 struct user *dummy = NULL;
d4e81b35 320 addr_t offset;
63506c41 321
1da177e4
LT
322 if (addr < (addr_t) &dummy->regs.acrs) {
323 /*
324 * psw and gprs are stored on the stack
325 */
5ebf250d
HC
326 if (addr == (addr_t) &dummy->regs.psw.mask) {
327 unsigned long mask = PSW_MASK_USER;
328
329 mask |= is_ri_task(child) ? PSW_MASK_RI : 0;
dab6cf55
MS
330 if ((data ^ PSW_USER_BITS) & ~mask)
331 /* Invalid psw mask. */
332 return -EINVAL;
333 if ((data & PSW_MASK_ASC) == PSW_ASC_HOME)
334 /* Invalid address-space-control bits */
5ebf250d
HC
335 return -EINVAL;
336 if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))
dab6cf55 337 /* Invalid addressing mode bits */
5ebf250d
HC
338 return -EINVAL;
339 }
c7584fb6 340 *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
1da177e4
LT
341
342 } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) {
343 /*
344 * access registers are stored in the thread structure
345 */
346 offset = addr - (addr_t) &dummy->regs.acrs;
778959db
MS
347 /*
348 * Very special case: old & broken 64 bit gdb writing
349 * to acrs[15] with a 64 bit value. Ignore the lower
350 * half of the value and write the upper 32 bit to
351 * acrs[15]. Sick...
352 */
353 if (addr == (addr_t) &dummy->regs.acrs[15])
354 child->thread.acrs[15] = (unsigned int) (data >> 32);
355 else
5a79859a 356 *(addr_t *)((addr_t) &child->thread.acrs + offset) = data;
1da177e4
LT
357
358 } else if (addr == (addr_t) &dummy->regs.orig_gpr2) {
359 /*
360 * orig_gpr2 is stored on the kernel stack
361 */
c7584fb6 362 task_pt_regs(child)->orig_gpr2 = data;
1da177e4 363
3d6e48f4
JW
364 } else if (addr < (addr_t) &dummy->regs.fp_regs) {
365 /*
366 * prevent writes of padding hole between
367 * orig_gpr2 and fp_regs on s390.
368 */
369 return 0;
370
86c558e8
MS
371 } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) {
372 /*
373 * floating point control reg. is in the thread structure
374 */
375 if ((unsigned int) data != 0 ||
376 test_fp_ctl(data >> (BITS_PER_LONG - 32)))
377 return -EINVAL;
904818e2 378 child->thread.fpu.fpc = data >> (BITS_PER_LONG - 32);
86c558e8 379
1da177e4
LT
380 } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) {
381 /*
904818e2
HB
382 * floating point regs. are either in child->thread.fpu
383 * or the child->thread.fpu.vxrs array
1da177e4 384 */
86c558e8 385 offset = addr - (addr_t) &dummy->regs.fp_regs.fprs;
b5510d9b 386 if (MACHINE_HAS_VX)
86c558e8 387 *(addr_t *)((addr_t)
904818e2 388 child->thread.fpu.vxrs + 2*offset) = data;
86c558e8 389 else
86c558e8 390 *(addr_t *)((addr_t)
55a423b6 391 child->thread.fpu.fprs + offset) = data;
1da177e4
LT
392
393 } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) {
394 /*
5e9a2692 395 * Handle access to the per_info structure.
1da177e4 396 */
5e9a2692
MS
397 addr -= (addr_t) &dummy->regs.per_info;
398 __poke_user_per(child, addr, data);
1da177e4
LT
399
400 }
401
1da177e4
LT
402 return 0;
403}
404
5e9a2692 405static int poke_user(struct task_struct *child, addr_t addr, addr_t data)
63506c41 406{
63506c41
MS
407 addr_t mask;
408
409 /*
410 * Stupid gdb peeks/pokes the access registers in 64 bit with
411 * an alignment of 4. Programmers from hell indeed...
412 */
413 mask = __ADDR_MASK;
547e3cec
MS
414 if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
415 addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
63506c41 416 mask = 3;
63506c41
MS
417 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
418 return -EIO;
419
420 return __poke_user(child, addr, data);
421}
422
9b05a69e
NK
423long arch_ptrace(struct task_struct *child, long request,
424 unsigned long addr, unsigned long data)
1da177e4 425{
1da177e4
LT
426 ptrace_area parea;
427 int copied, ret;
428
429 switch (request) {
1da177e4
LT
430 case PTRACE_PEEKUSR:
431 /* read the word at location addr in the USER area. */
432 return peek_user(child, addr, data);
433
1da177e4
LT
434 case PTRACE_POKEUSR:
435 /* write the word at location addr in the USER area */
436 return poke_user(child, addr, data);
437
438 case PTRACE_PEEKUSR_AREA:
439 case PTRACE_POKEUSR_AREA:
2b67fc46 440 if (copy_from_user(&parea, (void __force __user *) addr,
1da177e4
LT
441 sizeof(parea)))
442 return -EFAULT;
443 addr = parea.kernel_addr;
444 data = parea.process_addr;
445 copied = 0;
446 while (copied < parea.len) {
447 if (request == PTRACE_PEEKUSR_AREA)
448 ret = peek_user(child, addr, data);
449 else {
2b67fc46
HC
450 addr_t utmp;
451 if (get_user(utmp,
452 (addr_t __force __user *) data))
1da177e4 453 return -EFAULT;
2b67fc46 454 ret = poke_user(child, addr, utmp);
1da177e4
LT
455 }
456 if (ret)
457 return ret;
458 addr += sizeof(unsigned long);
459 data += sizeof(unsigned long);
460 copied += sizeof(unsigned long);
461 }
462 return 0;
86f2552b
MS
463 case PTRACE_GET_LAST_BREAK:
464 put_user(task_thread_info(child)->last_break,
465 (unsigned long __user *) data);
466 return 0;
d35339a4
MS
467 case PTRACE_ENABLE_TE:
468 if (!MACHINE_HAS_TE)
469 return -EIO;
470 child->thread.per_flags &= ~PER_FLAG_NO_TE;
471 return 0;
472 case PTRACE_DISABLE_TE:
473 if (!MACHINE_HAS_TE)
474 return -EIO;
475 child->thread.per_flags |= PER_FLAG_NO_TE;
64597f9d
MM
476 child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND;
477 return 0;
478 case PTRACE_TE_ABORT_RAND:
479 if (!MACHINE_HAS_TE || (child->thread.per_flags & PER_FLAG_NO_TE))
480 return -EIO;
481 switch (data) {
482 case 0UL:
483 child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND;
484 break;
485 case 1UL:
486 child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND;
487 child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND_TEND;
488 break;
489 case 2UL:
490 child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND;
491 child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND_TEND;
492 break;
493 default:
494 return -EINVAL;
495 }
d35339a4 496 return 0;
07805ac8 497 default:
07805ac8 498 return ptrace_request(child, request, addr, data);
1da177e4 499 }
1da177e4
LT
500}
501
347a8dc3 502#ifdef CONFIG_COMPAT
1da177e4
LT
503/*
504 * Now the fun part starts... a 31 bit program running in the
505 * 31 bit emulation tracing another program. PTRACE_PEEKTEXT,
506 * PTRACE_PEEKDATA, PTRACE_POKETEXT and PTRACE_POKEDATA are easy
507 * to handle, the difference to the 64 bit versions of the requests
508 * is that the access is done in multiples of 4 byte instead of
509 * 8 bytes (sizeof(unsigned long) on 31/64 bit).
510 * The ugly part are PTRACE_PEEKUSR, PTRACE_PEEKUSR_AREA,
511 * PTRACE_POKEUSR and PTRACE_POKEUSR_AREA. If the traced program
512 * is a 31 bit program too, the content of struct user can be
513 * emulated. A 31 bit program peeking into the struct user of
514 * a 64 bit program is a no-no.
515 */
516
5e9a2692
MS
517/*
518 * Same as peek_user_per but for a 31 bit program.
519 */
520static inline __u32 __peek_user_per_compat(struct task_struct *child,
521 addr_t addr)
522{
523 struct compat_per_struct_kernel *dummy32 = NULL;
524
525 if (addr == (addr_t) &dummy32->cr9)
526 /* Control bits of the active per set. */
527 return (__u32) test_thread_flag(TIF_SINGLE_STEP) ?
528 PER_EVENT_IFETCH : child->thread.per_user.control;
529 else if (addr == (addr_t) &dummy32->cr10)
530 /* Start address of the active per set. */
531 return (__u32) test_thread_flag(TIF_SINGLE_STEP) ?
532 0 : child->thread.per_user.start;
533 else if (addr == (addr_t) &dummy32->cr11)
534 /* End address of the active per set. */
535 return test_thread_flag(TIF_SINGLE_STEP) ?
536 PSW32_ADDR_INSN : child->thread.per_user.end;
537 else if (addr == (addr_t) &dummy32->bits)
538 /* Single-step bit. */
539 return (__u32) test_thread_flag(TIF_SINGLE_STEP) ?
540 0x80000000 : 0;
541 else if (addr == (addr_t) &dummy32->starting_addr)
542 /* Start address of the user specified per set. */
543 return (__u32) child->thread.per_user.start;
544 else if (addr == (addr_t) &dummy32->ending_addr)
545 /* End address of the user specified per set. */
546 return (__u32) child->thread.per_user.end;
547 else if (addr == (addr_t) &dummy32->perc_atmid)
548 /* PER code, ATMID and AI of the last PER trap */
549 return (__u32) child->thread.per_event.cause << 16;
550 else if (addr == (addr_t) &dummy32->address)
551 /* Address of the last PER trap */
552 return (__u32) child->thread.per_event.address;
553 else if (addr == (addr_t) &dummy32->access_id)
554 /* Access id of the last PER trap */
555 return (__u32) child->thread.per_event.paid << 24;
556 return 0;
557}
558
1da177e4
LT
559/*
560 * Same as peek_user but for a 31 bit program.
561 */
63506c41 562static u32 __peek_user_compat(struct task_struct *child, addr_t addr)
1da177e4 563{
5e9a2692 564 struct compat_user *dummy32 = NULL;
1da177e4
LT
565 addr_t offset;
566 __u32 tmp;
567
1da177e4 568 if (addr < (addr_t) &dummy32->regs.acrs) {
b50511e4 569 struct pt_regs *regs = task_pt_regs(child);
1da177e4
LT
570 /*
571 * psw and gprs are stored on the stack
572 */
573 if (addr == (addr_t) &dummy32->regs.psw.mask) {
574 /* Fake a 31 bit psw mask. */
b50511e4 575 tmp = (__u32)(regs->psw.mask >> 32);
5ebf250d 576 tmp &= PSW32_MASK_USER | PSW32_MASK_RI;
f26946d7 577 tmp |= PSW32_USER_BITS;
1da177e4
LT
578 } else if (addr == (addr_t) &dummy32->regs.psw.addr) {
579 /* Fake a 31 bit psw address. */
d4e81b35
MS
580 tmp = (__u32) regs->psw.addr |
581 (__u32)(regs->psw.mask & PSW_MASK_BA);
1da177e4
LT
582 } else {
583 /* gpr 0-15 */
b50511e4 584 tmp = *(__u32 *)((addr_t) &regs->psw + addr*2 + 4);
1da177e4
LT
585 }
586 } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) {
587 /*
588 * access registers are stored in the thread structure
589 */
590 offset = addr - (addr_t) &dummy32->regs.acrs;
591 tmp = *(__u32*)((addr_t) &child->thread.acrs + offset);
592
593 } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) {
594 /*
595 * orig_gpr2 is stored on the kernel stack
596 */
c7584fb6 597 tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4);
1da177e4 598
3d6e48f4
JW
599 } else if (addr < (addr_t) &dummy32->regs.fp_regs) {
600 /*
601 * prevent reads of padding hole between
602 * orig_gpr2 and fp_regs on s390.
603 */
604 tmp = 0;
605
86c558e8
MS
606 } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) {
607 /*
608 * floating point control reg. is in the thread structure
609 */
904818e2 610 tmp = child->thread.fpu.fpc;
86c558e8 611
1da177e4
LT
612 } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) {
613 /*
904818e2
HB
614 * floating point regs. are either in child->thread.fpu
615 * or the child->thread.fpu.vxrs array
1da177e4 616 */
86c558e8 617 offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs;
b5510d9b 618 if (MACHINE_HAS_VX)
86c558e8 619 tmp = *(__u32 *)
904818e2 620 ((addr_t) child->thread.fpu.vxrs + 2*offset);
86c558e8 621 else
86c558e8 622 tmp = *(__u32 *)
55a423b6 623 ((addr_t) child->thread.fpu.fprs + offset);
1da177e4
LT
624
625 } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) {
626 /*
5e9a2692 627 * Handle access to the per_info structure.
1da177e4 628 */
5e9a2692
MS
629 addr -= (addr_t) &dummy32->regs.per_info;
630 tmp = __peek_user_per_compat(child, addr);
1da177e4
LT
631
632 } else
633 tmp = 0;
634
63506c41
MS
635 return tmp;
636}
637
638static int peek_user_compat(struct task_struct *child,
639 addr_t addr, addr_t data)
640{
641 __u32 tmp;
642
7757591a 643 if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user) - 3)
63506c41
MS
644 return -EIO;
645
646 tmp = __peek_user_compat(child, addr);
1da177e4
LT
647 return put_user(tmp, (__u32 __user *) data);
648}
649
5e9a2692
MS
650/*
651 * Same as poke_user_per but for a 31 bit program.
652 */
653static inline void __poke_user_per_compat(struct task_struct *child,
654 addr_t addr, __u32 data)
655{
656 struct compat_per_struct_kernel *dummy32 = NULL;
657
658 if (addr == (addr_t) &dummy32->cr9)
659 /* PER event mask of the user specified per set. */
660 child->thread.per_user.control =
661 data & (PER_EVENT_MASK | PER_CONTROL_MASK);
662 else if (addr == (addr_t) &dummy32->starting_addr)
663 /* Starting address of the user specified per set. */
664 child->thread.per_user.start = data;
665 else if (addr == (addr_t) &dummy32->ending_addr)
666 /* Ending address of the user specified per set. */
667 child->thread.per_user.end = data;
668}
669
1da177e4
LT
670/*
671 * Same as poke_user but for a 31 bit program.
672 */
63506c41
MS
673static int __poke_user_compat(struct task_struct *child,
674 addr_t addr, addr_t data)
1da177e4 675{
5e9a2692 676 struct compat_user *dummy32 = NULL;
63506c41 677 __u32 tmp = (__u32) data;
1da177e4 678 addr_t offset;
1da177e4
LT
679
680 if (addr < (addr_t) &dummy32->regs.acrs) {
b50511e4 681 struct pt_regs *regs = task_pt_regs(child);
1da177e4
LT
682 /*
683 * psw, gprs, acrs and orig_gpr2 are stored on the stack
684 */
685 if (addr == (addr_t) &dummy32->regs.psw.mask) {
5ebf250d
HC
686 __u32 mask = PSW32_MASK_USER;
687
688 mask |= is_ri_task(child) ? PSW32_MASK_RI : 0;
1da177e4 689 /* Build a 64 bit psw mask from 31 bit mask. */
dab6cf55 690 if ((tmp ^ PSW32_USER_BITS) & ~mask)
1da177e4
LT
691 /* Invalid psw mask. */
692 return -EINVAL;
dab6cf55
MS
693 if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME)
694 /* Invalid address-space-control bits */
695 return -EINVAL;
b50511e4 696 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
d4e81b35 697 (regs->psw.mask & PSW_MASK_BA) |
5ebf250d 698 (__u64)(tmp & mask) << 32;
1da177e4
LT
699 } else if (addr == (addr_t) &dummy32->regs.psw.addr) {
700 /* Build a 64 bit psw address from 31 bit address. */
b50511e4 701 regs->psw.addr = (__u64) tmp & PSW32_ADDR_INSN;
d4e81b35
MS
702 /* Transfer 31 bit amode bit to psw mask. */
703 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) |
704 (__u64)(tmp & PSW32_ADDR_AMODE);
1da177e4
LT
705 } else {
706 /* gpr 0-15 */
b50511e4 707 *(__u32*)((addr_t) &regs->psw + addr*2 + 4) = tmp;
1da177e4
LT
708 }
709 } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) {
710 /*
711 * access registers are stored in the thread structure
712 */
713 offset = addr - (addr_t) &dummy32->regs.acrs;
714 *(__u32*)((addr_t) &child->thread.acrs + offset) = tmp;
715
716 } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) {
717 /*
718 * orig_gpr2 is stored on the kernel stack
719 */
c7584fb6 720 *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp;
1da177e4 721
3d6e48f4
JW
722 } else if (addr < (addr_t) &dummy32->regs.fp_regs) {
723 /*
724 * prevent writess of padding hole between
725 * orig_gpr2 and fp_regs on s390.
726 */
727 return 0;
728
86c558e8 729 } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) {
1da177e4 730 /*
86c558e8 731 * floating point control reg. is in the thread structure
1da177e4 732 */
86c558e8 733 if (test_fp_ctl(tmp))
1da177e4 734 return -EINVAL;
904818e2 735 child->thread.fpu.fpc = data;
86c558e8
MS
736
737 } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) {
738 /*
904818e2
HB
739 * floating point regs. are either in child->thread.fpu
740 * or the child->thread.fpu.vxrs array
86c558e8
MS
741 */
742 offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs;
b5510d9b 743 if (MACHINE_HAS_VX)
86c558e8 744 *(__u32 *)((addr_t)
904818e2 745 child->thread.fpu.vxrs + 2*offset) = tmp;
86c558e8 746 else
86c558e8 747 *(__u32 *)((addr_t)
55a423b6 748 child->thread.fpu.fprs + offset) = tmp;
1da177e4
LT
749
750 } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) {
751 /*
5e9a2692 752 * Handle access to the per_info structure.
1da177e4 753 */
5e9a2692
MS
754 addr -= (addr_t) &dummy32->regs.per_info;
755 __poke_user_per_compat(child, addr, data);
1da177e4
LT
756 }
757
1da177e4
LT
758 return 0;
759}
760
63506c41
MS
761static int poke_user_compat(struct task_struct *child,
762 addr_t addr, addr_t data)
763{
5e9a2692
MS
764 if (!is_compat_task() || (addr & 3) ||
765 addr > sizeof(struct compat_user) - 3)
63506c41
MS
766 return -EIO;
767
768 return __poke_user_compat(child, addr, data);
769}
770
b499d76b
RM
771long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
772 compat_ulong_t caddr, compat_ulong_t cdata)
1da177e4 773{
b499d76b
RM
774 unsigned long addr = caddr;
775 unsigned long data = cdata;
5e9a2692 776 compat_ptrace_area parea;
1da177e4
LT
777 int copied, ret;
778
779 switch (request) {
1da177e4
LT
780 case PTRACE_PEEKUSR:
781 /* read the word at location addr in the USER area. */
63506c41 782 return peek_user_compat(child, addr, data);
1da177e4 783
1da177e4
LT
784 case PTRACE_POKEUSR:
785 /* write the word at location addr in the USER area */
63506c41 786 return poke_user_compat(child, addr, data);
1da177e4
LT
787
788 case PTRACE_PEEKUSR_AREA:
789 case PTRACE_POKEUSR_AREA:
2b67fc46 790 if (copy_from_user(&parea, (void __force __user *) addr,
1da177e4
LT
791 sizeof(parea)))
792 return -EFAULT;
793 addr = parea.kernel_addr;
794 data = parea.process_addr;
795 copied = 0;
796 while (copied < parea.len) {
797 if (request == PTRACE_PEEKUSR_AREA)
63506c41 798 ret = peek_user_compat(child, addr, data);
1da177e4 799 else {
2b67fc46
HC
800 __u32 utmp;
801 if (get_user(utmp,
802 (__u32 __force __user *) data))
1da177e4 803 return -EFAULT;
63506c41 804 ret = poke_user_compat(child, addr, utmp);
1da177e4
LT
805 }
806 if (ret)
807 return ret;
808 addr += sizeof(unsigned int);
809 data += sizeof(unsigned int);
810 copied += sizeof(unsigned int);
811 }
812 return 0;
86f2552b
MS
813 case PTRACE_GET_LAST_BREAK:
814 put_user(task_thread_info(child)->last_break,
815 (unsigned int __user *) data);
816 return 0;
1da177e4 817 }
b499d76b 818 return compat_ptrace_request(child, request, addr, data);
1da177e4
LT
819}
820#endif
821
753c4dd6 822asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
1da177e4 823{
c5c3a6d8 824 /*
753c4dd6
MS
825 * The sysc_tracesys code in entry.S stored the system
826 * call number to gprs[2].
c5c3a6d8 827 */
753c4dd6
MS
828 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
829 (tracehook_report_syscall_entry(regs) ||
830 regs->gprs[2] >= NR_syscalls)) {
831 /*
832 * Tracing decided this syscall should not happen or the
833 * debugger stored an invalid system call number. Skip
834 * the system call and the system call restart handling.
835 */
d3a73acb 836 clear_pt_regs_flag(regs, PIF_SYSCALL);
0208b944
KC
837 return -1;
838 }
839
840 /* Do the secure computing check after ptrace. */
841 if (secure_computing(NULL)) {
842 /* seccomp failures shouldn't expose any additional code. */
843 return -1;
1da177e4 844 }
753c4dd6 845
66700001 846 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1c569f02 847 trace_sys_enter(regs, regs->gprs[2]);
9bf1226b 848
91397401 849 audit_syscall_entry(regs->gprs[2], regs->orig_gpr2,
b05d8447
EP
850 regs->gprs[3], regs->gprs[4],
851 regs->gprs[5]);
0208b944
KC
852
853 return regs->gprs[2];
753c4dd6
MS
854}
855
856asmlinkage void do_syscall_trace_exit(struct pt_regs *regs)
857{
d7e7528b 858 audit_syscall_exit(regs);
753c4dd6 859
66700001 860 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1c569f02 861 trace_sys_exit(regs, regs->gprs[2]);
9bf1226b 862
753c4dd6
MS
863 if (test_thread_flag(TIF_SYSCALL_TRACE))
864 tracehook_report_syscall_exit(regs, 0);
1da177e4 865}
63506c41
MS
866
867/*
868 * user_regset definitions.
869 */
870
871static int s390_regs_get(struct task_struct *target,
872 const struct user_regset *regset,
873 unsigned int pos, unsigned int count,
874 void *kbuf, void __user *ubuf)
875{
876 if (target == current)
877 save_access_regs(target->thread.acrs);
878
879 if (kbuf) {
880 unsigned long *k = kbuf;
881 while (count > 0) {
882 *k++ = __peek_user(target, pos);
883 count -= sizeof(*k);
884 pos += sizeof(*k);
885 }
886 } else {
887 unsigned long __user *u = ubuf;
888 while (count > 0) {
889 if (__put_user(__peek_user(target, pos), u++))
890 return -EFAULT;
891 count -= sizeof(*u);
892 pos += sizeof(*u);
893 }
894 }
895 return 0;
896}
897
898static int s390_regs_set(struct task_struct *target,
899 const struct user_regset *regset,
900 unsigned int pos, unsigned int count,
901 const void *kbuf, const void __user *ubuf)
902{
903 int rc = 0;
904
905 if (target == current)
906 save_access_regs(target->thread.acrs);
907
908 if (kbuf) {
909 const unsigned long *k = kbuf;
910 while (count > 0 && !rc) {
911 rc = __poke_user(target, pos, *k++);
912 count -= sizeof(*k);
913 pos += sizeof(*k);
914 }
915 } else {
916 const unsigned long __user *u = ubuf;
917 while (count > 0 && !rc) {
918 unsigned long word;
919 rc = __get_user(word, u++);
920 if (rc)
921 break;
922 rc = __poke_user(target, pos, word);
923 count -= sizeof(*u);
924 pos += sizeof(*u);
925 }
926 }
927
928 if (rc == 0 && target == current)
929 restore_access_regs(target->thread.acrs);
930
931 return rc;
932}
933
934static int s390_fpregs_get(struct task_struct *target,
935 const struct user_regset *regset, unsigned int pos,
936 unsigned int count, void *kbuf, void __user *ubuf)
937{
904818e2
HB
938 _s390_fp_regs fp_regs;
939
940 if (target == current)
d0164ee2 941 save_fpu_regs();
904818e2
HB
942
943 fp_regs.fpc = target->thread.fpu.fpc;
944 fpregs_store(&fp_regs, &target->thread.fpu);
63506c41
MS
945
946 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
904818e2 947 &fp_regs, 0, -1);
63506c41
MS
948}
949
950static int s390_fpregs_set(struct task_struct *target,
951 const struct user_regset *regset, unsigned int pos,
952 unsigned int count, const void *kbuf,
953 const void __user *ubuf)
954{
955 int rc = 0;
904818e2 956 freg_t fprs[__NUM_FPRS];
63506c41 957
904818e2 958 if (target == current)
d0164ee2 959 save_fpu_regs();
63506c41
MS
960
961 /* If setting FPC, must validate it first. */
962 if (count > 0 && pos < offsetof(s390_fp_regs, fprs)) {
904818e2 963 u32 ufpc[2] = { target->thread.fpu.fpc, 0 };
4725c860 964 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ufpc,
63506c41
MS
965 0, offsetof(s390_fp_regs, fprs));
966 if (rc)
967 return rc;
4725c860 968 if (ufpc[1] != 0 || test_fp_ctl(ufpc[0]))
63506c41 969 return -EINVAL;
904818e2 970 target->thread.fpu.fpc = ufpc[0];
63506c41
MS
971 }
972
973 if (rc == 0 && count > 0)
974 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
904818e2
HB
975 fprs, offsetof(s390_fp_regs, fprs), -1);
976 if (rc)
977 return rc;
63506c41 978
b5510d9b 979 if (MACHINE_HAS_VX)
904818e2
HB
980 convert_fp_to_vx(target->thread.fpu.vxrs, fprs);
981 else
982 memcpy(target->thread.fpu.fprs, &fprs, sizeof(fprs));
983
63506c41
MS
984 return rc;
985}
986
86f2552b
MS
987static int s390_last_break_get(struct task_struct *target,
988 const struct user_regset *regset,
989 unsigned int pos, unsigned int count,
990 void *kbuf, void __user *ubuf)
991{
992 if (count > 0) {
993 if (kbuf) {
994 unsigned long *k = kbuf;
995 *k = task_thread_info(target)->last_break;
996 } else {
997 unsigned long __user *u = ubuf;
998 if (__put_user(task_thread_info(target)->last_break, u))
999 return -EFAULT;
1000 }
1001 }
1002 return 0;
1003}
1004
b934069c
MS
1005static int s390_last_break_set(struct task_struct *target,
1006 const struct user_regset *regset,
1007 unsigned int pos, unsigned int count,
1008 const void *kbuf, const void __user *ubuf)
1009{
1010 return 0;
1011}
1012
d35339a4
MS
1013static int s390_tdb_get(struct task_struct *target,
1014 const struct user_regset *regset,
1015 unsigned int pos, unsigned int count,
1016 void *kbuf, void __user *ubuf)
1017{
1018 struct pt_regs *regs = task_pt_regs(target);
1019 unsigned char *data;
1020
1021 if (!(regs->int_code & 0x200))
1022 return -ENODATA;
1023 data = target->thread.trap_tdb;
1024 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, data, 0, 256);
1025}
1026
1027static int s390_tdb_set(struct task_struct *target,
1028 const struct user_regset *regset,
1029 unsigned int pos, unsigned int count,
1030 const void *kbuf, const void __user *ubuf)
1031{
1032 return 0;
1033}
1034
80703617
MS
1035static int s390_vxrs_low_get(struct task_struct *target,
1036 const struct user_regset *regset,
1037 unsigned int pos, unsigned int count,
1038 void *kbuf, void __user *ubuf)
1039{
1040 __u64 vxrs[__NUM_VXRS_LOW];
1041 int i;
1042
7490daf0
MS
1043 if (!MACHINE_HAS_VX)
1044 return -ENODEV;
b5510d9b
HB
1045 if (target == current)
1046 save_fpu_regs();
1047 for (i = 0; i < __NUM_VXRS_LOW; i++)
1048 vxrs[i] = *((__u64 *)(target->thread.fpu.vxrs + i) + 1);
80703617
MS
1049 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1);
1050}
1051
1052static int s390_vxrs_low_set(struct task_struct *target,
1053 const struct user_regset *regset,
1054 unsigned int pos, unsigned int count,
1055 const void *kbuf, const void __user *ubuf)
1056{
1057 __u64 vxrs[__NUM_VXRS_LOW];
1058 int i, rc;
1059
7490daf0
MS
1060 if (!MACHINE_HAS_VX)
1061 return -ENODEV;
b5510d9b 1062 if (target == current)
d0164ee2 1063 save_fpu_regs();
80703617
MS
1064
1065 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1);
9977e886 1066 if (rc == 0)
80703617 1067 for (i = 0; i < __NUM_VXRS_LOW; i++)
904818e2 1068 *((__u64 *)(target->thread.fpu.vxrs + i) + 1) = vxrs[i];
80703617
MS
1069
1070 return rc;
1071}
1072
1073static int s390_vxrs_high_get(struct task_struct *target,
1074 const struct user_regset *regset,
1075 unsigned int pos, unsigned int count,
1076 void *kbuf, void __user *ubuf)
1077{
1078 __vector128 vxrs[__NUM_VXRS_HIGH];
1079
7490daf0
MS
1080 if (!MACHINE_HAS_VX)
1081 return -ENODEV;
b5510d9b
HB
1082 if (target == current)
1083 save_fpu_regs();
1084 memcpy(vxrs, target->thread.fpu.vxrs + __NUM_VXRS_LOW, sizeof(vxrs));
1085
80703617
MS
1086 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1);
1087}
1088
1089static int s390_vxrs_high_set(struct task_struct *target,
1090 const struct user_regset *regset,
1091 unsigned int pos, unsigned int count,
1092 const void *kbuf, const void __user *ubuf)
1093{
1094 int rc;
1095
7490daf0
MS
1096 if (!MACHINE_HAS_VX)
1097 return -ENODEV;
b5510d9b 1098 if (target == current)
d0164ee2 1099 save_fpu_regs();
80703617
MS
1100
1101 rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
904818e2 1102 target->thread.fpu.vxrs + __NUM_VXRS_LOW, 0, -1);
80703617
MS
1103 return rc;
1104}
1105
20b40a79
MS
1106static int s390_system_call_get(struct task_struct *target,
1107 const struct user_regset *regset,
1108 unsigned int pos, unsigned int count,
1109 void *kbuf, void __user *ubuf)
1110{
1111 unsigned int *data = &task_thread_info(target)->system_call;
1112 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1113 data, 0, sizeof(unsigned int));
1114}
1115
1116static int s390_system_call_set(struct task_struct *target,
1117 const struct user_regset *regset,
1118 unsigned int pos, unsigned int count,
1119 const void *kbuf, const void __user *ubuf)
1120{
1121 unsigned int *data = &task_thread_info(target)->system_call;
1122 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1123 data, 0, sizeof(unsigned int));
1124}
1125
63506c41 1126static const struct user_regset s390_regsets[] = {
80703617 1127 {
63506c41
MS
1128 .core_note_type = NT_PRSTATUS,
1129 .n = sizeof(s390_regs) / sizeof(long),
1130 .size = sizeof(long),
1131 .align = sizeof(long),
1132 .get = s390_regs_get,
1133 .set = s390_regs_set,
1134 },
80703617 1135 {
63506c41
MS
1136 .core_note_type = NT_PRFPREG,
1137 .n = sizeof(s390_fp_regs) / sizeof(long),
1138 .size = sizeof(long),
1139 .align = sizeof(long),
1140 .get = s390_fpregs_get,
1141 .set = s390_fpregs_set,
1142 },
80703617
MS
1143 {
1144 .core_note_type = NT_S390_SYSTEM_CALL,
1145 .n = 1,
1146 .size = sizeof(unsigned int),
1147 .align = sizeof(unsigned int),
1148 .get = s390_system_call_get,
1149 .set = s390_system_call_set,
1150 },
80703617 1151 {
86f2552b
MS
1152 .core_note_type = NT_S390_LAST_BREAK,
1153 .n = 1,
1154 .size = sizeof(long),
1155 .align = sizeof(long),
1156 .get = s390_last_break_get,
b934069c 1157 .set = s390_last_break_set,
86f2552b 1158 },
80703617 1159 {
d35339a4
MS
1160 .core_note_type = NT_S390_TDB,
1161 .n = 1,
1162 .size = 256,
1163 .align = 1,
1164 .get = s390_tdb_get,
1165 .set = s390_tdb_set,
1166 },
80703617
MS
1167 {
1168 .core_note_type = NT_S390_VXRS_LOW,
1169 .n = __NUM_VXRS_LOW,
1170 .size = sizeof(__u64),
1171 .align = sizeof(__u64),
80703617
MS
1172 .get = s390_vxrs_low_get,
1173 .set = s390_vxrs_low_set,
20b40a79 1174 },
80703617
MS
1175 {
1176 .core_note_type = NT_S390_VXRS_HIGH,
1177 .n = __NUM_VXRS_HIGH,
1178 .size = sizeof(__vector128),
1179 .align = sizeof(__vector128),
80703617
MS
1180 .get = s390_vxrs_high_get,
1181 .set = s390_vxrs_high_set,
20b40a79 1182 },
63506c41
MS
1183};
1184
1185static const struct user_regset_view user_s390_view = {
1186 .name = UTS_MACHINE,
1187 .e_machine = EM_S390,
1188 .regsets = s390_regsets,
1189 .n = ARRAY_SIZE(s390_regsets)
1190};
1191
1192#ifdef CONFIG_COMPAT
1193static int s390_compat_regs_get(struct task_struct *target,
1194 const struct user_regset *regset,
1195 unsigned int pos, unsigned int count,
1196 void *kbuf, void __user *ubuf)
1197{
1198 if (target == current)
1199 save_access_regs(target->thread.acrs);
1200
1201 if (kbuf) {
1202 compat_ulong_t *k = kbuf;
1203 while (count > 0) {
1204 *k++ = __peek_user_compat(target, pos);
1205 count -= sizeof(*k);
1206 pos += sizeof(*k);
1207 }
1208 } else {
1209 compat_ulong_t __user *u = ubuf;
1210 while (count > 0) {
1211 if (__put_user(__peek_user_compat(target, pos), u++))
1212 return -EFAULT;
1213 count -= sizeof(*u);
1214 pos += sizeof(*u);
1215 }
1216 }
1217 return 0;
1218}
1219
1220static int s390_compat_regs_set(struct task_struct *target,
1221 const struct user_regset *regset,
1222 unsigned int pos, unsigned int count,
1223 const void *kbuf, const void __user *ubuf)
1224{
1225 int rc = 0;
1226
1227 if (target == current)
1228 save_access_regs(target->thread.acrs);
1229
1230 if (kbuf) {
1231 const compat_ulong_t *k = kbuf;
1232 while (count > 0 && !rc) {
1233 rc = __poke_user_compat(target, pos, *k++);
1234 count -= sizeof(*k);
1235 pos += sizeof(*k);
1236 }
1237 } else {
1238 const compat_ulong_t __user *u = ubuf;
1239 while (count > 0 && !rc) {
1240 compat_ulong_t word;
1241 rc = __get_user(word, u++);
1242 if (rc)
1243 break;
1244 rc = __poke_user_compat(target, pos, word);
1245 count -= sizeof(*u);
1246 pos += sizeof(*u);
1247 }
1248 }
1249
1250 if (rc == 0 && target == current)
1251 restore_access_regs(target->thread.acrs);
1252
1253 return rc;
1254}
1255
ea2a4d3a
HC
1256static int s390_compat_regs_high_get(struct task_struct *target,
1257 const struct user_regset *regset,
1258 unsigned int pos, unsigned int count,
1259 void *kbuf, void __user *ubuf)
1260{
1261 compat_ulong_t *gprs_high;
1262
1263 gprs_high = (compat_ulong_t *)
1264 &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)];
1265 if (kbuf) {
1266 compat_ulong_t *k = kbuf;
1267 while (count > 0) {
1268 *k++ = *gprs_high;
1269 gprs_high += 2;
1270 count -= sizeof(*k);
1271 }
1272 } else {
1273 compat_ulong_t __user *u = ubuf;
1274 while (count > 0) {
1275 if (__put_user(*gprs_high, u++))
1276 return -EFAULT;
1277 gprs_high += 2;
1278 count -= sizeof(*u);
1279 }
1280 }
1281 return 0;
1282}
1283
1284static int s390_compat_regs_high_set(struct task_struct *target,
1285 const struct user_regset *regset,
1286 unsigned int pos, unsigned int count,
1287 const void *kbuf, const void __user *ubuf)
1288{
1289 compat_ulong_t *gprs_high;
1290 int rc = 0;
1291
1292 gprs_high = (compat_ulong_t *)
1293 &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)];
1294 if (kbuf) {
1295 const compat_ulong_t *k = kbuf;
1296 while (count > 0) {
1297 *gprs_high = *k++;
1298 *gprs_high += 2;
1299 count -= sizeof(*k);
1300 }
1301 } else {
1302 const compat_ulong_t __user *u = ubuf;
1303 while (count > 0 && !rc) {
1304 unsigned long word;
1305 rc = __get_user(word, u++);
1306 if (rc)
1307 break;
1308 *gprs_high = word;
1309 *gprs_high += 2;
1310 count -= sizeof(*u);
1311 }
1312 }
1313
1314 return rc;
1315}
1316
86f2552b
MS
1317static int s390_compat_last_break_get(struct task_struct *target,
1318 const struct user_regset *regset,
1319 unsigned int pos, unsigned int count,
1320 void *kbuf, void __user *ubuf)
1321{
1322 compat_ulong_t last_break;
1323
1324 if (count > 0) {
1325 last_break = task_thread_info(target)->last_break;
1326 if (kbuf) {
1327 unsigned long *k = kbuf;
1328 *k = last_break;
1329 } else {
1330 unsigned long __user *u = ubuf;
1331 if (__put_user(last_break, u))
1332 return -EFAULT;
1333 }
1334 }
1335 return 0;
1336}
1337
b934069c
MS
1338static int s390_compat_last_break_set(struct task_struct *target,
1339 const struct user_regset *regset,
1340 unsigned int pos, unsigned int count,
1341 const void *kbuf, const void __user *ubuf)
1342{
1343 return 0;
1344}
1345
63506c41 1346static const struct user_regset s390_compat_regsets[] = {
80703617 1347 {
63506c41
MS
1348 .core_note_type = NT_PRSTATUS,
1349 .n = sizeof(s390_compat_regs) / sizeof(compat_long_t),
1350 .size = sizeof(compat_long_t),
1351 .align = sizeof(compat_long_t),
1352 .get = s390_compat_regs_get,
1353 .set = s390_compat_regs_set,
1354 },
80703617 1355 {
63506c41
MS
1356 .core_note_type = NT_PRFPREG,
1357 .n = sizeof(s390_fp_regs) / sizeof(compat_long_t),
1358 .size = sizeof(compat_long_t),
1359 .align = sizeof(compat_long_t),
1360 .get = s390_fpregs_get,
1361 .set = s390_fpregs_set,
1362 },
80703617
MS
1363 {
1364 .core_note_type = NT_S390_SYSTEM_CALL,
1365 .n = 1,
1366 .size = sizeof(compat_uint_t),
1367 .align = sizeof(compat_uint_t),
1368 .get = s390_system_call_get,
1369 .set = s390_system_call_set,
1370 },
1371 {
86f2552b
MS
1372 .core_note_type = NT_S390_LAST_BREAK,
1373 .n = 1,
1374 .size = sizeof(long),
1375 .align = sizeof(long),
1376 .get = s390_compat_last_break_get,
b934069c 1377 .set = s390_compat_last_break_set,
86f2552b 1378 },
80703617 1379 {
d35339a4
MS
1380 .core_note_type = NT_S390_TDB,
1381 .n = 1,
1382 .size = 256,
1383 .align = 1,
1384 .get = s390_tdb_get,
1385 .set = s390_tdb_set,
1386 },
80703617
MS
1387 {
1388 .core_note_type = NT_S390_VXRS_LOW,
1389 .n = __NUM_VXRS_LOW,
1390 .size = sizeof(__u64),
1391 .align = sizeof(__u64),
80703617
MS
1392 .get = s390_vxrs_low_get,
1393 .set = s390_vxrs_low_set,
1394 },
1395 {
1396 .core_note_type = NT_S390_VXRS_HIGH,
1397 .n = __NUM_VXRS_HIGH,
1398 .size = sizeof(__vector128),
1399 .align = sizeof(__vector128),
80703617
MS
1400 .get = s390_vxrs_high_get,
1401 .set = s390_vxrs_high_set,
20b40a79 1402 },
80703617 1403 {
622e99bf 1404 .core_note_type = NT_S390_HIGH_GPRS,
ea2a4d3a
HC
1405 .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t),
1406 .size = sizeof(compat_long_t),
1407 .align = sizeof(compat_long_t),
1408 .get = s390_compat_regs_high_get,
1409 .set = s390_compat_regs_high_set,
1410 },
63506c41
MS
1411};
1412
1413static const struct user_regset_view user_s390_compat_view = {
1414 .name = "s390",
1415 .e_machine = EM_S390,
1416 .regsets = s390_compat_regsets,
1417 .n = ARRAY_SIZE(s390_compat_regsets)
1418};
1419#endif
1420
1421const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1422{
1423#ifdef CONFIG_COMPAT
1424 if (test_tsk_thread_flag(task, TIF_31BIT))
1425 return &user_s390_compat_view;
1426#endif
1427 return &user_s390_view;
1428}
952974ac
HC
1429
1430static const char *gpr_names[NUM_GPRS] = {
1431 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1432 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1433};
1434
1435unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset)
1436{
1437 if (offset >= NUM_GPRS)
1438 return 0;
1439 return regs->gprs[offset];
1440}
1441
1442int regs_query_register_offset(const char *name)
1443{
1444 unsigned long offset;
1445
1446 if (!name || *name != 'r')
1447 return -EINVAL;
958d9072 1448 if (kstrtoul(name + 1, 10, &offset))
952974ac
HC
1449 return -EINVAL;
1450 if (offset >= NUM_GPRS)
1451 return -EINVAL;
1452 return offset;
1453}
1454
1455const char *regs_query_register_name(unsigned int offset)
1456{
1457 if (offset >= NUM_GPRS)
1458 return NULL;
1459 return gpr_names[offset];
1460}
1461
1462static int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
1463{
1464 unsigned long ksp = kernel_stack_pointer(regs);
1465
1466 return (addr & ~(THREAD_SIZE - 1)) == (ksp & ~(THREAD_SIZE - 1));
1467}
1468
1469/**
1470 * regs_get_kernel_stack_nth() - get Nth entry of the stack
1471 * @regs:pt_regs which contains kernel stack pointer.
1472 * @n:stack entry number.
1473 *
1474 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
1475 * is specifined by @regs. If the @n th entry is NOT in the kernel stack,
1476 * this returns 0.
1477 */
1478unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
1479{
1480 unsigned long addr;
1481
1482 addr = kernel_stack_pointer(regs) + n * sizeof(long);
1483 if (!regs_within_kernel_stack(regs, addr))
1484 return 0;
1485 return *(unsigned long *)addr;
1486}
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