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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
255acee7 | 4 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 LT |
5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
8 | * | |
9 | * based on other smp stuff by | |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> | |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
25 | ||
26 | #include <linux/mm.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/kernel_stat.h> | |
29 | #include <linux/smp_lock.h> | |
30 | ||
31 | #include <linux/delay.h> | |
32 | #include <linux/cache.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/cpu.h> | |
35 | ||
36 | #include <asm/sigp.h> | |
37 | #include <asm/pgalloc.h> | |
38 | #include <asm/irq.h> | |
39 | #include <asm/s390_ext.h> | |
40 | #include <asm/cpcmd.h> | |
41 | #include <asm/tlbflush.h> | |
42 | ||
1da177e4 LT |
43 | extern volatile int __cpu_logical_map[]; |
44 | ||
45 | /* | |
46 | * An array with a pointer the lowcore of every CPU. | |
47 | */ | |
48 | ||
49 | struct _lowcore *lowcore_ptr[NR_CPUS]; | |
50 | ||
255acee7 HC |
51 | cpumask_t cpu_online_map = CPU_MASK_NONE; |
52 | cpumask_t cpu_possible_map = CPU_MASK_NONE; | |
1da177e4 LT |
53 | |
54 | static struct task_struct *current_set[NR_CPUS]; | |
55 | ||
1da177e4 LT |
56 | /* |
57 | * Reboot, halt and power_off routines for SMP. | |
58 | */ | |
59 | extern char vmhalt_cmd[]; | |
60 | extern char vmpoff_cmd[]; | |
61 | ||
1da177e4 LT |
62 | static void smp_ext_bitcall(int, ec_bit_sig); |
63 | static void smp_ext_bitcall_others(ec_bit_sig); | |
64 | ||
65 | /* | |
66 | * Structure and data for smp_call_function(). This is designed to minimise | |
67 | * static memory requirements. It also looks cleaner. | |
68 | */ | |
69 | static DEFINE_SPINLOCK(call_lock); | |
70 | ||
71 | struct call_data_struct { | |
72 | void (*func) (void *info); | |
73 | void *info; | |
74 | atomic_t started; | |
75 | atomic_t finished; | |
76 | int wait; | |
77 | }; | |
78 | ||
79 | static struct call_data_struct * call_data; | |
80 | ||
81 | /* | |
82 | * 'Call function' interrupt callback | |
83 | */ | |
84 | static void do_call_function(void) | |
85 | { | |
86 | void (*func) (void *info) = call_data->func; | |
87 | void *info = call_data->info; | |
88 | int wait = call_data->wait; | |
89 | ||
90 | atomic_inc(&call_data->started); | |
91 | (*func)(info); | |
92 | if (wait) | |
93 | atomic_inc(&call_data->finished); | |
94 | } | |
95 | ||
96 | /* | |
97 | * this function sends a 'generic call function' IPI to all other CPUs | |
98 | * in the system. | |
99 | */ | |
100 | ||
101 | int smp_call_function (void (*func) (void *info), void *info, int nonatomic, | |
102 | int wait) | |
103 | /* | |
104 | * [SUMMARY] Run a function on all other CPUs. | |
105 | * <func> The function to run. This must be fast and non-blocking. | |
106 | * <info> An arbitrary pointer to pass to the function. | |
107 | * <nonatomic> currently unused. | |
108 | * <wait> If true, wait (atomically) until function has completed on other CPUs. | |
109 | * [RETURNS] 0 on success, else a negative status code. Does not return until | |
110 | * remote CPUs are nearly ready to execute <<func>> or are or have executed. | |
111 | * | |
112 | * You must not call this function with disabled interrupts or from a | |
113 | * hardware interrupt handler or from a bottom half handler. | |
114 | */ | |
115 | { | |
116 | struct call_data_struct data; | |
117 | int cpus = num_online_cpus()-1; | |
118 | ||
119 | if (cpus <= 0) | |
120 | return 0; | |
121 | ||
122 | /* Can deadlock when called with interrupts disabled */ | |
123 | WARN_ON(irqs_disabled()); | |
124 | ||
125 | data.func = func; | |
126 | data.info = info; | |
127 | atomic_set(&data.started, 0); | |
128 | data.wait = wait; | |
129 | if (wait) | |
130 | atomic_set(&data.finished, 0); | |
131 | ||
132 | spin_lock(&call_lock); | |
133 | call_data = &data; | |
134 | /* Send a message to all other CPUs and wait for them to respond */ | |
135 | smp_ext_bitcall_others(ec_call_function); | |
136 | ||
137 | /* Wait for response */ | |
138 | while (atomic_read(&data.started) != cpus) | |
139 | cpu_relax(); | |
140 | ||
141 | if (wait) | |
142 | while (atomic_read(&data.finished) != cpus) | |
143 | cpu_relax(); | |
144 | spin_unlock(&call_lock); | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
149 | /* | |
150 | * Call a function on one CPU | |
151 | * cpu : the CPU the function should be executed on | |
152 | * | |
153 | * You must not call this function with disabled interrupts or from a | |
154 | * hardware interrupt handler. You may call it from a bottom half. | |
155 | * | |
156 | * It is guaranteed that the called function runs on the specified CPU, | |
157 | * preemption is disabled. | |
158 | */ | |
159 | int smp_call_function_on(void (*func) (void *info), void *info, | |
160 | int nonatomic, int wait, int cpu) | |
161 | { | |
162 | struct call_data_struct data; | |
163 | int curr_cpu; | |
164 | ||
165 | if (!cpu_online(cpu)) | |
166 | return -EINVAL; | |
167 | ||
168 | /* disable preemption for local function call */ | |
169 | curr_cpu = get_cpu(); | |
170 | ||
171 | if (curr_cpu == cpu) { | |
172 | /* direct call to function */ | |
173 | func(info); | |
174 | put_cpu(); | |
175 | return 0; | |
176 | } | |
177 | ||
178 | data.func = func; | |
179 | data.info = info; | |
180 | atomic_set(&data.started, 0); | |
181 | data.wait = wait; | |
182 | if (wait) | |
183 | atomic_set(&data.finished, 0); | |
184 | ||
185 | spin_lock_bh(&call_lock); | |
186 | call_data = &data; | |
187 | smp_ext_bitcall(cpu, ec_call_function); | |
188 | ||
189 | /* Wait for response */ | |
190 | while (atomic_read(&data.started) != 1) | |
191 | cpu_relax(); | |
192 | ||
193 | if (wait) | |
194 | while (atomic_read(&data.finished) != 1) | |
195 | cpu_relax(); | |
196 | ||
197 | spin_unlock_bh(&call_lock); | |
198 | put_cpu(); | |
199 | return 0; | |
200 | } | |
201 | EXPORT_SYMBOL(smp_call_function_on); | |
202 | ||
203 | static inline void do_send_stop(void) | |
204 | { | |
205 | int cpu, rc; | |
206 | ||
207 | /* stop all processors */ | |
208 | for_each_online_cpu(cpu) { | |
209 | if (cpu == smp_processor_id()) | |
210 | continue; | |
211 | do { | |
212 | rc = signal_processor(cpu, sigp_stop); | |
213 | } while (rc == sigp_busy); | |
214 | } | |
215 | } | |
216 | ||
217 | static inline void do_store_status(void) | |
218 | { | |
219 | int cpu, rc; | |
220 | ||
221 | /* store status of all processors in their lowcores (real 0) */ | |
222 | for_each_online_cpu(cpu) { | |
223 | if (cpu == smp_processor_id()) | |
224 | continue; | |
225 | do { | |
226 | rc = signal_processor_p( | |
227 | (__u32)(unsigned long) lowcore_ptr[cpu], cpu, | |
228 | sigp_store_status_at_address); | |
229 | } while(rc == sigp_busy); | |
230 | } | |
231 | } | |
232 | ||
233 | /* | |
234 | * this function sends a 'stop' sigp to all other CPUs in the system. | |
235 | * it goes straight through. | |
236 | */ | |
237 | void smp_send_stop(void) | |
238 | { | |
239 | /* write magic number to zero page (absolute 0) */ | |
240 | lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC; | |
241 | ||
242 | /* stop other processors. */ | |
243 | do_send_stop(); | |
244 | ||
245 | /* store status of other processors. */ | |
246 | do_store_status(); | |
247 | } | |
248 | ||
249 | /* | |
250 | * Reboot, halt and power_off routines for SMP. | |
251 | */ | |
252 | ||
253 | static void do_machine_restart(void * __unused) | |
254 | { | |
255 | int cpu; | |
256 | static atomic_t cpuid = ATOMIC_INIT(-1); | |
257 | ||
973bd993 | 258 | if (atomic_cmpxchg(&cpuid, -1, smp_processor_id()) != -1) |
1da177e4 LT |
259 | signal_processor(smp_processor_id(), sigp_stop); |
260 | ||
261 | /* Wait for all other cpus to enter stopped state */ | |
262 | for_each_online_cpu(cpu) { | |
263 | if (cpu == smp_processor_id()) | |
264 | continue; | |
265 | while(!smp_cpu_not_running(cpu)) | |
266 | cpu_relax(); | |
267 | } | |
268 | ||
269 | /* Store status of other cpus. */ | |
270 | do_store_status(); | |
271 | ||
272 | /* | |
273 | * Finally call reipl. Because we waited for all other | |
274 | * cpus to enter this function we know that they do | |
275 | * not hold any s390irq-locks (the cpus have been | |
276 | * interrupted by an external interrupt and s390irq | |
277 | * locks are always held disabled). | |
278 | */ | |
ff6b8ea6 | 279 | do_reipl(); |
1da177e4 LT |
280 | } |
281 | ||
282 | void machine_restart_smp(char * __unused) | |
283 | { | |
284 | on_each_cpu(do_machine_restart, NULL, 0, 0); | |
285 | } | |
286 | ||
287 | static void do_wait_for_stop(void) | |
288 | { | |
289 | unsigned long cr[16]; | |
290 | ||
291 | __ctl_store(cr, 0, 15); | |
292 | cr[0] &= ~0xffff; | |
293 | cr[6] = 0; | |
294 | __ctl_load(cr, 0, 15); | |
295 | for (;;) | |
296 | enabled_wait(); | |
297 | } | |
298 | ||
299 | static void do_machine_halt(void * __unused) | |
300 | { | |
301 | static atomic_t cpuid = ATOMIC_INIT(-1); | |
302 | ||
973bd993 | 303 | if (atomic_cmpxchg(&cpuid, -1, smp_processor_id()) == -1) { |
1da177e4 LT |
304 | smp_send_stop(); |
305 | if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0) | |
6b979de3 | 306 | cpcmd(vmhalt_cmd, NULL, 0, NULL); |
1da177e4 LT |
307 | signal_processor(smp_processor_id(), |
308 | sigp_stop_and_store_status); | |
309 | } | |
310 | do_wait_for_stop(); | |
311 | } | |
312 | ||
313 | void machine_halt_smp(void) | |
314 | { | |
315 | on_each_cpu(do_machine_halt, NULL, 0, 0); | |
316 | } | |
317 | ||
318 | static void do_machine_power_off(void * __unused) | |
319 | { | |
320 | static atomic_t cpuid = ATOMIC_INIT(-1); | |
321 | ||
973bd993 | 322 | if (atomic_cmpxchg(&cpuid, -1, smp_processor_id()) == -1) { |
1da177e4 LT |
323 | smp_send_stop(); |
324 | if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0) | |
6b979de3 | 325 | cpcmd(vmpoff_cmd, NULL, 0, NULL); |
1da177e4 LT |
326 | signal_processor(smp_processor_id(), |
327 | sigp_stop_and_store_status); | |
328 | } | |
329 | do_wait_for_stop(); | |
330 | } | |
331 | ||
332 | void machine_power_off_smp(void) | |
333 | { | |
334 | on_each_cpu(do_machine_power_off, NULL, 0, 0); | |
335 | } | |
336 | ||
337 | /* | |
338 | * This is the main routine where commands issued by other | |
339 | * cpus are handled. | |
340 | */ | |
341 | ||
342 | void do_ext_call_interrupt(struct pt_regs *regs, __u16 code) | |
343 | { | |
344 | unsigned long bits; | |
345 | ||
346 | /* | |
347 | * handle bit signal external calls | |
348 | * | |
349 | * For the ec_schedule signal we have to do nothing. All the work | |
350 | * is done automatically when we return from the interrupt. | |
351 | */ | |
352 | bits = xchg(&S390_lowcore.ext_call_fast, 0); | |
353 | ||
354 | if (test_bit(ec_call_function, &bits)) | |
355 | do_call_function(); | |
356 | } | |
357 | ||
358 | /* | |
359 | * Send an external call sigp to another cpu and return without waiting | |
360 | * for its completion. | |
361 | */ | |
362 | static void smp_ext_bitcall(int cpu, ec_bit_sig sig) | |
363 | { | |
364 | /* | |
365 | * Set signaling bit in lowcore of target cpu and kick it | |
366 | */ | |
367 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); | |
99b2d8df | 368 | while(signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
369 | udelay(10); |
370 | } | |
371 | ||
372 | /* | |
373 | * Send an external call sigp to every other cpu in the system and | |
374 | * return without waiting for its completion. | |
375 | */ | |
376 | static void smp_ext_bitcall_others(ec_bit_sig sig) | |
377 | { | |
378 | int cpu; | |
379 | ||
380 | for_each_online_cpu(cpu) { | |
381 | if (cpu == smp_processor_id()) | |
382 | continue; | |
383 | /* | |
384 | * Set signaling bit in lowcore of target cpu and kick it | |
385 | */ | |
386 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); | |
99b2d8df | 387 | while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
388 | udelay(10); |
389 | } | |
390 | } | |
391 | ||
347a8dc3 | 392 | #ifndef CONFIG_64BIT |
1da177e4 LT |
393 | /* |
394 | * this function sends a 'purge tlb' signal to another CPU. | |
395 | */ | |
396 | void smp_ptlb_callback(void *info) | |
397 | { | |
398 | local_flush_tlb(); | |
399 | } | |
400 | ||
401 | void smp_ptlb_all(void) | |
402 | { | |
403 | on_each_cpu(smp_ptlb_callback, NULL, 0, 1); | |
404 | } | |
405 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 406 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
407 | |
408 | /* | |
409 | * this function sends a 'reschedule' IPI to another CPU. | |
410 | * it goes straight through and wastes no time serializing | |
411 | * anything. Worst case is that we lose a reschedule ... | |
412 | */ | |
413 | void smp_send_reschedule(int cpu) | |
414 | { | |
415 | smp_ext_bitcall(cpu, ec_schedule); | |
416 | } | |
417 | ||
418 | /* | |
419 | * parameter area for the set/clear control bit callbacks | |
420 | */ | |
421 | typedef struct | |
422 | { | |
423 | __u16 start_ctl; | |
424 | __u16 end_ctl; | |
425 | unsigned long orvals[16]; | |
426 | unsigned long andvals[16]; | |
427 | } ec_creg_mask_parms; | |
428 | ||
429 | /* | |
430 | * callback for setting/clearing control bits | |
431 | */ | |
432 | void smp_ctl_bit_callback(void *info) { | |
433 | ec_creg_mask_parms *pp; | |
434 | unsigned long cregs[16]; | |
435 | int i; | |
436 | ||
437 | pp = (ec_creg_mask_parms *) info; | |
438 | __ctl_store(cregs[pp->start_ctl], pp->start_ctl, pp->end_ctl); | |
439 | for (i = pp->start_ctl; i <= pp->end_ctl; i++) | |
440 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; | |
441 | __ctl_load(cregs[pp->start_ctl], pp->start_ctl, pp->end_ctl); | |
442 | } | |
443 | ||
444 | /* | |
445 | * Set a bit in a control register of all cpus | |
446 | */ | |
447 | void smp_ctl_set_bit(int cr, int bit) { | |
448 | ec_creg_mask_parms parms; | |
449 | ||
450 | parms.start_ctl = cr; | |
451 | parms.end_ctl = cr; | |
452 | parms.orvals[cr] = 1 << bit; | |
453 | parms.andvals[cr] = -1L; | |
454 | preempt_disable(); | |
455 | smp_call_function(smp_ctl_bit_callback, &parms, 0, 1); | |
456 | __ctl_set_bit(cr, bit); | |
457 | preempt_enable(); | |
458 | } | |
459 | ||
460 | /* | |
461 | * Clear a bit in a control register of all cpus | |
462 | */ | |
463 | void smp_ctl_clear_bit(int cr, int bit) { | |
464 | ec_creg_mask_parms parms; | |
465 | ||
466 | parms.start_ctl = cr; | |
467 | parms.end_ctl = cr; | |
468 | parms.orvals[cr] = 0; | |
469 | parms.andvals[cr] = ~(1L << bit); | |
470 | preempt_disable(); | |
471 | smp_call_function(smp_ctl_bit_callback, &parms, 0, 1); | |
472 | __ctl_clear_bit(cr, bit); | |
473 | preempt_enable(); | |
474 | } | |
475 | ||
476 | /* | |
477 | * Lets check how many CPUs we have. | |
478 | */ | |
479 | ||
255acee7 HC |
480 | static unsigned int |
481 | __init smp_count_cpus(void) | |
1da177e4 | 482 | { |
255acee7 | 483 | unsigned int cpu, num_cpus; |
1da177e4 LT |
484 | __u16 boot_cpu_addr; |
485 | ||
486 | /* | |
487 | * cpu 0 is the boot cpu. See smp_prepare_boot_cpu. | |
488 | */ | |
489 | ||
490 | boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr; | |
491 | current_thread_info()->cpu = 0; | |
492 | num_cpus = 1; | |
255acee7 | 493 | for (cpu = 0; cpu <= 65535; cpu++) { |
1da177e4 LT |
494 | if ((__u16) cpu == boot_cpu_addr) |
495 | continue; | |
255acee7 HC |
496 | __cpu_logical_map[1] = (__u16) cpu; |
497 | if (signal_processor(1, sigp_sense) == | |
1da177e4 LT |
498 | sigp_not_operational) |
499 | continue; | |
1da177e4 LT |
500 | num_cpus++; |
501 | } | |
502 | ||
1da177e4 LT |
503 | printk("Detected %d CPU's\n",(int) num_cpus); |
504 | printk("Boot cpu address %2X\n", boot_cpu_addr); | |
255acee7 HC |
505 | |
506 | return num_cpus; | |
1da177e4 LT |
507 | } |
508 | ||
509 | /* | |
510 | * Activate a secondary processor. | |
511 | */ | |
512 | extern void init_cpu_timer(void); | |
513 | extern void init_cpu_vtimer(void); | |
514 | extern int pfault_init(void); | |
515 | extern void pfault_fini(void); | |
516 | ||
517 | int __devinit start_secondary(void *cpuvoid) | |
518 | { | |
519 | /* Setup the cpu */ | |
520 | cpu_init(); | |
5bfb5d69 | 521 | preempt_disable(); |
1da177e4 LT |
522 | /* init per CPU timer */ |
523 | init_cpu_timer(); | |
524 | #ifdef CONFIG_VIRT_TIMER | |
525 | init_cpu_vtimer(); | |
526 | #endif | |
527 | #ifdef CONFIG_PFAULT | |
528 | /* Enable pfault pseudo page faults on this cpu. */ | |
5d3f229f HC |
529 | if (MACHINE_IS_VM) |
530 | pfault_init(); | |
1da177e4 LT |
531 | #endif |
532 | /* Mark this cpu as online */ | |
533 | cpu_set(smp_processor_id(), cpu_online_map); | |
534 | /* Switch on interrupts */ | |
535 | local_irq_enable(); | |
536 | /* Print info about this processor */ | |
537 | print_cpu_info(&S390_lowcore.cpu_data); | |
538 | /* cpu_idle will call schedule for us */ | |
539 | cpu_idle(); | |
540 | return 0; | |
541 | } | |
542 | ||
543 | static void __init smp_create_idle(unsigned int cpu) | |
544 | { | |
545 | struct task_struct *p; | |
546 | ||
547 | /* | |
548 | * don't care about the psw and regs settings since we'll never | |
549 | * reschedule the forked task. | |
550 | */ | |
551 | p = fork_idle(cpu); | |
552 | if (IS_ERR(p)) | |
553 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
554 | current_set[cpu] = p; | |
555 | } | |
556 | ||
557 | /* Reserving and releasing of CPUs */ | |
558 | ||
559 | static DEFINE_SPINLOCK(smp_reserve_lock); | |
560 | static int smp_cpu_reserved[NR_CPUS]; | |
561 | ||
562 | int | |
563 | smp_get_cpu(cpumask_t cpu_mask) | |
564 | { | |
565 | unsigned long flags; | |
566 | int cpu; | |
567 | ||
568 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
569 | /* Try to find an already reserved cpu. */ | |
570 | for_each_cpu_mask(cpu, cpu_mask) { | |
571 | if (smp_cpu_reserved[cpu] != 0) { | |
572 | smp_cpu_reserved[cpu]++; | |
573 | /* Found one. */ | |
574 | goto out; | |
575 | } | |
576 | } | |
577 | /* Reserve a new cpu from cpu_mask. */ | |
578 | for_each_cpu_mask(cpu, cpu_mask) { | |
579 | if (cpu_online(cpu)) { | |
580 | smp_cpu_reserved[cpu]++; | |
581 | goto out; | |
582 | } | |
583 | } | |
584 | cpu = -ENODEV; | |
585 | out: | |
586 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
587 | return cpu; | |
588 | } | |
589 | ||
590 | void | |
591 | smp_put_cpu(int cpu) | |
592 | { | |
593 | unsigned long flags; | |
594 | ||
595 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
596 | smp_cpu_reserved[cpu]--; | |
597 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
598 | } | |
599 | ||
600 | static inline int | |
601 | cpu_stopped(int cpu) | |
602 | { | |
603 | __u32 status; | |
604 | ||
605 | /* Check for stopped state */ | |
606 | if (signal_processor_ps(&status, 0, cpu, sigp_sense) == sigp_status_stored) { | |
607 | if (status & 0x40) | |
608 | return 1; | |
609 | } | |
610 | return 0; | |
611 | } | |
612 | ||
613 | /* Upping and downing of CPUs */ | |
614 | ||
615 | int | |
616 | __cpu_up(unsigned int cpu) | |
617 | { | |
618 | struct task_struct *idle; | |
619 | struct _lowcore *cpu_lowcore; | |
620 | struct stack_frame *sf; | |
621 | sigp_ccode ccode; | |
622 | int curr_cpu; | |
623 | ||
624 | for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) { | |
625 | __cpu_logical_map[cpu] = (__u16) curr_cpu; | |
626 | if (cpu_stopped(cpu)) | |
627 | break; | |
628 | } | |
629 | ||
630 | if (!cpu_stopped(cpu)) | |
631 | return -ENODEV; | |
632 | ||
633 | ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), | |
634 | cpu, sigp_set_prefix); | |
635 | if (ccode){ | |
636 | printk("sigp_set_prefix failed for cpu %d " | |
637 | "with condition code %d\n", | |
638 | (int) cpu, (int) ccode); | |
639 | return -EIO; | |
640 | } | |
641 | ||
642 | idle = current_set[cpu]; | |
643 | cpu_lowcore = lowcore_ptr[cpu]; | |
644 | cpu_lowcore->kernel_stack = (unsigned long) | |
30af7120 | 645 | task_stack_page(idle) + (THREAD_SIZE); |
1da177e4 LT |
646 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
647 | - sizeof(struct pt_regs) | |
648 | - sizeof(struct stack_frame)); | |
649 | memset(sf, 0, sizeof(struct stack_frame)); | |
650 | sf->gprs[9] = (unsigned long) sf; | |
651 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
652 | __ctl_store(cpu_lowcore->cregs_save_area[0], 0, 15); | |
653 | __asm__ __volatile__("stam 0,15,0(%0)" | |
654 | : : "a" (&cpu_lowcore->access_regs_save_area) | |
655 | : "memory"); | |
656 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; | |
657 | cpu_lowcore->current_task = (unsigned long) idle; | |
658 | cpu_lowcore->cpu_data.cpu_nr = cpu; | |
659 | eieio(); | |
699ff13f MR |
660 | |
661 | while (signal_processor(cpu,sigp_restart) == sigp_busy) | |
662 | udelay(10); | |
1da177e4 LT |
663 | |
664 | while (!cpu_online(cpu)) | |
665 | cpu_relax(); | |
666 | return 0; | |
667 | } | |
668 | ||
255acee7 | 669 | static unsigned int __initdata additional_cpus; |
37a33026 | 670 | static unsigned int __initdata possible_cpus; |
255acee7 HC |
671 | |
672 | void __init smp_setup_cpu_possible_map(void) | |
673 | { | |
54330456 | 674 | unsigned int phy_cpus, pos_cpus, cpu; |
255acee7 | 675 | |
54330456 HC |
676 | phy_cpus = smp_count_cpus(); |
677 | pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS); | |
255acee7 | 678 | |
37a33026 | 679 | if (possible_cpus) |
54330456 | 680 | pos_cpus = min(possible_cpus, (unsigned int) NR_CPUS); |
255acee7 | 681 | |
54330456 | 682 | for (cpu = 0; cpu < pos_cpus; cpu++) |
255acee7 HC |
683 | cpu_set(cpu, cpu_possible_map); |
684 | ||
54330456 HC |
685 | phy_cpus = min(phy_cpus, pos_cpus); |
686 | ||
687 | for (cpu = 0; cpu < phy_cpus; cpu++) | |
688 | cpu_set(cpu, cpu_present_map); | |
255acee7 HC |
689 | } |
690 | ||
691 | #ifdef CONFIG_HOTPLUG_CPU | |
692 | ||
693 | static int __init setup_additional_cpus(char *s) | |
694 | { | |
695 | additional_cpus = simple_strtoul(s, NULL, 0); | |
696 | return 0; | |
697 | } | |
698 | early_param("additional_cpus", setup_additional_cpus); | |
699 | ||
37a33026 HC |
700 | static int __init setup_possible_cpus(char *s) |
701 | { | |
702 | possible_cpus = simple_strtoul(s, NULL, 0); | |
703 | return 0; | |
704 | } | |
705 | early_param("possible_cpus", setup_possible_cpus); | |
706 | ||
1da177e4 LT |
707 | int |
708 | __cpu_disable(void) | |
709 | { | |
710 | unsigned long flags; | |
711 | ec_creg_mask_parms cr_parms; | |
f3705136 | 712 | int cpu = smp_processor_id(); |
1da177e4 LT |
713 | |
714 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
f3705136 | 715 | if (smp_cpu_reserved[cpu] != 0) { |
1da177e4 LT |
716 | spin_unlock_irqrestore(&smp_reserve_lock, flags); |
717 | return -EBUSY; | |
718 | } | |
f3705136 | 719 | cpu_clear(cpu, cpu_online_map); |
1da177e4 LT |
720 | |
721 | #ifdef CONFIG_PFAULT | |
722 | /* Disable pfault pseudo page faults on this cpu. */ | |
5d3f229f HC |
723 | if (MACHINE_IS_VM) |
724 | pfault_fini(); | |
1da177e4 LT |
725 | #endif |
726 | ||
727 | /* disable all external interrupts */ | |
728 | ||
729 | cr_parms.start_ctl = 0; | |
730 | cr_parms.end_ctl = 0; | |
731 | cr_parms.orvals[0] = 0; | |
732 | cr_parms.andvals[0] = ~(1<<15 | 1<<14 | 1<<13 | 1<<12 | | |
733 | 1<<11 | 1<<10 | 1<< 6 | 1<< 4); | |
734 | smp_ctl_bit_callback(&cr_parms); | |
735 | ||
736 | /* disable all I/O interrupts */ | |
737 | ||
738 | cr_parms.start_ctl = 6; | |
739 | cr_parms.end_ctl = 6; | |
740 | cr_parms.orvals[6] = 0; | |
741 | cr_parms.andvals[6] = ~(1<<31 | 1<<30 | 1<<29 | 1<<28 | | |
742 | 1<<27 | 1<<26 | 1<<25 | 1<<24); | |
743 | smp_ctl_bit_callback(&cr_parms); | |
744 | ||
745 | /* disable most machine checks */ | |
746 | ||
747 | cr_parms.start_ctl = 14; | |
748 | cr_parms.end_ctl = 14; | |
749 | cr_parms.orvals[14] = 0; | |
750 | cr_parms.andvals[14] = ~(1<<28 | 1<<27 | 1<<26 | 1<<25 | 1<<24); | |
751 | smp_ctl_bit_callback(&cr_parms); | |
752 | ||
753 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
754 | return 0; | |
755 | } | |
756 | ||
757 | void | |
758 | __cpu_die(unsigned int cpu) | |
759 | { | |
760 | /* Wait until target cpu is down */ | |
761 | while (!smp_cpu_not_running(cpu)) | |
762 | cpu_relax(); | |
763 | printk("Processor %d spun down\n", cpu); | |
764 | } | |
765 | ||
766 | void | |
767 | cpu_die(void) | |
768 | { | |
769 | idle_task_exit(); | |
770 | signal_processor(smp_processor_id(), sigp_stop); | |
771 | BUG(); | |
772 | for(;;); | |
773 | } | |
774 | ||
255acee7 HC |
775 | #endif /* CONFIG_HOTPLUG_CPU */ |
776 | ||
1da177e4 LT |
777 | /* |
778 | * Cycle through the processors and setup structures. | |
779 | */ | |
780 | ||
781 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
782 | { | |
783 | unsigned long stack; | |
784 | unsigned int cpu; | |
785 | int i; | |
786 | ||
99b2d8df HC |
787 | /* request the 0x1201 emergency signal external interrupt */ |
788 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
789 | panic("Couldn't request external interrupt 0x1201"); | |
1da177e4 LT |
790 | memset(lowcore_ptr,0,sizeof(lowcore_ptr)); |
791 | /* | |
792 | * Initialize prefix pages and stacks for all possible cpus | |
793 | */ | |
794 | print_cpu_info(&S390_lowcore.cpu_data); | |
795 | ||
97db7fbf | 796 | for_each_possible_cpu(i) { |
1da177e4 LT |
797 | lowcore_ptr[i] = (struct _lowcore *) |
798 | __get_free_pages(GFP_KERNEL|GFP_DMA, | |
799 | sizeof(void*) == 8 ? 1 : 0); | |
800 | stack = __get_free_pages(GFP_KERNEL,ASYNC_ORDER); | |
801 | if (lowcore_ptr[i] == NULL || stack == 0ULL) | |
802 | panic("smp_boot_cpus failed to allocate memory\n"); | |
803 | ||
804 | *(lowcore_ptr[i]) = S390_lowcore; | |
805 | lowcore_ptr[i]->async_stack = stack + (ASYNC_SIZE); | |
1da177e4 LT |
806 | stack = __get_free_pages(GFP_KERNEL,0); |
807 | if (stack == 0ULL) | |
808 | panic("smp_boot_cpus failed to allocate memory\n"); | |
809 | lowcore_ptr[i]->panic_stack = stack + (PAGE_SIZE); | |
347a8dc3 | 810 | #ifndef CONFIG_64BIT |
77fa2245 HC |
811 | if (MACHINE_HAS_IEEE) { |
812 | lowcore_ptr[i]->extended_save_area_addr = | |
813 | (__u32) __get_free_pages(GFP_KERNEL,0); | |
814 | if (lowcore_ptr[i]->extended_save_area_addr == 0) | |
815 | panic("smp_boot_cpus failed to " | |
816 | "allocate memory\n"); | |
817 | } | |
1da177e4 LT |
818 | #endif |
819 | } | |
347a8dc3 | 820 | #ifndef CONFIG_64BIT |
77fa2245 HC |
821 | if (MACHINE_HAS_IEEE) |
822 | ctl_set_bit(14, 29); /* enable extended save area */ | |
823 | #endif | |
1da177e4 LT |
824 | set_prefix((u32)(unsigned long) lowcore_ptr[smp_processor_id()]); |
825 | ||
97db7fbf | 826 | for_each_possible_cpu(cpu) |
1da177e4 LT |
827 | if (cpu != smp_processor_id()) |
828 | smp_create_idle(cpu); | |
829 | } | |
830 | ||
831 | void __devinit smp_prepare_boot_cpu(void) | |
832 | { | |
833 | BUG_ON(smp_processor_id() != 0); | |
834 | ||
835 | cpu_set(0, cpu_online_map); | |
1da177e4 LT |
836 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
837 | current_set[0] = current; | |
838 | } | |
839 | ||
840 | void smp_cpus_done(unsigned int max_cpus) | |
841 | { | |
54330456 | 842 | cpu_present_map = cpu_possible_map; |
1da177e4 LT |
843 | } |
844 | ||
845 | /* | |
846 | * the frequency of the profiling timer can be changed | |
847 | * by writing a multiplier value into /proc/profile. | |
848 | * | |
849 | * usually you want to run this on all CPUs ;) | |
850 | */ | |
851 | int setup_profiling_timer(unsigned int multiplier) | |
852 | { | |
853 | return 0; | |
854 | } | |
855 | ||
856 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
857 | ||
858 | static int __init topology_init(void) | |
859 | { | |
860 | int cpu; | |
861 | int ret; | |
862 | ||
97db7fbf | 863 | for_each_possible_cpu(cpu) { |
76b67ed9 | 864 | ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu); |
1da177e4 LT |
865 | if (ret) |
866 | printk(KERN_WARNING "topology_init: register_cpu %d " | |
867 | "failed (%d)\n", cpu, ret); | |
868 | } | |
869 | return 0; | |
870 | } | |
871 | ||
872 | subsys_initcall(topology_init); | |
873 | ||
255acee7 | 874 | EXPORT_SYMBOL(cpu_online_map); |
1da177e4 LT |
875 | EXPORT_SYMBOL(cpu_possible_map); |
876 | EXPORT_SYMBOL(lowcore_ptr); | |
877 | EXPORT_SYMBOL(smp_ctl_set_bit); | |
878 | EXPORT_SYMBOL(smp_ctl_clear_bit); | |
879 | EXPORT_SYMBOL(smp_call_function); | |
880 | EXPORT_SYMBOL(smp_get_cpu); | |
881 | EXPORT_SYMBOL(smp_put_cpu); | |
882 |