[S390] clear_table inline assembly contraints
[deliverable/linux.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
39ce010d 4 * Copyright IBM Corp. 1999,2007
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
23#include <linux/module.h>
24#include <linux/init.h>
1da177e4 25#include <linux/mm.h>
4e950f6f 26#include <linux/err.h>
1da177e4
LT
27#include <linux/spinlock.h>
28#include <linux/kernel_stat.h>
1da177e4
LT
29#include <linux/delay.h>
30#include <linux/cache.h>
31#include <linux/interrupt.h>
32#include <linux/cpu.h>
2b67fc46 33#include <linux/timex.h>
411ed322 34#include <linux/bootmem.h>
46b05d26 35#include <asm/ipl.h>
2b67fc46 36#include <asm/setup.h>
1da177e4
LT
37#include <asm/sigp.h>
38#include <asm/pgalloc.h>
39#include <asm/irq.h>
40#include <asm/s390_ext.h>
41#include <asm/cpcmd.h>
42#include <asm/tlbflush.h>
2b67fc46 43#include <asm/timer.h>
411ed322 44#include <asm/lowcore.h>
08d07968 45#include <asm/sclp.h>
fae8b22d 46#include <asm/cpu.h>
a806170e 47#include "entry.h"
1da177e4 48
1da177e4
LT
49/*
50 * An array with a pointer the lowcore of every CPU.
51 */
1da177e4 52struct _lowcore *lowcore_ptr[NR_CPUS];
39ce010d 53EXPORT_SYMBOL(lowcore_ptr);
1da177e4 54
255acee7 55cpumask_t cpu_online_map = CPU_MASK_NONE;
39ce010d
HC
56EXPORT_SYMBOL(cpu_online_map);
57
48483b32 58cpumask_t cpu_possible_map = CPU_MASK_ALL;
39ce010d 59EXPORT_SYMBOL(cpu_possible_map);
1da177e4
LT
60
61static struct task_struct *current_set[NR_CPUS];
62
08d07968
HC
63static u8 smp_cpu_type;
64static int smp_use_sigp_detection;
65
66enum s390_cpu_state {
67 CPU_STATE_STANDBY,
68 CPU_STATE_CONFIGURED,
69};
70
dbd70fb4 71DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 72int smp_cpu_polarization[NR_CPUS];
08d07968 73static int smp_cpu_state[NR_CPUS];
c10fde0d 74static int cpu_management;
08d07968
HC
75
76static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 77
1da177e4 78static void smp_ext_bitcall(int, ec_bit_sig);
1da177e4 79
677d7623 80void smp_send_stop(void)
1da177e4 81{
39ce010d 82 int cpu, rc;
1da177e4 83
677d7623
HC
84 /* Disable all interrupts/machine checks */
85 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
1da177e4 86
677d7623
HC
87 /* write magic number to zero page (absolute 0) */
88 lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC;
1da177e4 89
677d7623 90 /* stop all processors */
1da177e4
LT
91 for_each_online_cpu(cpu) {
92 if (cpu == smp_processor_id())
93 continue;
94 do {
677d7623 95 rc = signal_processor(cpu, sigp_stop);
39ce010d 96 } while (rc == sigp_busy);
1da177e4 97
39ce010d 98 while (!smp_cpu_not_running(cpu))
c6b5b847
HC
99 cpu_relax();
100 }
101}
102
1da177e4
LT
103/*
104 * This is the main routine where commands issued by other
105 * cpus are handled.
106 */
107
2b67fc46 108static void do_ext_call_interrupt(__u16 code)
1da177e4 109{
39ce010d 110 unsigned long bits;
1da177e4 111
39ce010d
HC
112 /*
113 * handle bit signal external calls
114 *
115 * For the ec_schedule signal we have to do nothing. All the work
116 * is done automatically when we return from the interrupt.
117 */
1da177e4
LT
118 bits = xchg(&S390_lowcore.ext_call_fast, 0);
119
39ce010d 120 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
121 generic_smp_call_function_interrupt();
122
123 if (test_bit(ec_call_function_single, &bits))
124 generic_smp_call_function_single_interrupt();
1da177e4
LT
125}
126
127/*
128 * Send an external call sigp to another cpu and return without waiting
129 * for its completion.
130 */
131static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
132{
39ce010d
HC
133 /*
134 * Set signaling bit in lowcore of target cpu and kick it
135 */
1da177e4 136 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
39ce010d 137 while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
138 udelay(10);
139}
140
ca9fc75a
HC
141void arch_send_call_function_ipi(cpumask_t mask)
142{
143 int cpu;
144
145 for_each_cpu_mask(cpu, mask)
146 smp_ext_bitcall(cpu, ec_call_function);
147}
148
149void arch_send_call_function_single_ipi(int cpu)
150{
151 smp_ext_bitcall(cpu, ec_call_function_single);
152}
153
347a8dc3 154#ifndef CONFIG_64BIT
1da177e4
LT
155/*
156 * this function sends a 'purge tlb' signal to another CPU.
157 */
a806170e 158static void smp_ptlb_callback(void *info)
1da177e4 159{
ba8a9229 160 __tlb_flush_local();
1da177e4
LT
161}
162
163void smp_ptlb_all(void)
164{
15c8b6c1 165 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
166}
167EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 168#endif /* ! CONFIG_64BIT */
1da177e4
LT
169
170/*
171 * this function sends a 'reschedule' IPI to another CPU.
172 * it goes straight through and wastes no time serializing
173 * anything. Worst case is that we lose a reschedule ...
174 */
175void smp_send_reschedule(int cpu)
176{
39ce010d 177 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
178}
179
180/*
181 * parameter area for the set/clear control bit callbacks
182 */
94c12cc7 183struct ec_creg_mask_parms {
1da177e4
LT
184 unsigned long orvals[16];
185 unsigned long andvals[16];
94c12cc7 186};
1da177e4
LT
187
188/*
189 * callback for setting/clearing control bits
190 */
39ce010d
HC
191static void smp_ctl_bit_callback(void *info)
192{
94c12cc7 193 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
194 unsigned long cregs[16];
195 int i;
39ce010d 196
94c12cc7
MS
197 __ctl_store(cregs, 0, 15);
198 for (i = 0; i <= 15; i++)
1da177e4 199 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 200 __ctl_load(cregs, 0, 15);
1da177e4
LT
201}
202
203/*
204 * Set a bit in a control register of all cpus
205 */
94c12cc7
MS
206void smp_ctl_set_bit(int cr, int bit)
207{
208 struct ec_creg_mask_parms parms;
1da177e4 209
94c12cc7
MS
210 memset(&parms.orvals, 0, sizeof(parms.orvals));
211 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 212 parms.orvals[cr] = 1 << bit;
15c8b6c1 213 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 214}
39ce010d 215EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
216
217/*
218 * Clear a bit in a control register of all cpus
219 */
94c12cc7
MS
220void smp_ctl_clear_bit(int cr, int bit)
221{
222 struct ec_creg_mask_parms parms;
1da177e4 223
94c12cc7
MS
224 memset(&parms.orvals, 0, sizeof(parms.orvals));
225 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 226 parms.andvals[cr] = ~(1L << bit);
15c8b6c1 227 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 228}
39ce010d 229EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 230
08d07968
HC
231/*
232 * In early ipl state a temp. logically cpu number is needed, so the sigp
233 * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on
234 * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1.
235 */
236#define CPU_INIT_NO 1
237
411ed322
MH
238#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
239
240/*
241 * zfcpdump_prefix_array holds prefix registers for the following scenario:
242 * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to
243 * save its prefix registers, since they get lost, when switching from 31 bit
244 * to 64 bit.
245 */
246unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \
247 __attribute__((__section__(".data")));
248
285f6722 249static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 250{
411ed322
MH
251 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
252 return;
285f6722
HC
253 if (cpu >= NR_CPUS) {
254 printk(KERN_WARNING "Registers for cpu %i not saved since dump "
255 "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS);
256 return;
411ed322 257 }
48483b32 258 zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL);
08d07968
HC
259 __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu;
260 while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) ==
261 sigp_busy)
285f6722
HC
262 cpu_relax();
263 memcpy(zfcpdump_save_areas[cpu],
264 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
265 SAVE_AREA_SIZE);
266#ifdef CONFIG_64BIT
267 /* copy original prefix register */
268 zfcpdump_save_areas[cpu]->s390x.pref_reg = zfcpdump_prefix_array[cpu];
269#endif
411ed322
MH
270}
271
272union save_area *zfcpdump_save_areas[NR_CPUS + 1];
273EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
274
275#else
285f6722
HC
276
277static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
278
279#endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */
411ed322 280
08d07968
HC
281static int cpu_stopped(int cpu)
282{
283 __u32 status;
284
285 /* Check for stopped state */
286 if (signal_processor_ps(&status, 0, cpu, sigp_sense) ==
287 sigp_status_stored) {
288 if (status & 0x40)
289 return 1;
290 }
291 return 0;
292}
293
08d07968
HC
294static int cpu_known(int cpu_id)
295{
296 int cpu;
297
298 for_each_present_cpu(cpu) {
299 if (__cpu_logical_map[cpu] == cpu_id)
300 return 1;
301 }
302 return 0;
303}
304
305static int smp_rescan_cpus_sigp(cpumask_t avail)
306{
307 int cpu_id, logical_cpu;
308
309 logical_cpu = first_cpu(avail);
310 if (logical_cpu == NR_CPUS)
311 return 0;
312 for (cpu_id = 0; cpu_id <= 65535; cpu_id++) {
313 if (cpu_known(cpu_id))
314 continue;
315 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 316 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
317 if (!cpu_stopped(logical_cpu))
318 continue;
319 cpu_set(logical_cpu, cpu_present_map);
320 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
321 logical_cpu = next_cpu(logical_cpu, avail);
322 if (logical_cpu == NR_CPUS)
323 break;
324 }
325 return 0;
326}
327
48483b32 328static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
329{
330 struct sclp_cpu_info *info;
331 int cpu_id, logical_cpu, cpu;
332 int rc;
333
334 logical_cpu = first_cpu(avail);
335 if (logical_cpu == NR_CPUS)
336 return 0;
48483b32 337 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
338 if (!info)
339 return -ENOMEM;
340 rc = sclp_get_cpu_info(info);
341 if (rc)
342 goto out;
343 for (cpu = 0; cpu < info->combined; cpu++) {
344 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
345 continue;
346 cpu_id = info->cpu[cpu].address;
347 if (cpu_known(cpu_id))
348 continue;
349 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 350 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
351 cpu_set(logical_cpu, cpu_present_map);
352 if (cpu >= info->configured)
353 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
354 else
355 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
356 logical_cpu = next_cpu(logical_cpu, avail);
357 if (logical_cpu == NR_CPUS)
358 break;
359 }
360out:
48483b32 361 kfree(info);
08d07968
HC
362 return rc;
363}
364
1e489518 365static int __smp_rescan_cpus(void)
08d07968
HC
366{
367 cpumask_t avail;
368
48483b32 369 cpus_xor(avail, cpu_possible_map, cpu_present_map);
08d07968
HC
370 if (smp_use_sigp_detection)
371 return smp_rescan_cpus_sigp(avail);
372 else
373 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
374}
375
48483b32
HC
376static void __init smp_detect_cpus(void)
377{
378 unsigned int cpu, c_cpus, s_cpus;
379 struct sclp_cpu_info *info;
380 u16 boot_cpu_addr, cpu_addr;
381
382 c_cpus = 1;
383 s_cpus = 0;
384 boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr;
385 info = kmalloc(sizeof(*info), GFP_KERNEL);
386 if (!info)
387 panic("smp_detect_cpus failed to allocate memory\n");
388 /* Use sigp detection algorithm if sclp doesn't work. */
389 if (sclp_get_cpu_info(info)) {
390 smp_use_sigp_detection = 1;
391 for (cpu = 0; cpu <= 65535; cpu++) {
392 if (cpu == boot_cpu_addr)
393 continue;
394 __cpu_logical_map[CPU_INIT_NO] = cpu;
395 if (!cpu_stopped(CPU_INIT_NO))
396 continue;
397 smp_get_save_area(c_cpus, cpu);
398 c_cpus++;
399 }
400 goto out;
401 }
402
403 if (info->has_cpu_type) {
404 for (cpu = 0; cpu < info->combined; cpu++) {
405 if (info->cpu[cpu].address == boot_cpu_addr) {
406 smp_cpu_type = info->cpu[cpu].type;
407 break;
408 }
409 }
410 }
411
412 for (cpu = 0; cpu < info->combined; cpu++) {
413 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
414 continue;
415 cpu_addr = info->cpu[cpu].address;
416 if (cpu_addr == boot_cpu_addr)
417 continue;
418 __cpu_logical_map[CPU_INIT_NO] = cpu_addr;
419 if (!cpu_stopped(CPU_INIT_NO)) {
420 s_cpus++;
421 continue;
422 }
423 smp_get_save_area(c_cpus, cpu_addr);
424 c_cpus++;
425 }
426out:
427 kfree(info);
428 printk(KERN_INFO "CPUs: %d configured, %d standby\n", c_cpus, s_cpus);
9d40d2e3 429 get_online_cpus();
1e489518 430 __smp_rescan_cpus();
9d40d2e3 431 put_online_cpus();
48483b32
HC
432}
433
1da177e4 434/*
39ce010d 435 * Activate a secondary processor.
1da177e4 436 */
ea1f4eec 437int __cpuinit start_secondary(void *cpuvoid)
1da177e4 438{
39ce010d
HC
439 /* Setup the cpu */
440 cpu_init();
5bfb5d69 441 preempt_disable();
d54853ef 442 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 443 init_cpu_timer();
d54853ef 444 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 445 init_cpu_vtimer();
1da177e4 446 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
447 pfault_init();
448
e545a614
MS
449 /* call cpu notifiers */
450 notify_cpu_starting(smp_processor_id());
1da177e4 451 /* Mark this cpu as online */
ca9fc75a 452 ipi_call_lock();
1da177e4 453 cpu_set(smp_processor_id(), cpu_online_map);
ca9fc75a 454 ipi_call_unlock();
1da177e4
LT
455 /* Switch on interrupts */
456 local_irq_enable();
39ce010d
HC
457 /* Print info about this processor */
458 print_cpu_info(&S390_lowcore.cpu_data);
459 /* cpu_idle will call schedule for us */
460 cpu_idle();
461 return 0;
1da177e4
LT
462}
463
464static void __init smp_create_idle(unsigned int cpu)
465{
466 struct task_struct *p;
467
468 /*
469 * don't care about the psw and regs settings since we'll never
470 * reschedule the forked task.
471 */
472 p = fork_idle(cpu);
473 if (IS_ERR(p))
474 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
475 current_set[cpu] = p;
476}
477
1cb6bb4b
HC
478static int __cpuinit smp_alloc_lowcore(int cpu)
479{
480 unsigned long async_stack, panic_stack;
481 struct _lowcore *lowcore;
482 int lc_order;
483
484 lc_order = sizeof(long) == 8 ? 1 : 0;
485 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
486 if (!lowcore)
487 return -ENOMEM;
488 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 489 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
490 if (!panic_stack || !async_stack)
491 goto out;
98c7b388
HC
492 memcpy(lowcore, &S390_lowcore, 512);
493 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
494 lowcore->async_stack = async_stack + ASYNC_SIZE;
495 lowcore->panic_stack = panic_stack + PAGE_SIZE;
496
497#ifndef CONFIG_64BIT
498 if (MACHINE_HAS_IEEE) {
499 unsigned long save_area;
500
501 save_area = get_zeroed_page(GFP_KERNEL);
502 if (!save_area)
503 goto out_save_area;
504 lowcore->extended_save_area_addr = (u32) save_area;
505 }
506#endif
507 lowcore_ptr[cpu] = lowcore;
508 return 0;
509
510#ifndef CONFIG_64BIT
511out_save_area:
512 free_page(panic_stack);
513#endif
591bb4f6 514out:
1cb6bb4b 515 free_pages(async_stack, ASYNC_ORDER);
1cb6bb4b
HC
516 free_pages((unsigned long) lowcore, lc_order);
517 return -ENOMEM;
518}
519
520#ifdef CONFIG_HOTPLUG_CPU
521static void smp_free_lowcore(int cpu)
522{
523 struct _lowcore *lowcore;
524 int lc_order;
525
526 lc_order = sizeof(long) == 8 ? 1 : 0;
527 lowcore = lowcore_ptr[cpu];
528#ifndef CONFIG_64BIT
529 if (MACHINE_HAS_IEEE)
530 free_page((unsigned long) lowcore->extended_save_area_addr);
531#endif
532 free_page(lowcore->panic_stack - PAGE_SIZE);
533 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
534 free_pages((unsigned long) lowcore, lc_order);
535 lowcore_ptr[cpu] = NULL;
536}
537#endif /* CONFIG_HOTPLUG_CPU */
538
1da177e4 539/* Upping and downing of CPUs */
1cb6bb4b 540int __cpuinit __cpu_up(unsigned int cpu)
1da177e4
LT
541{
542 struct task_struct *idle;
39ce010d 543 struct _lowcore *cpu_lowcore;
1da177e4 544 struct stack_frame *sf;
39ce010d 545 sigp_ccode ccode;
1da177e4 546
08d07968
HC
547 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
548 return -EIO;
1cb6bb4b
HC
549 if (smp_alloc_lowcore(cpu))
550 return -ENOMEM;
1da177e4
LT
551
552 ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
553 cpu, sigp_set_prefix);
39ce010d 554 if (ccode) {
1da177e4
LT
555 printk("sigp_set_prefix failed for cpu %d "
556 "with condition code %d\n",
557 (int) cpu, (int) ccode);
558 return -EIO;
559 }
560
561 idle = current_set[cpu];
39ce010d 562 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 563 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 564 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 565 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
566 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
567 - sizeof(struct pt_regs)
568 - sizeof(struct stack_frame));
569 memset(sf, 0, sizeof(struct stack_frame));
570 sf->gprs[9] = (unsigned long) sf;
571 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 572 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
94c12cc7
MS
573 asm volatile(
574 " stam 0,15,0(%0)"
575 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 576 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d
HC
577 cpu_lowcore->current_task = (unsigned long) idle;
578 cpu_lowcore->cpu_data.cpu_nr = cpu;
591bb4f6
HC
579 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
580 cpu_lowcore->ipl_device = S390_lowcore.ipl_device;
1da177e4 581 eieio();
699ff13f 582
39ce010d 583 while (signal_processor(cpu, sigp_restart) == sigp_busy)
699ff13f 584 udelay(10);
1da177e4
LT
585
586 while (!cpu_online(cpu))
587 cpu_relax();
588 return 0;
589}
590
48483b32 591static int __init setup_possible_cpus(char *s)
255acee7 592{
48483b32 593 int pcpus, cpu;
255acee7 594
48483b32
HC
595 pcpus = simple_strtoul(s, NULL, 0);
596 cpu_possible_map = cpumask_of_cpu(0);
597 for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++)
255acee7 598 cpu_set(cpu, cpu_possible_map);
37a33026
HC
599 return 0;
600}
601early_param("possible_cpus", setup_possible_cpus);
602
48483b32
HC
603#ifdef CONFIG_HOTPLUG_CPU
604
39ce010d 605int __cpu_disable(void)
1da177e4 606{
94c12cc7 607 struct ec_creg_mask_parms cr_parms;
f3705136 608 int cpu = smp_processor_id();
1da177e4 609
f3705136 610 cpu_clear(cpu, cpu_online_map);
1da177e4 611
1da177e4 612 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 613 pfault_fini();
1da177e4 614
94c12cc7
MS
615 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
616 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 617
94c12cc7 618 /* disable all external interrupts */
1da177e4 619 cr_parms.orvals[0] = 0;
39ce010d
HC
620 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
621 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
1da177e4 622 /* disable all I/O interrupts */
1da177e4 623 cr_parms.orvals[6] = 0;
39ce010d
HC
624 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
625 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 626 /* disable most machine checks */
1da177e4 627 cr_parms.orvals[14] = 0;
39ce010d
HC
628 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
629 1 << 25 | 1 << 24);
94c12cc7 630
1da177e4
LT
631 smp_ctl_bit_callback(&cr_parms);
632
1da177e4
LT
633 return 0;
634}
635
39ce010d 636void __cpu_die(unsigned int cpu)
1da177e4
LT
637{
638 /* Wait until target cpu is down */
639 while (!smp_cpu_not_running(cpu))
640 cpu_relax();
1cb6bb4b 641 smp_free_lowcore(cpu);
08d07968 642 printk(KERN_INFO "Processor %d spun down\n", cpu);
1da177e4
LT
643}
644
39ce010d 645void cpu_die(void)
1da177e4
LT
646{
647 idle_task_exit();
648 signal_processor(smp_processor_id(), sigp_stop);
649 BUG();
39ce010d 650 for (;;);
1da177e4
LT
651}
652
255acee7
HC
653#endif /* CONFIG_HOTPLUG_CPU */
654
1da177e4
LT
655void __init smp_prepare_cpus(unsigned int max_cpus)
656{
591bb4f6
HC
657#ifndef CONFIG_64BIT
658 unsigned long save_area = 0;
659#endif
660 unsigned long async_stack, panic_stack;
661 struct _lowcore *lowcore;
1da177e4 662 unsigned int cpu;
591bb4f6 663 int lc_order;
39ce010d 664
48483b32
HC
665 smp_detect_cpus();
666
39ce010d
HC
667 /* request the 0x1201 emergency signal external interrupt */
668 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
669 panic("Couldn't request external interrupt 0x1201");
1da177e4
LT
670 print_cpu_info(&S390_lowcore.cpu_data);
671
591bb4f6
HC
672 /* Reallocate current lowcore, but keep its contents. */
673 lc_order = sizeof(long) == 8 ? 1 : 0;
674 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
675 panic_stack = __get_free_page(GFP_KERNEL);
676 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
347a8dc3 677#ifndef CONFIG_64BIT
77fa2245 678 if (MACHINE_HAS_IEEE)
591bb4f6 679 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 680#endif
591bb4f6
HC
681 local_irq_disable();
682 local_mcck_disable();
683 lowcore_ptr[smp_processor_id()] = lowcore;
684 *lowcore = S390_lowcore;
685 lowcore->panic_stack = panic_stack + PAGE_SIZE;
686 lowcore->async_stack = async_stack + ASYNC_SIZE;
687#ifndef CONFIG_64BIT
688 if (MACHINE_HAS_IEEE)
689 lowcore->extended_save_area_addr = (u32) save_area;
690#endif
691 set_prefix((u32)(unsigned long) lowcore);
692 local_mcck_enable();
693 local_irq_enable();
97db7fbf 694 for_each_possible_cpu(cpu)
1da177e4
LT
695 if (cpu != smp_processor_id())
696 smp_create_idle(cpu);
697}
698
ea1f4eec 699void __init smp_prepare_boot_cpu(void)
1da177e4
LT
700{
701 BUG_ON(smp_processor_id() != 0);
702
48483b32
HC
703 current_thread_info()->cpu = 0;
704 cpu_set(0, cpu_present_map);
1da177e4 705 cpu_set(0, cpu_online_map);
1da177e4
LT
706 S390_lowcore.percpu_offset = __per_cpu_offset[0];
707 current_set[0] = current;
08d07968 708 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 709 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
710}
711
ea1f4eec 712void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 713{
1da177e4
LT
714}
715
716/*
717 * the frequency of the profiling timer can be changed
718 * by writing a multiplier value into /proc/profile.
719 *
720 * usually you want to run this on all CPUs ;)
721 */
722int setup_profiling_timer(unsigned int multiplier)
723{
39ce010d 724 return 0;
1da177e4
LT
725}
726
08d07968 727#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
728static ssize_t cpu_configure_show(struct sys_device *dev,
729 struct sysdev_attribute *attr, char *buf)
08d07968
HC
730{
731 ssize_t count;
732
733 mutex_lock(&smp_cpu_state_mutex);
734 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
735 mutex_unlock(&smp_cpu_state_mutex);
736 return count;
737}
738
4a0b2b4d
AK
739static ssize_t cpu_configure_store(struct sys_device *dev,
740 struct sysdev_attribute *attr,
741 const char *buf, size_t count)
08d07968
HC
742{
743 int cpu = dev->id;
744 int val, rc;
745 char delim;
746
747 if (sscanf(buf, "%d %c", &val, &delim) != 1)
748 return -EINVAL;
749 if (val != 0 && val != 1)
750 return -EINVAL;
751
9d40d2e3 752 get_online_cpus();
0b18d318 753 mutex_lock(&smp_cpu_state_mutex);
08d07968
HC
754 rc = -EBUSY;
755 if (cpu_online(cpu))
756 goto out;
757 rc = 0;
758 switch (val) {
759 case 0:
760 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
761 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 762 if (!rc) {
08d07968 763 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
764 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
765 }
08d07968
HC
766 }
767 break;
768 case 1:
769 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
770 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 771 if (!rc) {
08d07968 772 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
773 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
774 }
08d07968
HC
775 }
776 break;
777 default:
778 break;
779 }
780out:
08d07968 781 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 782 put_online_cpus();
08d07968
HC
783 return rc ? rc : count;
784}
785static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
786#endif /* CONFIG_HOTPLUG_CPU */
787
4a0b2b4d
AK
788static ssize_t cpu_polarization_show(struct sys_device *dev,
789 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
790{
791 int cpu = dev->id;
792 ssize_t count;
793
794 mutex_lock(&smp_cpu_state_mutex);
795 switch (smp_cpu_polarization[cpu]) {
796 case POLARIZATION_HRZ:
797 count = sprintf(buf, "horizontal\n");
798 break;
799 case POLARIZATION_VL:
800 count = sprintf(buf, "vertical:low\n");
801 break;
802 case POLARIZATION_VM:
803 count = sprintf(buf, "vertical:medium\n");
804 break;
805 case POLARIZATION_VH:
806 count = sprintf(buf, "vertical:high\n");
807 break;
808 default:
809 count = sprintf(buf, "unknown\n");
810 break;
811 }
812 mutex_unlock(&smp_cpu_state_mutex);
813 return count;
814}
815static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
816
4a0b2b4d
AK
817static ssize_t show_cpu_address(struct sys_device *dev,
818 struct sysdev_attribute *attr, char *buf)
08d07968
HC
819{
820 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
821}
822static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
823
824
825static struct attribute *cpu_common_attrs[] = {
826#ifdef CONFIG_HOTPLUG_CPU
827 &attr_configure.attr,
828#endif
829 &attr_address.attr,
c10fde0d 830 &attr_polarization.attr,
08d07968
HC
831 NULL,
832};
833
834static struct attribute_group cpu_common_attr_group = {
835 .attrs = cpu_common_attrs,
836};
1da177e4 837
4a0b2b4d
AK
838static ssize_t show_capability(struct sys_device *dev,
839 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
840{
841 unsigned int capability;
842 int rc;
843
844 rc = get_cpu_capability(&capability);
845 if (rc)
846 return rc;
847 return sprintf(buf, "%u\n", capability);
848}
849static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
850
4a0b2b4d
AK
851static ssize_t show_idle_count(struct sys_device *dev,
852 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
853{
854 struct s390_idle_data *idle;
855 unsigned long long idle_count;
856
857 idle = &per_cpu(s390_idle, dev->id);
858 spin_lock_irq(&idle->lock);
859 idle_count = idle->idle_count;
860 spin_unlock_irq(&idle->lock);
861 return sprintf(buf, "%llu\n", idle_count);
862}
863static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
864
4a0b2b4d
AK
865static ssize_t show_idle_time(struct sys_device *dev,
866 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
867{
868 struct s390_idle_data *idle;
869 unsigned long long new_time;
870
871 idle = &per_cpu(s390_idle, dev->id);
872 spin_lock_irq(&idle->lock);
873 if (idle->in_idle) {
874 new_time = get_clock();
875 idle->idle_time += new_time - idle->idle_enter;
876 idle->idle_enter = new_time;
877 }
878 new_time = idle->idle_time;
879 spin_unlock_irq(&idle->lock);
69d39d66 880 return sprintf(buf, "%llu\n", new_time >> 12);
fae8b22d 881}
69d39d66 882static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 883
08d07968 884static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
885 &attr_capability.attr,
886 &attr_idle_count.attr,
69d39d66 887 &attr_idle_time_us.attr,
fae8b22d
HC
888 NULL,
889};
890
08d07968
HC
891static struct attribute_group cpu_online_attr_group = {
892 .attrs = cpu_online_attrs,
fae8b22d
HC
893};
894
2fc2d1e9
HC
895static int __cpuinit smp_cpu_notify(struct notifier_block *self,
896 unsigned long action, void *hcpu)
897{
898 unsigned int cpu = (unsigned int)(long)hcpu;
899 struct cpu *c = &per_cpu(cpu_devices, cpu);
900 struct sys_device *s = &c->sysdev;
fae8b22d 901 struct s390_idle_data *idle;
2fc2d1e9
HC
902
903 switch (action) {
904 case CPU_ONLINE:
8bb78442 905 case CPU_ONLINE_FROZEN:
fae8b22d
HC
906 idle = &per_cpu(s390_idle, cpu);
907 spin_lock_irq(&idle->lock);
908 idle->idle_enter = 0;
909 idle->idle_time = 0;
910 idle->idle_count = 0;
911 spin_unlock_irq(&idle->lock);
08d07968 912 if (sysfs_create_group(&s->kobj, &cpu_online_attr_group))
2fc2d1e9
HC
913 return NOTIFY_BAD;
914 break;
915 case CPU_DEAD:
8bb78442 916 case CPU_DEAD_FROZEN:
08d07968 917 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
918 break;
919 }
920 return NOTIFY_OK;
921}
922
923static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 924 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
925};
926
2bc89b5e 927static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
928{
929 struct cpu *c = &per_cpu(cpu_devices, cpu);
930 struct sys_device *s = &c->sysdev;
931 int rc;
932
933 c->hotpluggable = 1;
934 rc = register_cpu(c, cpu);
935 if (rc)
936 goto out;
937 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
938 if (rc)
939 goto out_cpu;
940 if (!cpu_online(cpu))
941 goto out;
942 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
943 if (!rc)
944 return 0;
945 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
946out_cpu:
947#ifdef CONFIG_HOTPLUG_CPU
948 unregister_cpu(c);
949#endif
950out:
951 return rc;
952}
953
954#ifdef CONFIG_HOTPLUG_CPU
1e489518 955
67060d9c 956int __ref smp_rescan_cpus(void)
08d07968
HC
957{
958 cpumask_t newcpus;
959 int cpu;
960 int rc;
961
9d40d2e3 962 get_online_cpus();
0b18d318 963 mutex_lock(&smp_cpu_state_mutex);
08d07968 964 newcpus = cpu_present_map;
1e489518 965 rc = __smp_rescan_cpus();
08d07968
HC
966 if (rc)
967 goto out;
968 cpus_andnot(newcpus, cpu_present_map, newcpus);
969 for_each_cpu_mask(cpu, newcpus) {
970 rc = smp_add_present_cpu(cpu);
971 if (rc)
972 cpu_clear(cpu, cpu_present_map);
973 }
974 rc = 0;
975out:
08d07968 976 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 977 put_online_cpus();
c10fde0d
HC
978 if (!cpus_empty(newcpus))
979 topology_schedule_update();
1e489518
HC
980 return rc;
981}
982
da5aae70 983static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
1e489518
HC
984 size_t count)
985{
986 int rc;
987
988 rc = smp_rescan_cpus();
08d07968
HC
989 return rc ? rc : count;
990}
da5aae70 991static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
992#endif /* CONFIG_HOTPLUG_CPU */
993
da5aae70 994static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
c10fde0d
HC
995{
996 ssize_t count;
997
998 mutex_lock(&smp_cpu_state_mutex);
999 count = sprintf(buf, "%d\n", cpu_management);
1000 mutex_unlock(&smp_cpu_state_mutex);
1001 return count;
1002}
1003
da5aae70
HC
1004static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf,
1005 size_t count)
c10fde0d
HC
1006{
1007 int val, rc;
1008 char delim;
1009
1010 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1011 return -EINVAL;
1012 if (val != 0 && val != 1)
1013 return -EINVAL;
1014 rc = 0;
c10fde0d 1015 get_online_cpus();
0b18d318 1016 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1017 if (cpu_management == val)
1018 goto out;
1019 rc = topology_set_cpu_management(val);
1020 if (!rc)
1021 cpu_management = val;
1022out:
c10fde0d 1023 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1024 put_online_cpus();
c10fde0d
HC
1025 return rc ? rc : count;
1026}
da5aae70
HC
1027static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1028 dispatching_store);
c10fde0d 1029
1da177e4
LT
1030static int __init topology_init(void)
1031{
1032 int cpu;
fae8b22d 1033 int rc;
2fc2d1e9
HC
1034
1035 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1036
08d07968 1037#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1038 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1039 if (rc)
1040 return rc;
1041#endif
da5aae70 1042 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1043 if (rc)
1044 return rc;
08d07968
HC
1045 for_each_present_cpu(cpu) {
1046 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1047 if (rc)
1048 return rc;
1da177e4
LT
1049 }
1050 return 0;
1051}
1da177e4 1052subsys_initcall(topology_init);
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