Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
39ce010d | 4 | * Copyright IBM Corp. 1999,2007 |
1da177e4 | 5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
39ce010d HC |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
1da177e4 | 8 | * |
39ce010d | 9 | * based on other smp stuff by |
1da177e4 LT |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
1da177e4 | 25 | #include <linux/mm.h> |
4e950f6f | 26 | #include <linux/err.h> |
1da177e4 LT |
27 | #include <linux/spinlock.h> |
28 | #include <linux/kernel_stat.h> | |
1da177e4 LT |
29 | #include <linux/delay.h> |
30 | #include <linux/cache.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/cpu.h> | |
2b67fc46 | 33 | #include <linux/timex.h> |
411ed322 | 34 | #include <linux/bootmem.h> |
46b05d26 | 35 | #include <asm/ipl.h> |
2b67fc46 | 36 | #include <asm/setup.h> |
1da177e4 LT |
37 | #include <asm/sigp.h> |
38 | #include <asm/pgalloc.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/s390_ext.h> | |
41 | #include <asm/cpcmd.h> | |
42 | #include <asm/tlbflush.h> | |
2b67fc46 | 43 | #include <asm/timer.h> |
411ed322 | 44 | #include <asm/lowcore.h> |
08d07968 | 45 | #include <asm/sclp.h> |
fae8b22d | 46 | #include <asm/cpu.h> |
1da177e4 | 47 | |
1da177e4 LT |
48 | /* |
49 | * An array with a pointer the lowcore of every CPU. | |
50 | */ | |
1da177e4 | 51 | struct _lowcore *lowcore_ptr[NR_CPUS]; |
39ce010d | 52 | EXPORT_SYMBOL(lowcore_ptr); |
1da177e4 | 53 | |
255acee7 | 54 | cpumask_t cpu_online_map = CPU_MASK_NONE; |
39ce010d HC |
55 | EXPORT_SYMBOL(cpu_online_map); |
56 | ||
48483b32 | 57 | cpumask_t cpu_possible_map = CPU_MASK_ALL; |
39ce010d | 58 | EXPORT_SYMBOL(cpu_possible_map); |
1da177e4 LT |
59 | |
60 | static struct task_struct *current_set[NR_CPUS]; | |
61 | ||
08d07968 HC |
62 | static u8 smp_cpu_type; |
63 | static int smp_use_sigp_detection; | |
64 | ||
65 | enum s390_cpu_state { | |
66 | CPU_STATE_STANDBY, | |
67 | CPU_STATE_CONFIGURED, | |
68 | }; | |
69 | ||
dbd70fb4 | 70 | DEFINE_MUTEX(smp_cpu_state_mutex); |
c10fde0d | 71 | int smp_cpu_polarization[NR_CPUS]; |
08d07968 | 72 | static int smp_cpu_state[NR_CPUS]; |
c10fde0d | 73 | static int cpu_management; |
08d07968 HC |
74 | |
75 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
08d07968 | 76 | |
1da177e4 | 77 | static void smp_ext_bitcall(int, ec_bit_sig); |
1da177e4 LT |
78 | |
79 | /* | |
63db6e8d JG |
80 | * Structure and data for __smp_call_function_map(). This is designed to |
81 | * minimise static memory requirements. It also looks cleaner. | |
1da177e4 LT |
82 | */ |
83 | static DEFINE_SPINLOCK(call_lock); | |
84 | ||
85 | struct call_data_struct { | |
86 | void (*func) (void *info); | |
87 | void *info; | |
63db6e8d JG |
88 | cpumask_t started; |
89 | cpumask_t finished; | |
1da177e4 LT |
90 | int wait; |
91 | }; | |
92 | ||
39ce010d | 93 | static struct call_data_struct *call_data; |
1da177e4 LT |
94 | |
95 | /* | |
96 | * 'Call function' interrupt callback | |
97 | */ | |
98 | static void do_call_function(void) | |
99 | { | |
100 | void (*func) (void *info) = call_data->func; | |
101 | void *info = call_data->info; | |
102 | int wait = call_data->wait; | |
103 | ||
63db6e8d | 104 | cpu_set(smp_processor_id(), call_data->started); |
1da177e4 LT |
105 | (*func)(info); |
106 | if (wait) | |
63db6e8d | 107 | cpu_set(smp_processor_id(), call_data->finished);; |
1da177e4 LT |
108 | } |
109 | ||
63db6e8d JG |
110 | static void __smp_call_function_map(void (*func) (void *info), void *info, |
111 | int nonatomic, int wait, cpumask_t map) | |
1da177e4 LT |
112 | { |
113 | struct call_data_struct data; | |
63db6e8d | 114 | int cpu, local = 0; |
1da177e4 | 115 | |
63db6e8d | 116 | /* |
25864162 | 117 | * Can deadlock when interrupts are disabled or if in wrong context. |
63db6e8d | 118 | */ |
25864162 | 119 | WARN_ON(irqs_disabled() || in_irq()); |
1da177e4 | 120 | |
63db6e8d JG |
121 | /* |
122 | * Check for local function call. We have to have the same call order | |
123 | * as in on_each_cpu() because of machine_restart_smp(). | |
124 | */ | |
125 | if (cpu_isset(smp_processor_id(), map)) { | |
126 | local = 1; | |
127 | cpu_clear(smp_processor_id(), map); | |
128 | } | |
129 | ||
130 | cpus_and(map, map, cpu_online_map); | |
131 | if (cpus_empty(map)) | |
132 | goto out; | |
1da177e4 LT |
133 | |
134 | data.func = func; | |
135 | data.info = info; | |
63db6e8d | 136 | data.started = CPU_MASK_NONE; |
1da177e4 LT |
137 | data.wait = wait; |
138 | if (wait) | |
63db6e8d | 139 | data.finished = CPU_MASK_NONE; |
1da177e4 | 140 | |
8da1aecd | 141 | spin_lock(&call_lock); |
1da177e4 | 142 | call_data = &data; |
63db6e8d JG |
143 | |
144 | for_each_cpu_mask(cpu, map) | |
145 | smp_ext_bitcall(cpu, ec_call_function); | |
1da177e4 LT |
146 | |
147 | /* Wait for response */ | |
63db6e8d | 148 | while (!cpus_equal(map, data.started)) |
1da177e4 | 149 | cpu_relax(); |
1da177e4 | 150 | if (wait) |
63db6e8d | 151 | while (!cpus_equal(map, data.finished)) |
1da177e4 | 152 | cpu_relax(); |
8da1aecd | 153 | spin_unlock(&call_lock); |
63db6e8d | 154 | out: |
8da1aecd HC |
155 | if (local) { |
156 | local_irq_disable(); | |
63db6e8d | 157 | func(info); |
8da1aecd HC |
158 | local_irq_enable(); |
159 | } | |
1da177e4 LT |
160 | } |
161 | ||
162 | /* | |
63db6e8d JG |
163 | * smp_call_function: |
164 | * @func: the function to run; this must be fast and non-blocking | |
165 | * @info: an arbitrary pointer to pass to the function | |
166 | * @nonatomic: unused | |
167 | * @wait: if true, wait (atomically) until function has completed on other CPUs | |
1da177e4 | 168 | * |
63db6e8d | 169 | * Run a function on all other CPUs. |
1da177e4 | 170 | * |
39ce010d HC |
171 | * You must not call this function with disabled interrupts, from a |
172 | * hardware interrupt handler or from a bottom half. | |
1da177e4 | 173 | */ |
63db6e8d JG |
174 | int smp_call_function(void (*func) (void *info), void *info, int nonatomic, |
175 | int wait) | |
1da177e4 | 176 | { |
63db6e8d | 177 | cpumask_t map; |
1da177e4 | 178 | |
25864162 | 179 | preempt_disable(); |
63db6e8d JG |
180 | map = cpu_online_map; |
181 | cpu_clear(smp_processor_id(), map); | |
182 | __smp_call_function_map(func, info, nonatomic, wait, map); | |
25864162 | 183 | preempt_enable(); |
63db6e8d JG |
184 | return 0; |
185 | } | |
186 | EXPORT_SYMBOL(smp_call_function); | |
1da177e4 | 187 | |
63db6e8d | 188 | /* |
3bb447fc HC |
189 | * smp_call_function_single: |
190 | * @cpu: the CPU where func should run | |
63db6e8d JG |
191 | * @func: the function to run; this must be fast and non-blocking |
192 | * @info: an arbitrary pointer to pass to the function | |
193 | * @nonatomic: unused | |
194 | * @wait: if true, wait (atomically) until function has completed on other CPUs | |
63db6e8d JG |
195 | * |
196 | * Run a function on one processor. | |
197 | * | |
39ce010d HC |
198 | * You must not call this function with disabled interrupts, from a |
199 | * hardware interrupt handler or from a bottom half. | |
63db6e8d | 200 | */ |
3bb447fc HC |
201 | int smp_call_function_single(int cpu, void (*func) (void *info), void *info, |
202 | int nonatomic, int wait) | |
63db6e8d | 203 | { |
25864162 | 204 | preempt_disable(); |
3bb447fc HC |
205 | __smp_call_function_map(func, info, nonatomic, wait, |
206 | cpumask_of_cpu(cpu)); | |
25864162 | 207 | preempt_enable(); |
1da177e4 LT |
208 | return 0; |
209 | } | |
3bb447fc | 210 | EXPORT_SYMBOL(smp_call_function_single); |
1da177e4 | 211 | |
dab5209c CO |
212 | /** |
213 | * smp_call_function_mask(): Run a function on a set of other CPUs. | |
214 | * @mask: The set of cpus to run on. Must not include the current cpu. | |
215 | * @func: The function to run. This must be fast and non-blocking. | |
216 | * @info: An arbitrary pointer to pass to the function. | |
217 | * @wait: If true, wait (atomically) until function has completed on other CPUs. | |
218 | * | |
219 | * Returns 0 on success, else a negative status code. | |
220 | * | |
221 | * If @wait is true, then returns once @func has returned; otherwise | |
222 | * it returns just before the target cpu calls @func. | |
223 | * | |
224 | * You must not call this function with disabled interrupts or from a | |
225 | * hardware interrupt handler or from a bottom half handler. | |
226 | */ | |
37c5f719 HC |
227 | int smp_call_function_mask(cpumask_t mask, void (*func)(void *), void *info, |
228 | int wait) | |
dab5209c CO |
229 | { |
230 | preempt_disable(); | |
37c5f719 | 231 | cpu_clear(smp_processor_id(), mask); |
dab5209c CO |
232 | __smp_call_function_map(func, info, 0, wait, mask); |
233 | preempt_enable(); | |
234 | return 0; | |
235 | } | |
236 | EXPORT_SYMBOL(smp_call_function_mask); | |
237 | ||
677d7623 | 238 | void smp_send_stop(void) |
1da177e4 | 239 | { |
39ce010d | 240 | int cpu, rc; |
1da177e4 | 241 | |
677d7623 HC |
242 | /* Disable all interrupts/machine checks */ |
243 | __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); | |
1da177e4 | 244 | |
677d7623 HC |
245 | /* write magic number to zero page (absolute 0) */ |
246 | lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC; | |
1da177e4 | 247 | |
677d7623 | 248 | /* stop all processors */ |
1da177e4 LT |
249 | for_each_online_cpu(cpu) { |
250 | if (cpu == smp_processor_id()) | |
251 | continue; | |
252 | do { | |
677d7623 | 253 | rc = signal_processor(cpu, sigp_stop); |
39ce010d | 254 | } while (rc == sigp_busy); |
1da177e4 | 255 | |
39ce010d | 256 | while (!smp_cpu_not_running(cpu)) |
c6b5b847 HC |
257 | cpu_relax(); |
258 | } | |
259 | } | |
260 | ||
1da177e4 LT |
261 | /* |
262 | * This is the main routine where commands issued by other | |
263 | * cpus are handled. | |
264 | */ | |
265 | ||
2b67fc46 | 266 | static void do_ext_call_interrupt(__u16 code) |
1da177e4 | 267 | { |
39ce010d | 268 | unsigned long bits; |
1da177e4 | 269 | |
39ce010d HC |
270 | /* |
271 | * handle bit signal external calls | |
272 | * | |
273 | * For the ec_schedule signal we have to do nothing. All the work | |
274 | * is done automatically when we return from the interrupt. | |
275 | */ | |
1da177e4 LT |
276 | bits = xchg(&S390_lowcore.ext_call_fast, 0); |
277 | ||
39ce010d | 278 | if (test_bit(ec_call_function, &bits)) |
1da177e4 LT |
279 | do_call_function(); |
280 | } | |
281 | ||
282 | /* | |
283 | * Send an external call sigp to another cpu and return without waiting | |
284 | * for its completion. | |
285 | */ | |
286 | static void smp_ext_bitcall(int cpu, ec_bit_sig sig) | |
287 | { | |
39ce010d HC |
288 | /* |
289 | * Set signaling bit in lowcore of target cpu and kick it | |
290 | */ | |
1da177e4 | 291 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); |
39ce010d | 292 | while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
293 | udelay(10); |
294 | } | |
295 | ||
347a8dc3 | 296 | #ifndef CONFIG_64BIT |
1da177e4 LT |
297 | /* |
298 | * this function sends a 'purge tlb' signal to another CPU. | |
299 | */ | |
300 | void smp_ptlb_callback(void *info) | |
301 | { | |
ba8a9229 | 302 | __tlb_flush_local(); |
1da177e4 LT |
303 | } |
304 | ||
305 | void smp_ptlb_all(void) | |
306 | { | |
39ce010d | 307 | on_each_cpu(smp_ptlb_callback, NULL, 0, 1); |
1da177e4 LT |
308 | } |
309 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 310 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
311 | |
312 | /* | |
313 | * this function sends a 'reschedule' IPI to another CPU. | |
314 | * it goes straight through and wastes no time serializing | |
315 | * anything. Worst case is that we lose a reschedule ... | |
316 | */ | |
317 | void smp_send_reschedule(int cpu) | |
318 | { | |
39ce010d | 319 | smp_ext_bitcall(cpu, ec_schedule); |
1da177e4 LT |
320 | } |
321 | ||
322 | /* | |
323 | * parameter area for the set/clear control bit callbacks | |
324 | */ | |
94c12cc7 | 325 | struct ec_creg_mask_parms { |
1da177e4 LT |
326 | unsigned long orvals[16]; |
327 | unsigned long andvals[16]; | |
94c12cc7 | 328 | }; |
1da177e4 LT |
329 | |
330 | /* | |
331 | * callback for setting/clearing control bits | |
332 | */ | |
39ce010d HC |
333 | static void smp_ctl_bit_callback(void *info) |
334 | { | |
94c12cc7 | 335 | struct ec_creg_mask_parms *pp = info; |
1da177e4 LT |
336 | unsigned long cregs[16]; |
337 | int i; | |
39ce010d | 338 | |
94c12cc7 MS |
339 | __ctl_store(cregs, 0, 15); |
340 | for (i = 0; i <= 15; i++) | |
1da177e4 | 341 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; |
94c12cc7 | 342 | __ctl_load(cregs, 0, 15); |
1da177e4 LT |
343 | } |
344 | ||
345 | /* | |
346 | * Set a bit in a control register of all cpus | |
347 | */ | |
94c12cc7 MS |
348 | void smp_ctl_set_bit(int cr, int bit) |
349 | { | |
350 | struct ec_creg_mask_parms parms; | |
1da177e4 | 351 | |
94c12cc7 MS |
352 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
353 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 354 | parms.orvals[cr] = 1 << bit; |
94c12cc7 | 355 | on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); |
1da177e4 | 356 | } |
39ce010d | 357 | EXPORT_SYMBOL(smp_ctl_set_bit); |
1da177e4 LT |
358 | |
359 | /* | |
360 | * Clear a bit in a control register of all cpus | |
361 | */ | |
94c12cc7 MS |
362 | void smp_ctl_clear_bit(int cr, int bit) |
363 | { | |
364 | struct ec_creg_mask_parms parms; | |
1da177e4 | 365 | |
94c12cc7 MS |
366 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
367 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 368 | parms.andvals[cr] = ~(1L << bit); |
94c12cc7 | 369 | on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); |
1da177e4 | 370 | } |
39ce010d | 371 | EXPORT_SYMBOL(smp_ctl_clear_bit); |
1da177e4 | 372 | |
08d07968 HC |
373 | /* |
374 | * In early ipl state a temp. logically cpu number is needed, so the sigp | |
375 | * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on | |
376 | * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1. | |
377 | */ | |
378 | #define CPU_INIT_NO 1 | |
379 | ||
411ed322 MH |
380 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
381 | ||
382 | /* | |
383 | * zfcpdump_prefix_array holds prefix registers for the following scenario: | |
384 | * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to | |
385 | * save its prefix registers, since they get lost, when switching from 31 bit | |
386 | * to 64 bit. | |
387 | */ | |
388 | unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \ | |
389 | __attribute__((__section__(".data"))); | |
390 | ||
285f6722 | 391 | static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) |
411ed322 | 392 | { |
411ed322 MH |
393 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) |
394 | return; | |
285f6722 HC |
395 | if (cpu >= NR_CPUS) { |
396 | printk(KERN_WARNING "Registers for cpu %i not saved since dump " | |
397 | "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS); | |
398 | return; | |
411ed322 | 399 | } |
48483b32 | 400 | zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL); |
08d07968 HC |
401 | __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu; |
402 | while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) == | |
403 | sigp_busy) | |
285f6722 HC |
404 | cpu_relax(); |
405 | memcpy(zfcpdump_save_areas[cpu], | |
406 | (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE, | |
407 | SAVE_AREA_SIZE); | |
408 | #ifdef CONFIG_64BIT | |
409 | /* copy original prefix register */ | |
410 | zfcpdump_save_areas[cpu]->s390x.pref_reg = zfcpdump_prefix_array[cpu]; | |
411 | #endif | |
411ed322 MH |
412 | } |
413 | ||
414 | union save_area *zfcpdump_save_areas[NR_CPUS + 1]; | |
415 | EXPORT_SYMBOL_GPL(zfcpdump_save_areas); | |
416 | ||
417 | #else | |
285f6722 HC |
418 | |
419 | static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { } | |
420 | ||
421 | #endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */ | |
411ed322 | 422 | |
08d07968 HC |
423 | static int cpu_stopped(int cpu) |
424 | { | |
425 | __u32 status; | |
426 | ||
427 | /* Check for stopped state */ | |
428 | if (signal_processor_ps(&status, 0, cpu, sigp_sense) == | |
429 | sigp_status_stored) { | |
430 | if (status & 0x40) | |
431 | return 1; | |
432 | } | |
433 | return 0; | |
434 | } | |
435 | ||
08d07968 HC |
436 | static int cpu_known(int cpu_id) |
437 | { | |
438 | int cpu; | |
439 | ||
440 | for_each_present_cpu(cpu) { | |
441 | if (__cpu_logical_map[cpu] == cpu_id) | |
442 | return 1; | |
443 | } | |
444 | return 0; | |
445 | } | |
446 | ||
447 | static int smp_rescan_cpus_sigp(cpumask_t avail) | |
448 | { | |
449 | int cpu_id, logical_cpu; | |
450 | ||
451 | logical_cpu = first_cpu(avail); | |
452 | if (logical_cpu == NR_CPUS) | |
453 | return 0; | |
454 | for (cpu_id = 0; cpu_id <= 65535; cpu_id++) { | |
455 | if (cpu_known(cpu_id)) | |
456 | continue; | |
457 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 458 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
459 | if (!cpu_stopped(logical_cpu)) |
460 | continue; | |
461 | cpu_set(logical_cpu, cpu_present_map); | |
462 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
463 | logical_cpu = next_cpu(logical_cpu, avail); | |
464 | if (logical_cpu == NR_CPUS) | |
465 | break; | |
466 | } | |
467 | return 0; | |
468 | } | |
469 | ||
48483b32 | 470 | static int smp_rescan_cpus_sclp(cpumask_t avail) |
08d07968 HC |
471 | { |
472 | struct sclp_cpu_info *info; | |
473 | int cpu_id, logical_cpu, cpu; | |
474 | int rc; | |
475 | ||
476 | logical_cpu = first_cpu(avail); | |
477 | if (logical_cpu == NR_CPUS) | |
478 | return 0; | |
48483b32 | 479 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
08d07968 HC |
480 | if (!info) |
481 | return -ENOMEM; | |
482 | rc = sclp_get_cpu_info(info); | |
483 | if (rc) | |
484 | goto out; | |
485 | for (cpu = 0; cpu < info->combined; cpu++) { | |
486 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
487 | continue; | |
488 | cpu_id = info->cpu[cpu].address; | |
489 | if (cpu_known(cpu_id)) | |
490 | continue; | |
491 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 492 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
493 | cpu_set(logical_cpu, cpu_present_map); |
494 | if (cpu >= info->configured) | |
495 | smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY; | |
496 | else | |
497 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
498 | logical_cpu = next_cpu(logical_cpu, avail); | |
499 | if (logical_cpu == NR_CPUS) | |
500 | break; | |
501 | } | |
502 | out: | |
48483b32 | 503 | kfree(info); |
08d07968 HC |
504 | return rc; |
505 | } | |
506 | ||
507 | static int smp_rescan_cpus(void) | |
508 | { | |
509 | cpumask_t avail; | |
510 | ||
48483b32 | 511 | cpus_xor(avail, cpu_possible_map, cpu_present_map); |
08d07968 HC |
512 | if (smp_use_sigp_detection) |
513 | return smp_rescan_cpus_sigp(avail); | |
514 | else | |
515 | return smp_rescan_cpus_sclp(avail); | |
1da177e4 LT |
516 | } |
517 | ||
48483b32 HC |
518 | static void __init smp_detect_cpus(void) |
519 | { | |
520 | unsigned int cpu, c_cpus, s_cpus; | |
521 | struct sclp_cpu_info *info; | |
522 | u16 boot_cpu_addr, cpu_addr; | |
523 | ||
524 | c_cpus = 1; | |
525 | s_cpus = 0; | |
526 | boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr; | |
527 | info = kmalloc(sizeof(*info), GFP_KERNEL); | |
528 | if (!info) | |
529 | panic("smp_detect_cpus failed to allocate memory\n"); | |
530 | /* Use sigp detection algorithm if sclp doesn't work. */ | |
531 | if (sclp_get_cpu_info(info)) { | |
532 | smp_use_sigp_detection = 1; | |
533 | for (cpu = 0; cpu <= 65535; cpu++) { | |
534 | if (cpu == boot_cpu_addr) | |
535 | continue; | |
536 | __cpu_logical_map[CPU_INIT_NO] = cpu; | |
537 | if (!cpu_stopped(CPU_INIT_NO)) | |
538 | continue; | |
539 | smp_get_save_area(c_cpus, cpu); | |
540 | c_cpus++; | |
541 | } | |
542 | goto out; | |
543 | } | |
544 | ||
545 | if (info->has_cpu_type) { | |
546 | for (cpu = 0; cpu < info->combined; cpu++) { | |
547 | if (info->cpu[cpu].address == boot_cpu_addr) { | |
548 | smp_cpu_type = info->cpu[cpu].type; | |
549 | break; | |
550 | } | |
551 | } | |
552 | } | |
553 | ||
554 | for (cpu = 0; cpu < info->combined; cpu++) { | |
555 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
556 | continue; | |
557 | cpu_addr = info->cpu[cpu].address; | |
558 | if (cpu_addr == boot_cpu_addr) | |
559 | continue; | |
560 | __cpu_logical_map[CPU_INIT_NO] = cpu_addr; | |
561 | if (!cpu_stopped(CPU_INIT_NO)) { | |
562 | s_cpus++; | |
563 | continue; | |
564 | } | |
565 | smp_get_save_area(c_cpus, cpu_addr); | |
566 | c_cpus++; | |
567 | } | |
568 | out: | |
569 | kfree(info); | |
570 | printk(KERN_INFO "CPUs: %d configured, %d standby\n", c_cpus, s_cpus); | |
9d40d2e3 | 571 | get_online_cpus(); |
48483b32 | 572 | smp_rescan_cpus(); |
9d40d2e3 | 573 | put_online_cpus(); |
48483b32 HC |
574 | } |
575 | ||
1da177e4 | 576 | /* |
39ce010d | 577 | * Activate a secondary processor. |
1da177e4 | 578 | */ |
ea1f4eec | 579 | int __cpuinit start_secondary(void *cpuvoid) |
1da177e4 | 580 | { |
39ce010d HC |
581 | /* Setup the cpu */ |
582 | cpu_init(); | |
5bfb5d69 | 583 | preempt_disable(); |
d54853ef | 584 | /* Enable TOD clock interrupts on the secondary cpu. */ |
39ce010d | 585 | init_cpu_timer(); |
1da177e4 | 586 | #ifdef CONFIG_VIRT_TIMER |
d54853ef | 587 | /* Enable cpu timer interrupts on the secondary cpu. */ |
39ce010d | 588 | init_cpu_vtimer(); |
1da177e4 | 589 | #endif |
1da177e4 | 590 | /* Enable pfault pseudo page faults on this cpu. */ |
29b08d2b HC |
591 | pfault_init(); |
592 | ||
1da177e4 LT |
593 | /* Mark this cpu as online */ |
594 | cpu_set(smp_processor_id(), cpu_online_map); | |
595 | /* Switch on interrupts */ | |
596 | local_irq_enable(); | |
39ce010d HC |
597 | /* Print info about this processor */ |
598 | print_cpu_info(&S390_lowcore.cpu_data); | |
599 | /* cpu_idle will call schedule for us */ | |
600 | cpu_idle(); | |
601 | return 0; | |
1da177e4 LT |
602 | } |
603 | ||
604 | static void __init smp_create_idle(unsigned int cpu) | |
605 | { | |
606 | struct task_struct *p; | |
607 | ||
608 | /* | |
609 | * don't care about the psw and regs settings since we'll never | |
610 | * reschedule the forked task. | |
611 | */ | |
612 | p = fork_idle(cpu); | |
613 | if (IS_ERR(p)) | |
614 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
615 | current_set[cpu] = p; | |
fae8b22d | 616 | spin_lock_init(&(&per_cpu(s390_idle, cpu))->lock); |
1da177e4 LT |
617 | } |
618 | ||
1cb6bb4b HC |
619 | static int __cpuinit smp_alloc_lowcore(int cpu) |
620 | { | |
621 | unsigned long async_stack, panic_stack; | |
622 | struct _lowcore *lowcore; | |
623 | int lc_order; | |
624 | ||
625 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
626 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order); | |
627 | if (!lowcore) | |
628 | return -ENOMEM; | |
629 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
1cb6bb4b | 630 | panic_stack = __get_free_page(GFP_KERNEL); |
591bb4f6 HC |
631 | if (!panic_stack || !async_stack) |
632 | goto out; | |
98c7b388 HC |
633 | memcpy(lowcore, &S390_lowcore, 512); |
634 | memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512); | |
1cb6bb4b HC |
635 | lowcore->async_stack = async_stack + ASYNC_SIZE; |
636 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
637 | ||
638 | #ifndef CONFIG_64BIT | |
639 | if (MACHINE_HAS_IEEE) { | |
640 | unsigned long save_area; | |
641 | ||
642 | save_area = get_zeroed_page(GFP_KERNEL); | |
643 | if (!save_area) | |
644 | goto out_save_area; | |
645 | lowcore->extended_save_area_addr = (u32) save_area; | |
646 | } | |
647 | #endif | |
648 | lowcore_ptr[cpu] = lowcore; | |
649 | return 0; | |
650 | ||
651 | #ifndef CONFIG_64BIT | |
652 | out_save_area: | |
653 | free_page(panic_stack); | |
654 | #endif | |
591bb4f6 | 655 | out: |
1cb6bb4b | 656 | free_pages(async_stack, ASYNC_ORDER); |
1cb6bb4b HC |
657 | free_pages((unsigned long) lowcore, lc_order); |
658 | return -ENOMEM; | |
659 | } | |
660 | ||
661 | #ifdef CONFIG_HOTPLUG_CPU | |
662 | static void smp_free_lowcore(int cpu) | |
663 | { | |
664 | struct _lowcore *lowcore; | |
665 | int lc_order; | |
666 | ||
667 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
668 | lowcore = lowcore_ptr[cpu]; | |
669 | #ifndef CONFIG_64BIT | |
670 | if (MACHINE_HAS_IEEE) | |
671 | free_page((unsigned long) lowcore->extended_save_area_addr); | |
672 | #endif | |
673 | free_page(lowcore->panic_stack - PAGE_SIZE); | |
674 | free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER); | |
675 | free_pages((unsigned long) lowcore, lc_order); | |
676 | lowcore_ptr[cpu] = NULL; | |
677 | } | |
678 | #endif /* CONFIG_HOTPLUG_CPU */ | |
679 | ||
1da177e4 | 680 | /* Upping and downing of CPUs */ |
1cb6bb4b | 681 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 LT |
682 | { |
683 | struct task_struct *idle; | |
39ce010d | 684 | struct _lowcore *cpu_lowcore; |
1da177e4 | 685 | struct stack_frame *sf; |
39ce010d | 686 | sigp_ccode ccode; |
1da177e4 | 687 | |
08d07968 HC |
688 | if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED) |
689 | return -EIO; | |
1cb6bb4b HC |
690 | if (smp_alloc_lowcore(cpu)) |
691 | return -ENOMEM; | |
1da177e4 LT |
692 | |
693 | ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), | |
694 | cpu, sigp_set_prefix); | |
39ce010d | 695 | if (ccode) { |
1da177e4 LT |
696 | printk("sigp_set_prefix failed for cpu %d " |
697 | "with condition code %d\n", | |
698 | (int) cpu, (int) ccode); | |
699 | return -EIO; | |
700 | } | |
701 | ||
702 | idle = current_set[cpu]; | |
39ce010d | 703 | cpu_lowcore = lowcore_ptr[cpu]; |
1da177e4 | 704 | cpu_lowcore->kernel_stack = (unsigned long) |
39ce010d | 705 | task_stack_page(idle) + THREAD_SIZE; |
1cb6bb4b | 706 | cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle); |
1da177e4 LT |
707 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
708 | - sizeof(struct pt_regs) | |
709 | - sizeof(struct stack_frame)); | |
710 | memset(sf, 0, sizeof(struct stack_frame)); | |
711 | sf->gprs[9] = (unsigned long) sf; | |
712 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
713 | __ctl_store(cpu_lowcore->cregs_save_area[0], 0, 15); | |
94c12cc7 MS |
714 | asm volatile( |
715 | " stam 0,15,0(%0)" | |
716 | : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); | |
1da177e4 | 717 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; |
39ce010d HC |
718 | cpu_lowcore->current_task = (unsigned long) idle; |
719 | cpu_lowcore->cpu_data.cpu_nr = cpu; | |
591bb4f6 HC |
720 | cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce; |
721 | cpu_lowcore->ipl_device = S390_lowcore.ipl_device; | |
1da177e4 | 722 | eieio(); |
699ff13f | 723 | |
39ce010d | 724 | while (signal_processor(cpu, sigp_restart) == sigp_busy) |
699ff13f | 725 | udelay(10); |
1da177e4 LT |
726 | |
727 | while (!cpu_online(cpu)) | |
728 | cpu_relax(); | |
729 | return 0; | |
730 | } | |
731 | ||
48483b32 | 732 | static int __init setup_possible_cpus(char *s) |
255acee7 | 733 | { |
48483b32 | 734 | int pcpus, cpu; |
255acee7 | 735 | |
48483b32 HC |
736 | pcpus = simple_strtoul(s, NULL, 0); |
737 | cpu_possible_map = cpumask_of_cpu(0); | |
738 | for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++) | |
255acee7 | 739 | cpu_set(cpu, cpu_possible_map); |
37a33026 HC |
740 | return 0; |
741 | } | |
742 | early_param("possible_cpus", setup_possible_cpus); | |
743 | ||
48483b32 HC |
744 | #ifdef CONFIG_HOTPLUG_CPU |
745 | ||
39ce010d | 746 | int __cpu_disable(void) |
1da177e4 | 747 | { |
94c12cc7 | 748 | struct ec_creg_mask_parms cr_parms; |
f3705136 | 749 | int cpu = smp_processor_id(); |
1da177e4 | 750 | |
f3705136 | 751 | cpu_clear(cpu, cpu_online_map); |
1da177e4 | 752 | |
1da177e4 | 753 | /* Disable pfault pseudo page faults on this cpu. */ |
29b08d2b | 754 | pfault_fini(); |
1da177e4 | 755 | |
94c12cc7 MS |
756 | memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals)); |
757 | memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals)); | |
1da177e4 | 758 | |
94c12cc7 | 759 | /* disable all external interrupts */ |
1da177e4 | 760 | cr_parms.orvals[0] = 0; |
39ce010d HC |
761 | cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 | |
762 | 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4); | |
1da177e4 | 763 | /* disable all I/O interrupts */ |
1da177e4 | 764 | cr_parms.orvals[6] = 0; |
39ce010d HC |
765 | cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 | |
766 | 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24); | |
1da177e4 | 767 | /* disable most machine checks */ |
1da177e4 | 768 | cr_parms.orvals[14] = 0; |
39ce010d HC |
769 | cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 | |
770 | 1 << 25 | 1 << 24); | |
94c12cc7 | 771 | |
1da177e4 LT |
772 | smp_ctl_bit_callback(&cr_parms); |
773 | ||
1da177e4 LT |
774 | return 0; |
775 | } | |
776 | ||
39ce010d | 777 | void __cpu_die(unsigned int cpu) |
1da177e4 LT |
778 | { |
779 | /* Wait until target cpu is down */ | |
780 | while (!smp_cpu_not_running(cpu)) | |
781 | cpu_relax(); | |
1cb6bb4b | 782 | smp_free_lowcore(cpu); |
08d07968 | 783 | printk(KERN_INFO "Processor %d spun down\n", cpu); |
1da177e4 LT |
784 | } |
785 | ||
39ce010d | 786 | void cpu_die(void) |
1da177e4 LT |
787 | { |
788 | idle_task_exit(); | |
789 | signal_processor(smp_processor_id(), sigp_stop); | |
790 | BUG(); | |
39ce010d | 791 | for (;;); |
1da177e4 LT |
792 | } |
793 | ||
255acee7 HC |
794 | #endif /* CONFIG_HOTPLUG_CPU */ |
795 | ||
1da177e4 LT |
796 | void __init smp_prepare_cpus(unsigned int max_cpus) |
797 | { | |
591bb4f6 HC |
798 | #ifndef CONFIG_64BIT |
799 | unsigned long save_area = 0; | |
800 | #endif | |
801 | unsigned long async_stack, panic_stack; | |
802 | struct _lowcore *lowcore; | |
1da177e4 | 803 | unsigned int cpu; |
591bb4f6 | 804 | int lc_order; |
39ce010d | 805 | |
48483b32 HC |
806 | smp_detect_cpus(); |
807 | ||
39ce010d HC |
808 | /* request the 0x1201 emergency signal external interrupt */ |
809 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
810 | panic("Couldn't request external interrupt 0x1201"); | |
1da177e4 LT |
811 | print_cpu_info(&S390_lowcore.cpu_data); |
812 | ||
591bb4f6 HC |
813 | /* Reallocate current lowcore, but keep its contents. */ |
814 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
815 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order); | |
816 | panic_stack = __get_free_page(GFP_KERNEL); | |
817 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
347a8dc3 | 818 | #ifndef CONFIG_64BIT |
77fa2245 | 819 | if (MACHINE_HAS_IEEE) |
591bb4f6 | 820 | save_area = get_zeroed_page(GFP_KERNEL); |
77fa2245 | 821 | #endif |
591bb4f6 HC |
822 | local_irq_disable(); |
823 | local_mcck_disable(); | |
824 | lowcore_ptr[smp_processor_id()] = lowcore; | |
825 | *lowcore = S390_lowcore; | |
826 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
827 | lowcore->async_stack = async_stack + ASYNC_SIZE; | |
828 | #ifndef CONFIG_64BIT | |
829 | if (MACHINE_HAS_IEEE) | |
830 | lowcore->extended_save_area_addr = (u32) save_area; | |
831 | #endif | |
832 | set_prefix((u32)(unsigned long) lowcore); | |
833 | local_mcck_enable(); | |
834 | local_irq_enable(); | |
97db7fbf | 835 | for_each_possible_cpu(cpu) |
1da177e4 LT |
836 | if (cpu != smp_processor_id()) |
837 | smp_create_idle(cpu); | |
838 | } | |
839 | ||
ea1f4eec | 840 | void __init smp_prepare_boot_cpu(void) |
1da177e4 LT |
841 | { |
842 | BUG_ON(smp_processor_id() != 0); | |
843 | ||
48483b32 HC |
844 | current_thread_info()->cpu = 0; |
845 | cpu_set(0, cpu_present_map); | |
1da177e4 | 846 | cpu_set(0, cpu_online_map); |
1da177e4 LT |
847 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
848 | current_set[0] = current; | |
08d07968 | 849 | smp_cpu_state[0] = CPU_STATE_CONFIGURED; |
c10fde0d | 850 | smp_cpu_polarization[0] = POLARIZATION_UNKNWN; |
fae8b22d | 851 | spin_lock_init(&(&__get_cpu_var(s390_idle))->lock); |
1da177e4 LT |
852 | } |
853 | ||
ea1f4eec | 854 | void __init smp_cpus_done(unsigned int max_cpus) |
1da177e4 | 855 | { |
1da177e4 LT |
856 | } |
857 | ||
858 | /* | |
859 | * the frequency of the profiling timer can be changed | |
860 | * by writing a multiplier value into /proc/profile. | |
861 | * | |
862 | * usually you want to run this on all CPUs ;) | |
863 | */ | |
864 | int setup_profiling_timer(unsigned int multiplier) | |
865 | { | |
39ce010d | 866 | return 0; |
1da177e4 LT |
867 | } |
868 | ||
08d07968 HC |
869 | #ifdef CONFIG_HOTPLUG_CPU |
870 | static ssize_t cpu_configure_show(struct sys_device *dev, char *buf) | |
871 | { | |
872 | ssize_t count; | |
873 | ||
874 | mutex_lock(&smp_cpu_state_mutex); | |
875 | count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]); | |
876 | mutex_unlock(&smp_cpu_state_mutex); | |
877 | return count; | |
878 | } | |
879 | ||
880 | static ssize_t cpu_configure_store(struct sys_device *dev, const char *buf, | |
881 | size_t count) | |
882 | { | |
883 | int cpu = dev->id; | |
884 | int val, rc; | |
885 | char delim; | |
886 | ||
887 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
888 | return -EINVAL; | |
889 | if (val != 0 && val != 1) | |
890 | return -EINVAL; | |
891 | ||
892 | mutex_lock(&smp_cpu_state_mutex); | |
9d40d2e3 | 893 | get_online_cpus(); |
08d07968 HC |
894 | rc = -EBUSY; |
895 | if (cpu_online(cpu)) | |
896 | goto out; | |
897 | rc = 0; | |
898 | switch (val) { | |
899 | case 0: | |
900 | if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) { | |
901 | rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]); | |
c10fde0d | 902 | if (!rc) { |
08d07968 | 903 | smp_cpu_state[cpu] = CPU_STATE_STANDBY; |
c10fde0d HC |
904 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
905 | } | |
08d07968 HC |
906 | } |
907 | break; | |
908 | case 1: | |
909 | if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) { | |
910 | rc = sclp_cpu_configure(__cpu_logical_map[cpu]); | |
c10fde0d | 911 | if (!rc) { |
08d07968 | 912 | smp_cpu_state[cpu] = CPU_STATE_CONFIGURED; |
c10fde0d HC |
913 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
914 | } | |
08d07968 HC |
915 | } |
916 | break; | |
917 | default: | |
918 | break; | |
919 | } | |
920 | out: | |
9d40d2e3 | 921 | put_online_cpus(); |
08d07968 HC |
922 | mutex_unlock(&smp_cpu_state_mutex); |
923 | return rc ? rc : count; | |
924 | } | |
925 | static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); | |
926 | #endif /* CONFIG_HOTPLUG_CPU */ | |
927 | ||
c10fde0d HC |
928 | static ssize_t cpu_polarization_show(struct sys_device *dev, char *buf) |
929 | { | |
930 | int cpu = dev->id; | |
931 | ssize_t count; | |
932 | ||
933 | mutex_lock(&smp_cpu_state_mutex); | |
934 | switch (smp_cpu_polarization[cpu]) { | |
935 | case POLARIZATION_HRZ: | |
936 | count = sprintf(buf, "horizontal\n"); | |
937 | break; | |
938 | case POLARIZATION_VL: | |
939 | count = sprintf(buf, "vertical:low\n"); | |
940 | break; | |
941 | case POLARIZATION_VM: | |
942 | count = sprintf(buf, "vertical:medium\n"); | |
943 | break; | |
944 | case POLARIZATION_VH: | |
945 | count = sprintf(buf, "vertical:high\n"); | |
946 | break; | |
947 | default: | |
948 | count = sprintf(buf, "unknown\n"); | |
949 | break; | |
950 | } | |
951 | mutex_unlock(&smp_cpu_state_mutex); | |
952 | return count; | |
953 | } | |
954 | static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL); | |
955 | ||
08d07968 HC |
956 | static ssize_t show_cpu_address(struct sys_device *dev, char *buf) |
957 | { | |
958 | return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]); | |
959 | } | |
960 | static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL); | |
961 | ||
962 | ||
963 | static struct attribute *cpu_common_attrs[] = { | |
964 | #ifdef CONFIG_HOTPLUG_CPU | |
965 | &attr_configure.attr, | |
966 | #endif | |
967 | &attr_address.attr, | |
c10fde0d | 968 | &attr_polarization.attr, |
08d07968 HC |
969 | NULL, |
970 | }; | |
971 | ||
972 | static struct attribute_group cpu_common_attr_group = { | |
973 | .attrs = cpu_common_attrs, | |
974 | }; | |
1da177e4 | 975 | |
2fc2d1e9 HC |
976 | static ssize_t show_capability(struct sys_device *dev, char *buf) |
977 | { | |
978 | unsigned int capability; | |
979 | int rc; | |
980 | ||
981 | rc = get_cpu_capability(&capability); | |
982 | if (rc) | |
983 | return rc; | |
984 | return sprintf(buf, "%u\n", capability); | |
985 | } | |
986 | static SYSDEV_ATTR(capability, 0444, show_capability, NULL); | |
987 | ||
fae8b22d HC |
988 | static ssize_t show_idle_count(struct sys_device *dev, char *buf) |
989 | { | |
990 | struct s390_idle_data *idle; | |
991 | unsigned long long idle_count; | |
992 | ||
993 | idle = &per_cpu(s390_idle, dev->id); | |
994 | spin_lock_irq(&idle->lock); | |
995 | idle_count = idle->idle_count; | |
996 | spin_unlock_irq(&idle->lock); | |
997 | return sprintf(buf, "%llu\n", idle_count); | |
998 | } | |
999 | static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL); | |
1000 | ||
1001 | static ssize_t show_idle_time(struct sys_device *dev, char *buf) | |
1002 | { | |
1003 | struct s390_idle_data *idle; | |
1004 | unsigned long long new_time; | |
1005 | ||
1006 | idle = &per_cpu(s390_idle, dev->id); | |
1007 | spin_lock_irq(&idle->lock); | |
1008 | if (idle->in_idle) { | |
1009 | new_time = get_clock(); | |
1010 | idle->idle_time += new_time - idle->idle_enter; | |
1011 | idle->idle_enter = new_time; | |
1012 | } | |
1013 | new_time = idle->idle_time; | |
1014 | spin_unlock_irq(&idle->lock); | |
69d39d66 | 1015 | return sprintf(buf, "%llu\n", new_time >> 12); |
fae8b22d | 1016 | } |
69d39d66 | 1017 | static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL); |
fae8b22d | 1018 | |
08d07968 | 1019 | static struct attribute *cpu_online_attrs[] = { |
fae8b22d HC |
1020 | &attr_capability.attr, |
1021 | &attr_idle_count.attr, | |
69d39d66 | 1022 | &attr_idle_time_us.attr, |
fae8b22d HC |
1023 | NULL, |
1024 | }; | |
1025 | ||
08d07968 HC |
1026 | static struct attribute_group cpu_online_attr_group = { |
1027 | .attrs = cpu_online_attrs, | |
fae8b22d HC |
1028 | }; |
1029 | ||
2fc2d1e9 HC |
1030 | static int __cpuinit smp_cpu_notify(struct notifier_block *self, |
1031 | unsigned long action, void *hcpu) | |
1032 | { | |
1033 | unsigned int cpu = (unsigned int)(long)hcpu; | |
1034 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
1035 | struct sys_device *s = &c->sysdev; | |
fae8b22d | 1036 | struct s390_idle_data *idle; |
2fc2d1e9 HC |
1037 | |
1038 | switch (action) { | |
1039 | case CPU_ONLINE: | |
8bb78442 | 1040 | case CPU_ONLINE_FROZEN: |
fae8b22d HC |
1041 | idle = &per_cpu(s390_idle, cpu); |
1042 | spin_lock_irq(&idle->lock); | |
1043 | idle->idle_enter = 0; | |
1044 | idle->idle_time = 0; | |
1045 | idle->idle_count = 0; | |
1046 | spin_unlock_irq(&idle->lock); | |
08d07968 | 1047 | if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) |
2fc2d1e9 HC |
1048 | return NOTIFY_BAD; |
1049 | break; | |
1050 | case CPU_DEAD: | |
8bb78442 | 1051 | case CPU_DEAD_FROZEN: |
08d07968 | 1052 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); |
2fc2d1e9 HC |
1053 | break; |
1054 | } | |
1055 | return NOTIFY_OK; | |
1056 | } | |
1057 | ||
1058 | static struct notifier_block __cpuinitdata smp_cpu_nb = { | |
39ce010d | 1059 | .notifier_call = smp_cpu_notify, |
2fc2d1e9 HC |
1060 | }; |
1061 | ||
2bc89b5e | 1062 | static int __devinit smp_add_present_cpu(int cpu) |
08d07968 HC |
1063 | { |
1064 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
1065 | struct sys_device *s = &c->sysdev; | |
1066 | int rc; | |
1067 | ||
1068 | c->hotpluggable = 1; | |
1069 | rc = register_cpu(c, cpu); | |
1070 | if (rc) | |
1071 | goto out; | |
1072 | rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); | |
1073 | if (rc) | |
1074 | goto out_cpu; | |
1075 | if (!cpu_online(cpu)) | |
1076 | goto out; | |
1077 | rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); | |
1078 | if (!rc) | |
1079 | return 0; | |
1080 | sysfs_remove_group(&s->kobj, &cpu_common_attr_group); | |
1081 | out_cpu: | |
1082 | #ifdef CONFIG_HOTPLUG_CPU | |
1083 | unregister_cpu(c); | |
1084 | #endif | |
1085 | out: | |
1086 | return rc; | |
1087 | } | |
1088 | ||
1089 | #ifdef CONFIG_HOTPLUG_CPU | |
2bc89b5e HC |
1090 | static ssize_t __ref rescan_store(struct sys_device *dev, |
1091 | const char *buf, size_t count) | |
08d07968 HC |
1092 | { |
1093 | cpumask_t newcpus; | |
1094 | int cpu; | |
1095 | int rc; | |
1096 | ||
1097 | mutex_lock(&smp_cpu_state_mutex); | |
9d40d2e3 | 1098 | get_online_cpus(); |
08d07968 HC |
1099 | newcpus = cpu_present_map; |
1100 | rc = smp_rescan_cpus(); | |
1101 | if (rc) | |
1102 | goto out; | |
1103 | cpus_andnot(newcpus, cpu_present_map, newcpus); | |
1104 | for_each_cpu_mask(cpu, newcpus) { | |
1105 | rc = smp_add_present_cpu(cpu); | |
1106 | if (rc) | |
1107 | cpu_clear(cpu, cpu_present_map); | |
1108 | } | |
1109 | rc = 0; | |
1110 | out: | |
9d40d2e3 | 1111 | put_online_cpus(); |
08d07968 | 1112 | mutex_unlock(&smp_cpu_state_mutex); |
c10fde0d HC |
1113 | if (!cpus_empty(newcpus)) |
1114 | topology_schedule_update(); | |
08d07968 HC |
1115 | return rc ? rc : count; |
1116 | } | |
1117 | static SYSDEV_ATTR(rescan, 0200, NULL, rescan_store); | |
1118 | #endif /* CONFIG_HOTPLUG_CPU */ | |
1119 | ||
c10fde0d HC |
1120 | static ssize_t dispatching_show(struct sys_device *dev, char *buf) |
1121 | { | |
1122 | ssize_t count; | |
1123 | ||
1124 | mutex_lock(&smp_cpu_state_mutex); | |
1125 | count = sprintf(buf, "%d\n", cpu_management); | |
1126 | mutex_unlock(&smp_cpu_state_mutex); | |
1127 | return count; | |
1128 | } | |
1129 | ||
1130 | static ssize_t dispatching_store(struct sys_device *dev, const char *buf, | |
1131 | size_t count) | |
1132 | { | |
1133 | int val, rc; | |
1134 | char delim; | |
1135 | ||
1136 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
1137 | return -EINVAL; | |
1138 | if (val != 0 && val != 1) | |
1139 | return -EINVAL; | |
1140 | rc = 0; | |
1141 | mutex_lock(&smp_cpu_state_mutex); | |
1142 | get_online_cpus(); | |
1143 | if (cpu_management == val) | |
1144 | goto out; | |
1145 | rc = topology_set_cpu_management(val); | |
1146 | if (!rc) | |
1147 | cpu_management = val; | |
1148 | out: | |
1149 | put_online_cpus(); | |
1150 | mutex_unlock(&smp_cpu_state_mutex); | |
1151 | return rc ? rc : count; | |
1152 | } | |
1153 | static SYSDEV_ATTR(dispatching, 0644, dispatching_show, dispatching_store); | |
1154 | ||
1da177e4 LT |
1155 | static int __init topology_init(void) |
1156 | { | |
1157 | int cpu; | |
fae8b22d | 1158 | int rc; |
2fc2d1e9 HC |
1159 | |
1160 | register_cpu_notifier(&smp_cpu_nb); | |
1da177e4 | 1161 | |
08d07968 HC |
1162 | #ifdef CONFIG_HOTPLUG_CPU |
1163 | rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj, | |
1164 | &attr_rescan.attr); | |
1165 | if (rc) | |
1166 | return rc; | |
1167 | #endif | |
c10fde0d HC |
1168 | rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj, |
1169 | &attr_dispatching.attr); | |
1170 | if (rc) | |
1171 | return rc; | |
08d07968 HC |
1172 | for_each_present_cpu(cpu) { |
1173 | rc = smp_add_present_cpu(cpu); | |
fae8b22d HC |
1174 | if (rc) |
1175 | return rc; | |
1da177e4 LT |
1176 | } |
1177 | return 0; | |
1178 | } | |
1da177e4 | 1179 | subsys_initcall(topology_init); |