[S390] hwsampler: Set a sane default sampling rate
[deliverable/linux.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
155af2f9 4 * Copyright IBM Corp. 1999, 2009
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
395d31d4
MS
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
f230886b 26#include <linux/workqueue.h>
1da177e4
LT
27#include <linux/module.h>
28#include <linux/init.h>
1da177e4 29#include <linux/mm.h>
4e950f6f 30#include <linux/err.h>
1da177e4
LT
31#include <linux/spinlock.h>
32#include <linux/kernel_stat.h>
1da177e4
LT
33#include <linux/delay.h>
34#include <linux/cache.h>
35#include <linux/interrupt.h>
3324e60a 36#include <linux/irqflags.h>
1da177e4 37#include <linux/cpu.h>
2b67fc46 38#include <linux/timex.h>
411ed322 39#include <linux/bootmem.h>
5a0e3ad6 40#include <linux/slab.h>
cbb870c8 41#include <asm/asm-offsets.h>
46b05d26 42#include <asm/ipl.h>
2b67fc46 43#include <asm/setup.h>
1da177e4
LT
44#include <asm/sigp.h>
45#include <asm/pgalloc.h>
46#include <asm/irq.h>
1da177e4
LT
47#include <asm/cpcmd.h>
48#include <asm/tlbflush.h>
2b67fc46 49#include <asm/timer.h>
411ed322 50#include <asm/lowcore.h>
08d07968 51#include <asm/sclp.h>
76d4e00a 52#include <asm/cputime.h>
c742b31c 53#include <asm/vdso.h>
4bb5e07b 54#include <asm/cpu.h>
a806170e 55#include "entry.h"
1da177e4 56
fb380aad 57/* logical cpu to cpu address */
a93b8ec1 58unsigned short __cpu_logical_map[NR_CPUS];
fb380aad 59
1da177e4
LT
60static struct task_struct *current_set[NR_CPUS];
61
08d07968
HC
62static u8 smp_cpu_type;
63static int smp_use_sigp_detection;
64
65enum s390_cpu_state {
66 CPU_STATE_STANDBY,
67 CPU_STATE_CONFIGURED,
68};
69
dbd70fb4 70DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 71int smp_cpu_polarization[NR_CPUS];
08d07968 72static int smp_cpu_state[NR_CPUS];
c10fde0d 73static int cpu_management;
08d07968
HC
74
75static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 76
a93b8ec1 77static void smp_ext_bitcall(int, int);
1da177e4 78
a93b8ec1 79static int raw_cpu_stopped(int cpu)
5c0b912e 80{
a93b8ec1 81 u32 status;
5c0b912e 82
a93b8ec1 83 switch (raw_sigp_ps(&status, 0, cpu, sigp_sense)) {
5c0b912e
HC
84 case sigp_status_stored:
85 /* Check for stopped and check stop state */
86 if (status & 0x50)
87 return 1;
88 break;
89 default:
90 break;
91 }
92 return 0;
93}
94
a93b8ec1
HC
95static inline int cpu_stopped(int cpu)
96{
97 return raw_cpu_stopped(cpu_logical_map(cpu));
98}
99
2c2df118
HC
100void smp_switch_to_ipl_cpu(void (*func)(void *), void *data)
101{
102 struct _lowcore *lc, *current_lc;
103 struct stack_frame *sf;
104 struct pt_regs *regs;
105 unsigned long sp;
106
107 if (smp_processor_id() == 0)
108 func(data);
109 __load_psw_mask(PSW_BASE_BITS | PSW_DEFAULT_KEY);
110 /* Disable lowcore protection */
111 __ctl_clear_bit(0, 28);
112 current_lc = lowcore_ptr[smp_processor_id()];
113 lc = lowcore_ptr[0];
114 if (!lc)
115 lc = current_lc;
116 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
117 lc->restart_psw.addr = PSW_ADDR_AMODE | (unsigned long) smp_restart_cpu;
118 if (!cpu_online(0))
119 smp_switch_to_cpu(func, data, 0, stap(), __cpu_logical_map[0]);
a93b8ec1 120 while (sigp(0, sigp_stop_and_store_status) == sigp_busy)
2c2df118
HC
121 cpu_relax();
122 sp = lc->panic_stack;
123 sp -= sizeof(struct pt_regs);
124 regs = (struct pt_regs *) sp;
125 memcpy(&regs->gprs, &current_lc->gpregs_save_area, sizeof(regs->gprs));
cbb870c8 126 regs->psw = lc->psw_save_area;
2c2df118
HC
127 sp -= STACK_FRAME_OVERHEAD;
128 sf = (struct stack_frame *) sp;
129 sf->back_chain = regs->gprs[15];
130 smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]);
131}
132
677d7623 133void smp_send_stop(void)
1da177e4 134{
39ce010d 135 int cpu, rc;
1da177e4 136
677d7623
HC
137 /* Disable all interrupts/machine checks */
138 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
3324e60a 139 trace_hardirqs_off();
1da177e4 140
677d7623 141 /* stop all processors */
1da177e4
LT
142 for_each_online_cpu(cpu) {
143 if (cpu == smp_processor_id())
144 continue;
145 do {
a93b8ec1 146 rc = sigp(cpu, sigp_stop);
39ce010d 147 } while (rc == sigp_busy);
1da177e4 148
5c0b912e 149 while (!cpu_stopped(cpu))
c6b5b847
HC
150 cpu_relax();
151 }
152}
153
1da177e4
LT
154/*
155 * This is the main routine where commands issued by other
156 * cpus are handled.
157 */
158
f6649a7e
MS
159static void do_ext_call_interrupt(unsigned int ext_int_code,
160 unsigned int param32, unsigned long param64)
1da177e4 161{
39ce010d 162 unsigned long bits;
1da177e4 163
052ff461 164 kstat_cpu(smp_processor_id()).irqs[EXTINT_IPI]++;
39ce010d
HC
165 /*
166 * handle bit signal external calls
39ce010d 167 */
1da177e4
LT
168 bits = xchg(&S390_lowcore.ext_call_fast, 0);
169
184748cc
PZ
170 if (test_bit(ec_schedule, &bits))
171 scheduler_ipi();
172
39ce010d 173 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
174 generic_smp_call_function_interrupt();
175
176 if (test_bit(ec_call_function_single, &bits))
177 generic_smp_call_function_single_interrupt();
1da177e4
LT
178}
179
180/*
181 * Send an external call sigp to another cpu and return without waiting
182 * for its completion.
183 */
a93b8ec1 184static void smp_ext_bitcall(int cpu, int sig)
1da177e4 185{
39ce010d
HC
186 /*
187 * Set signaling bit in lowcore of target cpu and kick it
188 */
1da177e4 189 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
a93b8ec1 190 while (sigp(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
191 udelay(10);
192}
193
630cd046 194void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
195{
196 int cpu;
197
630cd046 198 for_each_cpu(cpu, mask)
ca9fc75a
HC
199 smp_ext_bitcall(cpu, ec_call_function);
200}
201
202void arch_send_call_function_single_ipi(int cpu)
203{
204 smp_ext_bitcall(cpu, ec_call_function_single);
205}
206
347a8dc3 207#ifndef CONFIG_64BIT
1da177e4
LT
208/*
209 * this function sends a 'purge tlb' signal to another CPU.
210 */
a806170e 211static void smp_ptlb_callback(void *info)
1da177e4 212{
ba8a9229 213 __tlb_flush_local();
1da177e4
LT
214}
215
216void smp_ptlb_all(void)
217{
15c8b6c1 218 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
219}
220EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 221#endif /* ! CONFIG_64BIT */
1da177e4
LT
222
223/*
224 * this function sends a 'reschedule' IPI to another CPU.
225 * it goes straight through and wastes no time serializing
226 * anything. Worst case is that we lose a reschedule ...
227 */
228void smp_send_reschedule(int cpu)
229{
39ce010d 230 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
231}
232
233/*
234 * parameter area for the set/clear control bit callbacks
235 */
94c12cc7 236struct ec_creg_mask_parms {
1da177e4
LT
237 unsigned long orvals[16];
238 unsigned long andvals[16];
94c12cc7 239};
1da177e4
LT
240
241/*
242 * callback for setting/clearing control bits
243 */
39ce010d
HC
244static void smp_ctl_bit_callback(void *info)
245{
94c12cc7 246 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
247 unsigned long cregs[16];
248 int i;
39ce010d 249
94c12cc7
MS
250 __ctl_store(cregs, 0, 15);
251 for (i = 0; i <= 15; i++)
1da177e4 252 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 253 __ctl_load(cregs, 0, 15);
1da177e4
LT
254}
255
256/*
257 * Set a bit in a control register of all cpus
258 */
94c12cc7
MS
259void smp_ctl_set_bit(int cr, int bit)
260{
261 struct ec_creg_mask_parms parms;
1da177e4 262
94c12cc7
MS
263 memset(&parms.orvals, 0, sizeof(parms.orvals));
264 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 265 parms.orvals[cr] = 1 << bit;
15c8b6c1 266 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 267}
39ce010d 268EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
269
270/*
271 * Clear a bit in a control register of all cpus
272 */
94c12cc7
MS
273void smp_ctl_clear_bit(int cr, int bit)
274{
275 struct ec_creg_mask_parms parms;
1da177e4 276
94c12cc7
MS
277 memset(&parms.orvals, 0, sizeof(parms.orvals));
278 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 279 parms.andvals[cr] = ~(1L << bit);
15c8b6c1 280 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 281}
39ce010d 282EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 283
59f2e69d 284#ifdef CONFIG_ZFCPDUMP
411ed322 285
285f6722 286static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 287{
411ed322
MH
288 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
289 return;
285f6722 290 if (cpu >= NR_CPUS) {
395d31d4
MS
291 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
292 "the dump\n", cpu, NR_CPUS - 1);
285f6722 293 return;
411ed322 294 }
f64ca217 295 zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
a93b8ec1 296 while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy)
285f6722 297 cpu_relax();
92fe3132
MH
298 memcpy_real(zfcpdump_save_areas[cpu],
299 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
300 sizeof(struct save_area));
411ed322
MH
301}
302
f64ca217 303struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
411ed322
MH
304EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
305
306#else
285f6722
HC
307
308static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
309
59f2e69d 310#endif /* CONFIG_ZFCPDUMP */
411ed322 311
08d07968
HC
312static int cpu_known(int cpu_id)
313{
314 int cpu;
315
316 for_each_present_cpu(cpu) {
317 if (__cpu_logical_map[cpu] == cpu_id)
318 return 1;
319 }
320 return 0;
321}
322
323static int smp_rescan_cpus_sigp(cpumask_t avail)
324{
325 int cpu_id, logical_cpu;
326
93632d1b
RR
327 logical_cpu = cpumask_first(&avail);
328 if (logical_cpu >= nr_cpu_ids)
08d07968 329 return 0;
4bb5e07b 330 for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) {
08d07968
HC
331 if (cpu_known(cpu_id))
332 continue;
333 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 334 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
335 if (!cpu_stopped(logical_cpu))
336 continue;
0f1959f5 337 set_cpu_present(logical_cpu, true);
08d07968 338 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
339 logical_cpu = cpumask_next(logical_cpu, &avail);
340 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
341 break;
342 }
343 return 0;
344}
345
48483b32 346static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
347{
348 struct sclp_cpu_info *info;
349 int cpu_id, logical_cpu, cpu;
350 int rc;
351
93632d1b
RR
352 logical_cpu = cpumask_first(&avail);
353 if (logical_cpu >= nr_cpu_ids)
08d07968 354 return 0;
48483b32 355 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
356 if (!info)
357 return -ENOMEM;
358 rc = sclp_get_cpu_info(info);
359 if (rc)
360 goto out;
361 for (cpu = 0; cpu < info->combined; cpu++) {
362 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
363 continue;
364 cpu_id = info->cpu[cpu].address;
365 if (cpu_known(cpu_id))
366 continue;
367 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 368 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
0f1959f5 369 set_cpu_present(logical_cpu, true);
08d07968
HC
370 if (cpu >= info->configured)
371 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
372 else
373 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
374 logical_cpu = cpumask_next(logical_cpu, &avail);
375 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
376 break;
377 }
378out:
48483b32 379 kfree(info);
08d07968
HC
380 return rc;
381}
382
1e489518 383static int __smp_rescan_cpus(void)
08d07968
HC
384{
385 cpumask_t avail;
386
0f1959f5 387 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
08d07968
HC
388 if (smp_use_sigp_detection)
389 return smp_rescan_cpus_sigp(avail);
390 else
391 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
392}
393
48483b32
HC
394static void __init smp_detect_cpus(void)
395{
396 unsigned int cpu, c_cpus, s_cpus;
397 struct sclp_cpu_info *info;
398 u16 boot_cpu_addr, cpu_addr;
399
400 c_cpus = 1;
401 s_cpus = 0;
7b468488 402 boot_cpu_addr = __cpu_logical_map[0];
48483b32
HC
403 info = kmalloc(sizeof(*info), GFP_KERNEL);
404 if (!info)
405 panic("smp_detect_cpus failed to allocate memory\n");
406 /* Use sigp detection algorithm if sclp doesn't work. */
407 if (sclp_get_cpu_info(info)) {
408 smp_use_sigp_detection = 1;
4bb5e07b 409 for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) {
48483b32
HC
410 if (cpu == boot_cpu_addr)
411 continue;
a93b8ec1 412 if (!raw_cpu_stopped(cpu))
48483b32
HC
413 continue;
414 smp_get_save_area(c_cpus, cpu);
415 c_cpus++;
416 }
417 goto out;
418 }
419
420 if (info->has_cpu_type) {
421 for (cpu = 0; cpu < info->combined; cpu++) {
422 if (info->cpu[cpu].address == boot_cpu_addr) {
423 smp_cpu_type = info->cpu[cpu].type;
424 break;
425 }
426 }
427 }
428
429 for (cpu = 0; cpu < info->combined; cpu++) {
430 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
431 continue;
432 cpu_addr = info->cpu[cpu].address;
433 if (cpu_addr == boot_cpu_addr)
434 continue;
a93b8ec1 435 if (!raw_cpu_stopped(cpu_addr)) {
48483b32
HC
436 s_cpus++;
437 continue;
438 }
439 smp_get_save_area(c_cpus, cpu_addr);
440 c_cpus++;
441 }
442out:
443 kfree(info);
395d31d4 444 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 445 get_online_cpus();
1e489518 446 __smp_rescan_cpus();
9d40d2e3 447 put_online_cpus();
48483b32
HC
448}
449
1da177e4 450/*
39ce010d 451 * Activate a secondary processor.
1da177e4 452 */
ea1f4eec 453int __cpuinit start_secondary(void *cpuvoid)
1da177e4 454{
39ce010d
HC
455 /* Setup the cpu */
456 cpu_init();
5bfb5d69 457 preempt_disable();
d54853ef 458 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 459 init_cpu_timer();
d54853ef 460 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 461 init_cpu_vtimer();
1da177e4 462 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
463 pfault_init();
464
e545a614
MS
465 /* call cpu notifiers */
466 notify_cpu_starting(smp_processor_id());
1da177e4 467 /* Mark this cpu as online */
ca9fc75a 468 ipi_call_lock();
0f1959f5 469 set_cpu_online(smp_processor_id(), true);
ca9fc75a 470 ipi_call_unlock();
1da177e4
LT
471 /* Switch on interrupts */
472 local_irq_enable();
39ce010d
HC
473 /* cpu_idle will call schedule for us */
474 cpu_idle();
475 return 0;
1da177e4
LT
476}
477
f230886b
HC
478struct create_idle {
479 struct work_struct work;
480 struct task_struct *idle;
481 struct completion done;
482 int cpu;
483};
484
485static void __cpuinit smp_fork_idle(struct work_struct *work)
1da177e4 486{
f230886b 487 struct create_idle *c_idle;
1da177e4 488
f230886b
HC
489 c_idle = container_of(work, struct create_idle, work);
490 c_idle->idle = fork_idle(c_idle->cpu);
491 complete(&c_idle->done);
1da177e4
LT
492}
493
1cb6bb4b
HC
494static int __cpuinit smp_alloc_lowcore(int cpu)
495{
496 unsigned long async_stack, panic_stack;
497 struct _lowcore *lowcore;
1cb6bb4b 498
3fd26a77 499 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1cb6bb4b
HC
500 if (!lowcore)
501 return -ENOMEM;
502 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 503 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
504 if (!panic_stack || !async_stack)
505 goto out;
98c7b388
HC
506 memcpy(lowcore, &S390_lowcore, 512);
507 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
508 lowcore->async_stack = async_stack + ASYNC_SIZE;
509 lowcore->panic_stack = panic_stack + PAGE_SIZE;
510
511#ifndef CONFIG_64BIT
512 if (MACHINE_HAS_IEEE) {
513 unsigned long save_area;
514
515 save_area = get_zeroed_page(GFP_KERNEL);
516 if (!save_area)
33b1d09e 517 goto out;
1cb6bb4b
HC
518 lowcore->extended_save_area_addr = (u32) save_area;
519 }
c742b31c
MS
520#else
521 if (vdso_alloc_per_cpu(cpu, lowcore))
522 goto out;
1cb6bb4b
HC
523#endif
524 lowcore_ptr[cpu] = lowcore;
525 return 0;
526
591bb4f6 527out:
33b1d09e 528 free_page(panic_stack);
1cb6bb4b 529 free_pages(async_stack, ASYNC_ORDER);
3fd26a77 530 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
531 return -ENOMEM;
532}
533
1cb6bb4b
HC
534static void smp_free_lowcore(int cpu)
535{
536 struct _lowcore *lowcore;
1cb6bb4b 537
1cb6bb4b
HC
538 lowcore = lowcore_ptr[cpu];
539#ifndef CONFIG_64BIT
540 if (MACHINE_HAS_IEEE)
541 free_page((unsigned long) lowcore->extended_save_area_addr);
c742b31c
MS
542#else
543 vdso_free_per_cpu(cpu, lowcore);
1cb6bb4b
HC
544#endif
545 free_page(lowcore->panic_stack - PAGE_SIZE);
546 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
3fd26a77 547 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
548 lowcore_ptr[cpu] = NULL;
549}
1cb6bb4b 550
1da177e4 551/* Upping and downing of CPUs */
1cb6bb4b 552int __cpuinit __cpu_up(unsigned int cpu)
1da177e4 553{
39ce010d 554 struct _lowcore *cpu_lowcore;
f230886b 555 struct create_idle c_idle;
a93b8ec1 556 struct task_struct *idle;
1da177e4 557 struct stack_frame *sf;
d0d3cdf4 558 u32 lowcore;
a93b8ec1 559 int ccode;
1da177e4 560
08d07968
HC
561 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
562 return -EIO;
f230886b
HC
563 idle = current_set[cpu];
564 if (!idle) {
565 c_idle.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done);
566 INIT_WORK_ONSTACK(&c_idle.work, smp_fork_idle);
567 c_idle.cpu = cpu;
568 schedule_work(&c_idle.work);
569 wait_for_completion(&c_idle.done);
570 if (IS_ERR(c_idle.idle))
571 return PTR_ERR(c_idle.idle);
572 idle = c_idle.idle;
573 current_set[cpu] = c_idle.idle;
574 }
da7f51c1 575 init_idle(idle, cpu);
1cb6bb4b
HC
576 if (smp_alloc_lowcore(cpu))
577 return -ENOMEM;
d0d3cdf4 578 do {
a93b8ec1 579 ccode = sigp(cpu, sigp_initial_cpu_reset);
d0d3cdf4
HC
580 if (ccode == sigp_busy)
581 udelay(10);
582 if (ccode == sigp_not_operational)
583 goto err_out;
584 } while (ccode == sigp_busy);
585
586 lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
a93b8ec1 587 while (sigp_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
d0d3cdf4 588 udelay(10);
1da177e4 589
39ce010d 590 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 591 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 592 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 593 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
594 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
595 - sizeof(struct pt_regs)
596 - sizeof(struct stack_frame));
597 memset(sf, 0, sizeof(struct stack_frame));
598 sf->gprs[9] = (unsigned long) sf;
599 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 600 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
050eef36 601 atomic_inc(&init_mm.context.attach_count);
94c12cc7
MS
602 asm volatile(
603 " stam 0,15,0(%0)"
604 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 605 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d 606 cpu_lowcore->current_task = (unsigned long) idle;
7b468488 607 cpu_lowcore->cpu_nr = cpu;
591bb4f6 608 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
25097bf1 609 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
dfd9f7ab 610 cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
14375bc4
MS
611 memcpy(cpu_lowcore->stfle_fac_list, S390_lowcore.stfle_fac_list,
612 MAX_FACILITY_BIT/8);
1da177e4 613 eieio();
699ff13f 614
a93b8ec1 615 while (sigp(cpu, sigp_restart) == sigp_busy)
699ff13f 616 udelay(10);
1da177e4
LT
617
618 while (!cpu_online(cpu))
619 cpu_relax();
620 return 0;
d0d3cdf4
HC
621
622err_out:
623 smp_free_lowcore(cpu);
624 return -EIO;
1da177e4
LT
625}
626
48483b32 627static int __init setup_possible_cpus(char *s)
255acee7 628{
48483b32 629 int pcpus, cpu;
255acee7 630
48483b32 631 pcpus = simple_strtoul(s, NULL, 0);
88e01285
HC
632 init_cpu_possible(cpumask_of(0));
633 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
def6cfb7 634 set_cpu_possible(cpu, true);
37a33026
HC
635 return 0;
636}
637early_param("possible_cpus", setup_possible_cpus);
638
48483b32
HC
639#ifdef CONFIG_HOTPLUG_CPU
640
39ce010d 641int __cpu_disable(void)
1da177e4 642{
94c12cc7 643 struct ec_creg_mask_parms cr_parms;
f3705136 644 int cpu = smp_processor_id();
1da177e4 645
0f1959f5 646 set_cpu_online(cpu, false);
1da177e4 647
1da177e4 648 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 649 pfault_fini();
1da177e4 650
94c12cc7
MS
651 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
652 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 653
94c12cc7 654 /* disable all external interrupts */
1da177e4 655 cr_parms.orvals[0] = 0;
5bd41878
HC
656 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 11 |
657 1 << 10 | 1 << 9 | 1 << 6 | 1 << 4);
1da177e4 658 /* disable all I/O interrupts */
1da177e4 659 cr_parms.orvals[6] = 0;
39ce010d
HC
660 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
661 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 662 /* disable most machine checks */
1da177e4 663 cr_parms.orvals[14] = 0;
39ce010d
HC
664 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
665 1 << 25 | 1 << 24);
94c12cc7 666
1da177e4
LT
667 smp_ctl_bit_callback(&cr_parms);
668
1da177e4
LT
669 return 0;
670}
671
39ce010d 672void __cpu_die(unsigned int cpu)
1da177e4
LT
673{
674 /* Wait until target cpu is down */
5c0b912e 675 while (!cpu_stopped(cpu))
1da177e4 676 cpu_relax();
a93b8ec1 677 while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy)
4f8048ee 678 udelay(10);
1cb6bb4b 679 smp_free_lowcore(cpu);
050eef36 680 atomic_dec(&init_mm.context.attach_count);
1da177e4
LT
681}
682
b456d94a 683void __noreturn cpu_die(void)
1da177e4
LT
684{
685 idle_task_exit();
a93b8ec1 686 while (sigp(smp_processor_id(), sigp_stop) == sigp_busy)
f8501ba7 687 cpu_relax();
39ce010d 688 for (;;);
1da177e4
LT
689}
690
255acee7
HC
691#endif /* CONFIG_HOTPLUG_CPU */
692
1da177e4
LT
693void __init smp_prepare_cpus(unsigned int max_cpus)
694{
591bb4f6
HC
695#ifndef CONFIG_64BIT
696 unsigned long save_area = 0;
697#endif
698 unsigned long async_stack, panic_stack;
699 struct _lowcore *lowcore;
39ce010d 700
48483b32
HC
701 smp_detect_cpus();
702
39ce010d
HC
703 /* request the 0x1201 emergency signal external interrupt */
704 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
705 panic("Couldn't request external interrupt 0x1201");
1da177e4 706
591bb4f6 707 /* Reallocate current lowcore, but keep its contents. */
3fd26a77 708 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
591bb4f6
HC
709 panic_stack = __get_free_page(GFP_KERNEL);
710 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
c742b31c 711 BUG_ON(!lowcore || !panic_stack || !async_stack);
347a8dc3 712#ifndef CONFIG_64BIT
77fa2245 713 if (MACHINE_HAS_IEEE)
591bb4f6 714 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 715#endif
591bb4f6
HC
716 local_irq_disable();
717 local_mcck_disable();
718 lowcore_ptr[smp_processor_id()] = lowcore;
719 *lowcore = S390_lowcore;
720 lowcore->panic_stack = panic_stack + PAGE_SIZE;
721 lowcore->async_stack = async_stack + ASYNC_SIZE;
722#ifndef CONFIG_64BIT
723 if (MACHINE_HAS_IEEE)
724 lowcore->extended_save_area_addr = (u32) save_area;
725#endif
726 set_prefix((u32)(unsigned long) lowcore);
727 local_mcck_enable();
728 local_irq_enable();
3a6ba460
HC
729#ifdef CONFIG_64BIT
730 if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore))
731 BUG();
732#endif
1da177e4
LT
733}
734
ea1f4eec 735void __init smp_prepare_boot_cpu(void)
1da177e4
LT
736{
737 BUG_ON(smp_processor_id() != 0);
738
48483b32 739 current_thread_info()->cpu = 0;
0f1959f5
KM
740 set_cpu_present(0, true);
741 set_cpu_online(0, true);
1da177e4
LT
742 S390_lowcore.percpu_offset = __per_cpu_offset[0];
743 current_set[0] = current;
08d07968 744 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 745 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
746}
747
ea1f4eec 748void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 749{
1da177e4
LT
750}
751
02beaccc
HC
752void __init smp_setup_processor_id(void)
753{
754 S390_lowcore.cpu_nr = 0;
755 __cpu_logical_map[0] = stap();
756}
757
1da177e4
LT
758/*
759 * the frequency of the profiling timer can be changed
760 * by writing a multiplier value into /proc/profile.
761 *
762 * usually you want to run this on all CPUs ;)
763 */
764int setup_profiling_timer(unsigned int multiplier)
765{
39ce010d 766 return 0;
1da177e4
LT
767}
768
08d07968 769#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
770static ssize_t cpu_configure_show(struct sys_device *dev,
771 struct sysdev_attribute *attr, char *buf)
08d07968
HC
772{
773 ssize_t count;
774
775 mutex_lock(&smp_cpu_state_mutex);
776 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
777 mutex_unlock(&smp_cpu_state_mutex);
778 return count;
779}
780
4a0b2b4d
AK
781static ssize_t cpu_configure_store(struct sys_device *dev,
782 struct sysdev_attribute *attr,
783 const char *buf, size_t count)
08d07968
HC
784{
785 int cpu = dev->id;
786 int val, rc;
787 char delim;
788
789 if (sscanf(buf, "%d %c", &val, &delim) != 1)
790 return -EINVAL;
791 if (val != 0 && val != 1)
792 return -EINVAL;
793
9d40d2e3 794 get_online_cpus();
0b18d318 795 mutex_lock(&smp_cpu_state_mutex);
08d07968 796 rc = -EBUSY;
2c2df118
HC
797 /* disallow configuration changes of online cpus and cpu 0 */
798 if (cpu_online(cpu) || cpu == 0)
08d07968
HC
799 goto out;
800 rc = 0;
801 switch (val) {
802 case 0:
803 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
804 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 805 if (!rc) {
08d07968 806 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
807 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
808 }
08d07968
HC
809 }
810 break;
811 case 1:
812 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
813 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 814 if (!rc) {
08d07968 815 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
816 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
817 }
08d07968
HC
818 }
819 break;
820 default:
821 break;
822 }
823out:
08d07968 824 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 825 put_online_cpus();
08d07968
HC
826 return rc ? rc : count;
827}
828static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
829#endif /* CONFIG_HOTPLUG_CPU */
830
4a0b2b4d
AK
831static ssize_t cpu_polarization_show(struct sys_device *dev,
832 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
833{
834 int cpu = dev->id;
835 ssize_t count;
836
837 mutex_lock(&smp_cpu_state_mutex);
838 switch (smp_cpu_polarization[cpu]) {
839 case POLARIZATION_HRZ:
840 count = sprintf(buf, "horizontal\n");
841 break;
842 case POLARIZATION_VL:
843 count = sprintf(buf, "vertical:low\n");
844 break;
845 case POLARIZATION_VM:
846 count = sprintf(buf, "vertical:medium\n");
847 break;
848 case POLARIZATION_VH:
849 count = sprintf(buf, "vertical:high\n");
850 break;
851 default:
852 count = sprintf(buf, "unknown\n");
853 break;
854 }
855 mutex_unlock(&smp_cpu_state_mutex);
856 return count;
857}
858static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
859
4a0b2b4d
AK
860static ssize_t show_cpu_address(struct sys_device *dev,
861 struct sysdev_attribute *attr, char *buf)
08d07968
HC
862{
863 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
864}
865static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
866
867
868static struct attribute *cpu_common_attrs[] = {
869#ifdef CONFIG_HOTPLUG_CPU
870 &attr_configure.attr,
871#endif
872 &attr_address.attr,
c10fde0d 873 &attr_polarization.attr,
08d07968
HC
874 NULL,
875};
876
877static struct attribute_group cpu_common_attr_group = {
878 .attrs = cpu_common_attrs,
879};
1da177e4 880
4a0b2b4d
AK
881static ssize_t show_capability(struct sys_device *dev,
882 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
883{
884 unsigned int capability;
885 int rc;
886
887 rc = get_cpu_capability(&capability);
888 if (rc)
889 return rc;
890 return sprintf(buf, "%u\n", capability);
891}
892static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
893
4a0b2b4d
AK
894static ssize_t show_idle_count(struct sys_device *dev,
895 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
896{
897 struct s390_idle_data *idle;
898 unsigned long long idle_count;
e98bbaaf 899 unsigned int sequence;
fae8b22d
HC
900
901 idle = &per_cpu(s390_idle, dev->id);
e98bbaaf
MS
902repeat:
903 sequence = idle->sequence;
904 smp_rmb();
905 if (sequence & 1)
906 goto repeat;
fae8b22d 907 idle_count = idle->idle_count;
6f430924
MS
908 if (idle->idle_enter)
909 idle_count++;
e98bbaaf
MS
910 smp_rmb();
911 if (idle->sequence != sequence)
912 goto repeat;
fae8b22d
HC
913 return sprintf(buf, "%llu\n", idle_count);
914}
915static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
916
4a0b2b4d
AK
917static ssize_t show_idle_time(struct sys_device *dev,
918 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
919{
920 struct s390_idle_data *idle;
6f430924 921 unsigned long long now, idle_time, idle_enter;
e98bbaaf 922 unsigned int sequence;
fae8b22d
HC
923
924 idle = &per_cpu(s390_idle, dev->id);
6f430924 925 now = get_clock();
e98bbaaf
MS
926repeat:
927 sequence = idle->sequence;
928 smp_rmb();
929 if (sequence & 1)
930 goto repeat;
6f430924
MS
931 idle_time = idle->idle_time;
932 idle_enter = idle->idle_enter;
933 if (idle_enter != 0ULL && idle_enter < now)
934 idle_time += now - idle_enter;
e98bbaaf
MS
935 smp_rmb();
936 if (idle->sequence != sequence)
937 goto repeat;
6f430924 938 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 939}
69d39d66 940static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 941
08d07968 942static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
943 &attr_capability.attr,
944 &attr_idle_count.attr,
69d39d66 945 &attr_idle_time_us.attr,
fae8b22d
HC
946 NULL,
947};
948
08d07968
HC
949static struct attribute_group cpu_online_attr_group = {
950 .attrs = cpu_online_attrs,
fae8b22d
HC
951};
952
2fc2d1e9
HC
953static int __cpuinit smp_cpu_notify(struct notifier_block *self,
954 unsigned long action, void *hcpu)
955{
956 unsigned int cpu = (unsigned int)(long)hcpu;
957 struct cpu *c = &per_cpu(cpu_devices, cpu);
958 struct sys_device *s = &c->sysdev;
fae8b22d 959 struct s390_idle_data *idle;
d882ba69 960 int err = 0;
2fc2d1e9
HC
961
962 switch (action) {
963 case CPU_ONLINE:
8bb78442 964 case CPU_ONLINE_FROZEN:
fae8b22d 965 idle = &per_cpu(s390_idle, cpu);
e98bbaaf 966 memset(idle, 0, sizeof(struct s390_idle_data));
d882ba69 967 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
968 break;
969 case CPU_DEAD:
8bb78442 970 case CPU_DEAD_FROZEN:
08d07968 971 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
972 break;
973 }
d882ba69 974 return notifier_from_errno(err);
2fc2d1e9
HC
975}
976
977static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 978 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
979};
980
2bc89b5e 981static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
982{
983 struct cpu *c = &per_cpu(cpu_devices, cpu);
984 struct sys_device *s = &c->sysdev;
985 int rc;
986
987 c->hotpluggable = 1;
988 rc = register_cpu(c, cpu);
989 if (rc)
990 goto out;
991 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
992 if (rc)
993 goto out_cpu;
994 if (!cpu_online(cpu))
995 goto out;
996 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
997 if (!rc)
998 return 0;
999 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1000out_cpu:
1001#ifdef CONFIG_HOTPLUG_CPU
1002 unregister_cpu(c);
1003#endif
1004out:
1005 return rc;
1006}
1007
1008#ifdef CONFIG_HOTPLUG_CPU
1e489518 1009
67060d9c 1010int __ref smp_rescan_cpus(void)
08d07968
HC
1011{
1012 cpumask_t newcpus;
1013 int cpu;
1014 int rc;
1015
9d40d2e3 1016 get_online_cpus();
0b18d318 1017 mutex_lock(&smp_cpu_state_mutex);
0f1959f5 1018 cpumask_copy(&newcpus, cpu_present_mask);
1e489518 1019 rc = __smp_rescan_cpus();
08d07968
HC
1020 if (rc)
1021 goto out;
0f1959f5
KM
1022 cpumask_andnot(&newcpus, cpu_present_mask, &newcpus);
1023 for_each_cpu(cpu, &newcpus) {
08d07968
HC
1024 rc = smp_add_present_cpu(cpu);
1025 if (rc)
0f1959f5 1026 set_cpu_present(cpu, false);
08d07968
HC
1027 }
1028 rc = 0;
1029out:
08d07968 1030 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1031 put_online_cpus();
0f1959f5 1032 if (!cpumask_empty(&newcpus))
c10fde0d 1033 topology_schedule_update();
1e489518
HC
1034 return rc;
1035}
1036
c9be0a36
AK
1037static ssize_t __ref rescan_store(struct sysdev_class *class,
1038 struct sysdev_class_attribute *attr,
1039 const char *buf,
1e489518
HC
1040 size_t count)
1041{
1042 int rc;
1043
1044 rc = smp_rescan_cpus();
08d07968
HC
1045 return rc ? rc : count;
1046}
da5aae70 1047static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1048#endif /* CONFIG_HOTPLUG_CPU */
1049
5fbcae57
HC
1050static ssize_t dispatching_show(struct sysdev_class *class,
1051 struct sysdev_class_attribute *attr,
1052 char *buf)
c10fde0d
HC
1053{
1054 ssize_t count;
1055
1056 mutex_lock(&smp_cpu_state_mutex);
1057 count = sprintf(buf, "%d\n", cpu_management);
1058 mutex_unlock(&smp_cpu_state_mutex);
1059 return count;
1060}
1061
c9be0a36
AK
1062static ssize_t dispatching_store(struct sysdev_class *dev,
1063 struct sysdev_class_attribute *attr,
1064 const char *buf,
da5aae70 1065 size_t count)
c10fde0d
HC
1066{
1067 int val, rc;
1068 char delim;
1069
1070 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1071 return -EINVAL;
1072 if (val != 0 && val != 1)
1073 return -EINVAL;
1074 rc = 0;
c10fde0d 1075 get_online_cpus();
0b18d318 1076 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1077 if (cpu_management == val)
1078 goto out;
1079 rc = topology_set_cpu_management(val);
1080 if (!rc)
1081 cpu_management = val;
1082out:
c10fde0d 1083 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1084 put_online_cpus();
c10fde0d
HC
1085 return rc ? rc : count;
1086}
da5aae70
HC
1087static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1088 dispatching_store);
c10fde0d 1089
1da177e4
LT
1090static int __init topology_init(void)
1091{
1092 int cpu;
fae8b22d 1093 int rc;
2fc2d1e9
HC
1094
1095 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1096
08d07968 1097#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1098 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1099 if (rc)
1100 return rc;
1101#endif
da5aae70 1102 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1103 if (rc)
1104 return rc;
08d07968
HC
1105 for_each_present_cpu(cpu) {
1106 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1107 if (rc)
1108 return rc;
1da177e4
LT
1109 }
1110 return 0;
1111}
1da177e4 1112subsys_initcall(topology_init);
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