[S390] kdump: Add size to elfcorehdr kernel parameter
[deliverable/linux.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
155af2f9 4 * Copyright IBM Corp. 1999, 2009
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
395d31d4
MS
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
f230886b 26#include <linux/workqueue.h>
1da177e4
LT
27#include <linux/module.h>
28#include <linux/init.h>
1da177e4 29#include <linux/mm.h>
4e950f6f 30#include <linux/err.h>
1da177e4
LT
31#include <linux/spinlock.h>
32#include <linux/kernel_stat.h>
1da177e4
LT
33#include <linux/delay.h>
34#include <linux/cache.h>
35#include <linux/interrupt.h>
3324e60a 36#include <linux/irqflags.h>
1da177e4 37#include <linux/cpu.h>
2b67fc46 38#include <linux/timex.h>
411ed322 39#include <linux/bootmem.h>
5a0e3ad6 40#include <linux/slab.h>
cbb870c8 41#include <asm/asm-offsets.h>
46b05d26 42#include <asm/ipl.h>
2b67fc46 43#include <asm/setup.h>
1da177e4
LT
44#include <asm/sigp.h>
45#include <asm/pgalloc.h>
46#include <asm/irq.h>
1da177e4
LT
47#include <asm/cpcmd.h>
48#include <asm/tlbflush.h>
2b67fc46 49#include <asm/timer.h>
411ed322 50#include <asm/lowcore.h>
08d07968 51#include <asm/sclp.h>
76d4e00a 52#include <asm/cputime.h>
c742b31c 53#include <asm/vdso.h>
4bb5e07b 54#include <asm/cpu.h>
a806170e 55#include "entry.h"
1da177e4 56
fb380aad 57/* logical cpu to cpu address */
a93b8ec1 58unsigned short __cpu_logical_map[NR_CPUS];
fb380aad 59
1da177e4
LT
60static struct task_struct *current_set[NR_CPUS];
61
08d07968
HC
62static u8 smp_cpu_type;
63static int smp_use_sigp_detection;
64
65enum s390_cpu_state {
66 CPU_STATE_STANDBY,
67 CPU_STATE_CONFIGURED,
68};
69
dbd70fb4 70DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 71int smp_cpu_polarization[NR_CPUS];
08d07968 72static int smp_cpu_state[NR_CPUS];
c10fde0d 73static int cpu_management;
08d07968
HC
74
75static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 76
a93b8ec1 77static void smp_ext_bitcall(int, int);
1da177e4 78
a93b8ec1 79static int raw_cpu_stopped(int cpu)
5c0b912e 80{
a93b8ec1 81 u32 status;
5c0b912e 82
a93b8ec1 83 switch (raw_sigp_ps(&status, 0, cpu, sigp_sense)) {
5c0b912e
HC
84 case sigp_status_stored:
85 /* Check for stopped and check stop state */
86 if (status & 0x50)
87 return 1;
88 break;
89 default:
90 break;
91 }
92 return 0;
93}
94
a93b8ec1
HC
95static inline int cpu_stopped(int cpu)
96{
97 return raw_cpu_stopped(cpu_logical_map(cpu));
98}
99
2c2df118
HC
100void smp_switch_to_ipl_cpu(void (*func)(void *), void *data)
101{
102 struct _lowcore *lc, *current_lc;
103 struct stack_frame *sf;
104 struct pt_regs *regs;
105 unsigned long sp;
106
107 if (smp_processor_id() == 0)
108 func(data);
109 __load_psw_mask(PSW_BASE_BITS | PSW_DEFAULT_KEY);
110 /* Disable lowcore protection */
111 __ctl_clear_bit(0, 28);
112 current_lc = lowcore_ptr[smp_processor_id()];
113 lc = lowcore_ptr[0];
114 if (!lc)
115 lc = current_lc;
116 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
117 lc->restart_psw.addr = PSW_ADDR_AMODE | (unsigned long) smp_restart_cpu;
118 if (!cpu_online(0))
119 smp_switch_to_cpu(func, data, 0, stap(), __cpu_logical_map[0]);
a93b8ec1 120 while (sigp(0, sigp_stop_and_store_status) == sigp_busy)
2c2df118
HC
121 cpu_relax();
122 sp = lc->panic_stack;
123 sp -= sizeof(struct pt_regs);
124 regs = (struct pt_regs *) sp;
125 memcpy(&regs->gprs, &current_lc->gpregs_save_area, sizeof(regs->gprs));
cbb870c8 126 regs->psw = lc->psw_save_area;
2c2df118
HC
127 sp -= STACK_FRAME_OVERHEAD;
128 sf = (struct stack_frame *) sp;
129 sf->back_chain = regs->gprs[15];
130 smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]);
131}
132
677d7623 133void smp_send_stop(void)
1da177e4 134{
39ce010d 135 int cpu, rc;
1da177e4 136
677d7623
HC
137 /* Disable all interrupts/machine checks */
138 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
3324e60a 139 trace_hardirqs_off();
1da177e4 140
677d7623 141 /* stop all processors */
1da177e4
LT
142 for_each_online_cpu(cpu) {
143 if (cpu == smp_processor_id())
144 continue;
145 do {
a93b8ec1 146 rc = sigp(cpu, sigp_stop);
39ce010d 147 } while (rc == sigp_busy);
1da177e4 148
5c0b912e 149 while (!cpu_stopped(cpu))
c6b5b847
HC
150 cpu_relax();
151 }
152}
153
1da177e4
LT
154/*
155 * This is the main routine where commands issued by other
156 * cpus are handled.
157 */
158
f6649a7e
MS
159static void do_ext_call_interrupt(unsigned int ext_int_code,
160 unsigned int param32, unsigned long param64)
1da177e4 161{
39ce010d 162 unsigned long bits;
1da177e4 163
052ff461 164 kstat_cpu(smp_processor_id()).irqs[EXTINT_IPI]++;
39ce010d
HC
165 /*
166 * handle bit signal external calls
39ce010d 167 */
1da177e4
LT
168 bits = xchg(&S390_lowcore.ext_call_fast, 0);
169
184748cc
PZ
170 if (test_bit(ec_schedule, &bits))
171 scheduler_ipi();
172
39ce010d 173 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
174 generic_smp_call_function_interrupt();
175
176 if (test_bit(ec_call_function_single, &bits))
177 generic_smp_call_function_single_interrupt();
1da177e4
LT
178}
179
180/*
181 * Send an external call sigp to another cpu and return without waiting
182 * for its completion.
183 */
a93b8ec1 184static void smp_ext_bitcall(int cpu, int sig)
1da177e4 185{
39ce010d
HC
186 /*
187 * Set signaling bit in lowcore of target cpu and kick it
188 */
1da177e4 189 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
a93b8ec1 190 while (sigp(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
191 udelay(10);
192}
193
630cd046 194void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
195{
196 int cpu;
197
630cd046 198 for_each_cpu(cpu, mask)
ca9fc75a
HC
199 smp_ext_bitcall(cpu, ec_call_function);
200}
201
202void arch_send_call_function_single_ipi(int cpu)
203{
204 smp_ext_bitcall(cpu, ec_call_function_single);
205}
206
347a8dc3 207#ifndef CONFIG_64BIT
1da177e4
LT
208/*
209 * this function sends a 'purge tlb' signal to another CPU.
210 */
a806170e 211static void smp_ptlb_callback(void *info)
1da177e4 212{
ba8a9229 213 __tlb_flush_local();
1da177e4
LT
214}
215
216void smp_ptlb_all(void)
217{
15c8b6c1 218 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
219}
220EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 221#endif /* ! CONFIG_64BIT */
1da177e4
LT
222
223/*
224 * this function sends a 'reschedule' IPI to another CPU.
225 * it goes straight through and wastes no time serializing
226 * anything. Worst case is that we lose a reschedule ...
227 */
228void smp_send_reschedule(int cpu)
229{
39ce010d 230 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
231}
232
233/*
234 * parameter area for the set/clear control bit callbacks
235 */
94c12cc7 236struct ec_creg_mask_parms {
1da177e4
LT
237 unsigned long orvals[16];
238 unsigned long andvals[16];
94c12cc7 239};
1da177e4
LT
240
241/*
242 * callback for setting/clearing control bits
243 */
39ce010d
HC
244static void smp_ctl_bit_callback(void *info)
245{
94c12cc7 246 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
247 unsigned long cregs[16];
248 int i;
39ce010d 249
94c12cc7
MS
250 __ctl_store(cregs, 0, 15);
251 for (i = 0; i <= 15; i++)
1da177e4 252 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 253 __ctl_load(cregs, 0, 15);
1da177e4
LT
254}
255
256/*
257 * Set a bit in a control register of all cpus
258 */
94c12cc7
MS
259void smp_ctl_set_bit(int cr, int bit)
260{
261 struct ec_creg_mask_parms parms;
1da177e4 262
94c12cc7
MS
263 memset(&parms.orvals, 0, sizeof(parms.orvals));
264 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
859c9651 265 parms.orvals[cr] = 1UL << bit;
15c8b6c1 266 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 267}
39ce010d 268EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
269
270/*
271 * Clear a bit in a control register of all cpus
272 */
94c12cc7
MS
273void smp_ctl_clear_bit(int cr, int bit)
274{
275 struct ec_creg_mask_parms parms;
1da177e4 276
94c12cc7
MS
277 memset(&parms.orvals, 0, sizeof(parms.orvals));
278 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
859c9651 279 parms.andvals[cr] = ~(1UL << bit);
15c8b6c1 280 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 281}
39ce010d 282EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 283
59f2e69d 284#ifdef CONFIG_ZFCPDUMP
411ed322 285
285f6722 286static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 287{
411ed322
MH
288 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
289 return;
285f6722 290 if (cpu >= NR_CPUS) {
395d31d4
MS
291 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
292 "the dump\n", cpu, NR_CPUS - 1);
285f6722 293 return;
411ed322 294 }
f64ca217 295 zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
a93b8ec1 296 while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy)
285f6722 297 cpu_relax();
92fe3132
MH
298 memcpy_real(zfcpdump_save_areas[cpu],
299 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
300 sizeof(struct save_area));
411ed322
MH
301}
302
f64ca217 303struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
411ed322
MH
304EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
305
306#else
285f6722
HC
307
308static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
309
59f2e69d 310#endif /* CONFIG_ZFCPDUMP */
411ed322 311
08d07968
HC
312static int cpu_known(int cpu_id)
313{
314 int cpu;
315
316 for_each_present_cpu(cpu) {
317 if (__cpu_logical_map[cpu] == cpu_id)
318 return 1;
319 }
320 return 0;
321}
322
323static int smp_rescan_cpus_sigp(cpumask_t avail)
324{
325 int cpu_id, logical_cpu;
326
93632d1b
RR
327 logical_cpu = cpumask_first(&avail);
328 if (logical_cpu >= nr_cpu_ids)
08d07968 329 return 0;
4bb5e07b 330 for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) {
08d07968
HC
331 if (cpu_known(cpu_id))
332 continue;
333 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 334 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
335 if (!cpu_stopped(logical_cpu))
336 continue;
0f1959f5 337 set_cpu_present(logical_cpu, true);
08d07968 338 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
339 logical_cpu = cpumask_next(logical_cpu, &avail);
340 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
341 break;
342 }
343 return 0;
344}
345
48483b32 346static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
347{
348 struct sclp_cpu_info *info;
349 int cpu_id, logical_cpu, cpu;
350 int rc;
351
93632d1b
RR
352 logical_cpu = cpumask_first(&avail);
353 if (logical_cpu >= nr_cpu_ids)
08d07968 354 return 0;
48483b32 355 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
356 if (!info)
357 return -ENOMEM;
358 rc = sclp_get_cpu_info(info);
359 if (rc)
360 goto out;
361 for (cpu = 0; cpu < info->combined; cpu++) {
362 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
363 continue;
364 cpu_id = info->cpu[cpu].address;
365 if (cpu_known(cpu_id))
366 continue;
367 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 368 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
0f1959f5 369 set_cpu_present(logical_cpu, true);
08d07968
HC
370 if (cpu >= info->configured)
371 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
372 else
373 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
374 logical_cpu = cpumask_next(logical_cpu, &avail);
375 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
376 break;
377 }
378out:
48483b32 379 kfree(info);
08d07968
HC
380 return rc;
381}
382
1e489518 383static int __smp_rescan_cpus(void)
08d07968
HC
384{
385 cpumask_t avail;
386
0f1959f5 387 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
08d07968
HC
388 if (smp_use_sigp_detection)
389 return smp_rescan_cpus_sigp(avail);
390 else
391 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
392}
393
48483b32
HC
394static void __init smp_detect_cpus(void)
395{
396 unsigned int cpu, c_cpus, s_cpus;
397 struct sclp_cpu_info *info;
398 u16 boot_cpu_addr, cpu_addr;
399
400 c_cpus = 1;
401 s_cpus = 0;
7b468488 402 boot_cpu_addr = __cpu_logical_map[0];
48483b32
HC
403 info = kmalloc(sizeof(*info), GFP_KERNEL);
404 if (!info)
405 panic("smp_detect_cpus failed to allocate memory\n");
406 /* Use sigp detection algorithm if sclp doesn't work. */
407 if (sclp_get_cpu_info(info)) {
408 smp_use_sigp_detection = 1;
4bb5e07b 409 for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) {
48483b32
HC
410 if (cpu == boot_cpu_addr)
411 continue;
a93b8ec1 412 if (!raw_cpu_stopped(cpu))
48483b32
HC
413 continue;
414 smp_get_save_area(c_cpus, cpu);
415 c_cpus++;
416 }
417 goto out;
418 }
419
420 if (info->has_cpu_type) {
421 for (cpu = 0; cpu < info->combined; cpu++) {
422 if (info->cpu[cpu].address == boot_cpu_addr) {
423 smp_cpu_type = info->cpu[cpu].type;
424 break;
425 }
426 }
427 }
428
429 for (cpu = 0; cpu < info->combined; cpu++) {
430 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
431 continue;
432 cpu_addr = info->cpu[cpu].address;
433 if (cpu_addr == boot_cpu_addr)
434 continue;
a93b8ec1 435 if (!raw_cpu_stopped(cpu_addr)) {
48483b32
HC
436 s_cpus++;
437 continue;
438 }
439 smp_get_save_area(c_cpus, cpu_addr);
440 c_cpus++;
441 }
442out:
443 kfree(info);
395d31d4 444 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 445 get_online_cpus();
1e489518 446 __smp_rescan_cpus();
9d40d2e3 447 put_online_cpus();
48483b32
HC
448}
449
1da177e4 450/*
39ce010d 451 * Activate a secondary processor.
1da177e4 452 */
ea1f4eec 453int __cpuinit start_secondary(void *cpuvoid)
1da177e4 454{
39ce010d 455 cpu_init();
5bfb5d69 456 preempt_disable();
39ce010d 457 init_cpu_timer();
39ce010d 458 init_cpu_vtimer();
29b08d2b
HC
459 pfault_init();
460
e545a614 461 notify_cpu_starting(smp_processor_id());
ca9fc75a 462 ipi_call_lock();
0f1959f5 463 set_cpu_online(smp_processor_id(), true);
ca9fc75a 464 ipi_call_unlock();
7dd6b334
MH
465 __ctl_clear_bit(0, 28); /* Disable lowcore protection */
466 S390_lowcore.restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
467 S390_lowcore.restart_psw.addr =
468 PSW_ADDR_AMODE | (unsigned long) psw_restart_int_handler;
469 __ctl_set_bit(0, 28); /* Enable lowcore protection */
cc34321d
HC
470 /*
471 * Wait until the cpu which brought this one up marked it
472 * active before enabling interrupts.
473 */
474 while (!cpumask_test_cpu(smp_processor_id(), cpu_active_mask))
475 cpu_relax();
1da177e4 476 local_irq_enable();
39ce010d
HC
477 /* cpu_idle will call schedule for us */
478 cpu_idle();
479 return 0;
1da177e4
LT
480}
481
f230886b
HC
482struct create_idle {
483 struct work_struct work;
484 struct task_struct *idle;
485 struct completion done;
486 int cpu;
487};
488
489static void __cpuinit smp_fork_idle(struct work_struct *work)
1da177e4 490{
f230886b 491 struct create_idle *c_idle;
1da177e4 492
f230886b
HC
493 c_idle = container_of(work, struct create_idle, work);
494 c_idle->idle = fork_idle(c_idle->cpu);
495 complete(&c_idle->done);
1da177e4
LT
496}
497
1cb6bb4b
HC
498static int __cpuinit smp_alloc_lowcore(int cpu)
499{
500 unsigned long async_stack, panic_stack;
501 struct _lowcore *lowcore;
1cb6bb4b 502
3fd26a77 503 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1cb6bb4b
HC
504 if (!lowcore)
505 return -ENOMEM;
506 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 507 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
508 if (!panic_stack || !async_stack)
509 goto out;
98c7b388
HC
510 memcpy(lowcore, &S390_lowcore, 512);
511 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
512 lowcore->async_stack = async_stack + ASYNC_SIZE;
513 lowcore->panic_stack = panic_stack + PAGE_SIZE;
7dd6b334
MH
514 lowcore->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
515 lowcore->restart_psw.addr =
516 PSW_ADDR_AMODE | (unsigned long) restart_int_handler;
517 if (user_mode != HOME_SPACE_MODE)
518 lowcore->restart_psw.mask |= PSW_ASC_HOME;
1cb6bb4b
HC
519#ifndef CONFIG_64BIT
520 if (MACHINE_HAS_IEEE) {
521 unsigned long save_area;
522
523 save_area = get_zeroed_page(GFP_KERNEL);
524 if (!save_area)
33b1d09e 525 goto out;
1cb6bb4b
HC
526 lowcore->extended_save_area_addr = (u32) save_area;
527 }
c742b31c
MS
528#else
529 if (vdso_alloc_per_cpu(cpu, lowcore))
530 goto out;
1cb6bb4b
HC
531#endif
532 lowcore_ptr[cpu] = lowcore;
533 return 0;
534
591bb4f6 535out:
33b1d09e 536 free_page(panic_stack);
1cb6bb4b 537 free_pages(async_stack, ASYNC_ORDER);
3fd26a77 538 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
539 return -ENOMEM;
540}
541
1cb6bb4b
HC
542static void smp_free_lowcore(int cpu)
543{
544 struct _lowcore *lowcore;
1cb6bb4b 545
1cb6bb4b
HC
546 lowcore = lowcore_ptr[cpu];
547#ifndef CONFIG_64BIT
548 if (MACHINE_HAS_IEEE)
549 free_page((unsigned long) lowcore->extended_save_area_addr);
c742b31c
MS
550#else
551 vdso_free_per_cpu(cpu, lowcore);
1cb6bb4b
HC
552#endif
553 free_page(lowcore->panic_stack - PAGE_SIZE);
554 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
3fd26a77 555 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
556 lowcore_ptr[cpu] = NULL;
557}
1cb6bb4b 558
1da177e4 559/* Upping and downing of CPUs */
1cb6bb4b 560int __cpuinit __cpu_up(unsigned int cpu)
1da177e4 561{
39ce010d 562 struct _lowcore *cpu_lowcore;
f230886b 563 struct create_idle c_idle;
a93b8ec1 564 struct task_struct *idle;
1da177e4 565 struct stack_frame *sf;
d0d3cdf4 566 u32 lowcore;
a93b8ec1 567 int ccode;
1da177e4 568
08d07968
HC
569 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
570 return -EIO;
f230886b
HC
571 idle = current_set[cpu];
572 if (!idle) {
573 c_idle.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done);
574 INIT_WORK_ONSTACK(&c_idle.work, smp_fork_idle);
575 c_idle.cpu = cpu;
576 schedule_work(&c_idle.work);
577 wait_for_completion(&c_idle.done);
578 if (IS_ERR(c_idle.idle))
579 return PTR_ERR(c_idle.idle);
580 idle = c_idle.idle;
581 current_set[cpu] = c_idle.idle;
582 }
da7f51c1 583 init_idle(idle, cpu);
1cb6bb4b
HC
584 if (smp_alloc_lowcore(cpu))
585 return -ENOMEM;
d0d3cdf4 586 do {
a93b8ec1 587 ccode = sigp(cpu, sigp_initial_cpu_reset);
d0d3cdf4
HC
588 if (ccode == sigp_busy)
589 udelay(10);
590 if (ccode == sigp_not_operational)
591 goto err_out;
592 } while (ccode == sigp_busy);
593
594 lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
a93b8ec1 595 while (sigp_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
d0d3cdf4 596 udelay(10);
1da177e4 597
39ce010d 598 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 599 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 600 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 601 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
602 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
603 - sizeof(struct pt_regs)
604 - sizeof(struct stack_frame));
605 memset(sf, 0, sizeof(struct stack_frame));
606 sf->gprs[9] = (unsigned long) sf;
607 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 608 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
050eef36 609 atomic_inc(&init_mm.context.attach_count);
94c12cc7
MS
610 asm volatile(
611 " stam 0,15,0(%0)"
612 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 613 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d 614 cpu_lowcore->current_task = (unsigned long) idle;
7b468488 615 cpu_lowcore->cpu_nr = cpu;
591bb4f6 616 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
25097bf1 617 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
dfd9f7ab 618 cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
14375bc4
MS
619 memcpy(cpu_lowcore->stfle_fac_list, S390_lowcore.stfle_fac_list,
620 MAX_FACILITY_BIT/8);
1da177e4 621 eieio();
699ff13f 622
a93b8ec1 623 while (sigp(cpu, sigp_restart) == sigp_busy)
699ff13f 624 udelay(10);
1da177e4
LT
625
626 while (!cpu_online(cpu))
627 cpu_relax();
628 return 0;
d0d3cdf4
HC
629
630err_out:
631 smp_free_lowcore(cpu);
632 return -EIO;
1da177e4
LT
633}
634
48483b32 635static int __init setup_possible_cpus(char *s)
255acee7 636{
48483b32 637 int pcpus, cpu;
255acee7 638
48483b32 639 pcpus = simple_strtoul(s, NULL, 0);
88e01285
HC
640 init_cpu_possible(cpumask_of(0));
641 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
def6cfb7 642 set_cpu_possible(cpu, true);
37a33026
HC
643 return 0;
644}
645early_param("possible_cpus", setup_possible_cpus);
646
48483b32
HC
647#ifdef CONFIG_HOTPLUG_CPU
648
39ce010d 649int __cpu_disable(void)
1da177e4 650{
94c12cc7 651 struct ec_creg_mask_parms cr_parms;
f3705136 652 int cpu = smp_processor_id();
1da177e4 653
0f1959f5 654 set_cpu_online(cpu, false);
1da177e4 655
1da177e4 656 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 657 pfault_fini();
1da177e4 658
94c12cc7
MS
659 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
660 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 661
94c12cc7 662 /* disable all external interrupts */
1da177e4 663 cr_parms.orvals[0] = 0;
5bd41878 664 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 11 |
cadfce72
JG
665 1 << 10 | 1 << 9 | 1 << 6 | 1 << 5 |
666 1 << 4);
1da177e4 667 /* disable all I/O interrupts */
1da177e4 668 cr_parms.orvals[6] = 0;
39ce010d
HC
669 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
670 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 671 /* disable most machine checks */
1da177e4 672 cr_parms.orvals[14] = 0;
39ce010d
HC
673 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
674 1 << 25 | 1 << 24);
94c12cc7 675
1da177e4
LT
676 smp_ctl_bit_callback(&cr_parms);
677
1da177e4
LT
678 return 0;
679}
680
39ce010d 681void __cpu_die(unsigned int cpu)
1da177e4
LT
682{
683 /* Wait until target cpu is down */
5c0b912e 684 while (!cpu_stopped(cpu))
1da177e4 685 cpu_relax();
a93b8ec1 686 while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy)
4f8048ee 687 udelay(10);
1cb6bb4b 688 smp_free_lowcore(cpu);
050eef36 689 atomic_dec(&init_mm.context.attach_count);
1da177e4
LT
690}
691
b456d94a 692void __noreturn cpu_die(void)
1da177e4
LT
693{
694 idle_task_exit();
a93b8ec1 695 while (sigp(smp_processor_id(), sigp_stop) == sigp_busy)
f8501ba7 696 cpu_relax();
39ce010d 697 for (;;);
1da177e4
LT
698}
699
255acee7
HC
700#endif /* CONFIG_HOTPLUG_CPU */
701
1da177e4
LT
702void __init smp_prepare_cpus(unsigned int max_cpus)
703{
591bb4f6
HC
704#ifndef CONFIG_64BIT
705 unsigned long save_area = 0;
706#endif
707 unsigned long async_stack, panic_stack;
708 struct _lowcore *lowcore;
39ce010d 709
48483b32
HC
710 smp_detect_cpus();
711
39ce010d
HC
712 /* request the 0x1201 emergency signal external interrupt */
713 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
714 panic("Couldn't request external interrupt 0x1201");
1da177e4 715
591bb4f6 716 /* Reallocate current lowcore, but keep its contents. */
3fd26a77 717 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
591bb4f6
HC
718 panic_stack = __get_free_page(GFP_KERNEL);
719 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
c742b31c 720 BUG_ON(!lowcore || !panic_stack || !async_stack);
347a8dc3 721#ifndef CONFIG_64BIT
77fa2245 722 if (MACHINE_HAS_IEEE)
591bb4f6 723 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 724#endif
591bb4f6
HC
725 local_irq_disable();
726 local_mcck_disable();
727 lowcore_ptr[smp_processor_id()] = lowcore;
728 *lowcore = S390_lowcore;
729 lowcore->panic_stack = panic_stack + PAGE_SIZE;
730 lowcore->async_stack = async_stack + ASYNC_SIZE;
731#ifndef CONFIG_64BIT
732 if (MACHINE_HAS_IEEE)
733 lowcore->extended_save_area_addr = (u32) save_area;
734#endif
735 set_prefix((u32)(unsigned long) lowcore);
736 local_mcck_enable();
737 local_irq_enable();
3a6ba460
HC
738#ifdef CONFIG_64BIT
739 if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore))
740 BUG();
741#endif
1da177e4
LT
742}
743
ea1f4eec 744void __init smp_prepare_boot_cpu(void)
1da177e4
LT
745{
746 BUG_ON(smp_processor_id() != 0);
747
48483b32 748 current_thread_info()->cpu = 0;
0f1959f5
KM
749 set_cpu_present(0, true);
750 set_cpu_online(0, true);
1da177e4
LT
751 S390_lowcore.percpu_offset = __per_cpu_offset[0];
752 current_set[0] = current;
08d07968 753 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 754 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
755}
756
ea1f4eec 757void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 758{
1da177e4
LT
759}
760
02beaccc
HC
761void __init smp_setup_processor_id(void)
762{
763 S390_lowcore.cpu_nr = 0;
764 __cpu_logical_map[0] = stap();
765}
766
1da177e4
LT
767/*
768 * the frequency of the profiling timer can be changed
769 * by writing a multiplier value into /proc/profile.
770 *
771 * usually you want to run this on all CPUs ;)
772 */
773int setup_profiling_timer(unsigned int multiplier)
774{
39ce010d 775 return 0;
1da177e4
LT
776}
777
08d07968 778#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
779static ssize_t cpu_configure_show(struct sys_device *dev,
780 struct sysdev_attribute *attr, char *buf)
08d07968
HC
781{
782 ssize_t count;
783
784 mutex_lock(&smp_cpu_state_mutex);
785 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
786 mutex_unlock(&smp_cpu_state_mutex);
787 return count;
788}
789
4a0b2b4d
AK
790static ssize_t cpu_configure_store(struct sys_device *dev,
791 struct sysdev_attribute *attr,
792 const char *buf, size_t count)
08d07968
HC
793{
794 int cpu = dev->id;
795 int val, rc;
796 char delim;
797
798 if (sscanf(buf, "%d %c", &val, &delim) != 1)
799 return -EINVAL;
800 if (val != 0 && val != 1)
801 return -EINVAL;
802
9d40d2e3 803 get_online_cpus();
0b18d318 804 mutex_lock(&smp_cpu_state_mutex);
08d07968 805 rc = -EBUSY;
2c2df118
HC
806 /* disallow configuration changes of online cpus and cpu 0 */
807 if (cpu_online(cpu) || cpu == 0)
08d07968
HC
808 goto out;
809 rc = 0;
810 switch (val) {
811 case 0:
812 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
813 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 814 if (!rc) {
08d07968 815 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
816 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
817 }
08d07968
HC
818 }
819 break;
820 case 1:
821 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
822 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 823 if (!rc) {
08d07968 824 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
825 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
826 }
08d07968
HC
827 }
828 break;
829 default:
830 break;
831 }
832out:
08d07968 833 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 834 put_online_cpus();
08d07968
HC
835 return rc ? rc : count;
836}
837static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
838#endif /* CONFIG_HOTPLUG_CPU */
839
4a0b2b4d
AK
840static ssize_t cpu_polarization_show(struct sys_device *dev,
841 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
842{
843 int cpu = dev->id;
844 ssize_t count;
845
846 mutex_lock(&smp_cpu_state_mutex);
847 switch (smp_cpu_polarization[cpu]) {
848 case POLARIZATION_HRZ:
849 count = sprintf(buf, "horizontal\n");
850 break;
851 case POLARIZATION_VL:
852 count = sprintf(buf, "vertical:low\n");
853 break;
854 case POLARIZATION_VM:
855 count = sprintf(buf, "vertical:medium\n");
856 break;
857 case POLARIZATION_VH:
858 count = sprintf(buf, "vertical:high\n");
859 break;
860 default:
861 count = sprintf(buf, "unknown\n");
862 break;
863 }
864 mutex_unlock(&smp_cpu_state_mutex);
865 return count;
866}
867static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
868
4a0b2b4d
AK
869static ssize_t show_cpu_address(struct sys_device *dev,
870 struct sysdev_attribute *attr, char *buf)
08d07968
HC
871{
872 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
873}
874static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
875
876
877static struct attribute *cpu_common_attrs[] = {
878#ifdef CONFIG_HOTPLUG_CPU
879 &attr_configure.attr,
880#endif
881 &attr_address.attr,
c10fde0d 882 &attr_polarization.attr,
08d07968
HC
883 NULL,
884};
885
886static struct attribute_group cpu_common_attr_group = {
887 .attrs = cpu_common_attrs,
888};
1da177e4 889
4a0b2b4d
AK
890static ssize_t show_capability(struct sys_device *dev,
891 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
892{
893 unsigned int capability;
894 int rc;
895
896 rc = get_cpu_capability(&capability);
897 if (rc)
898 return rc;
899 return sprintf(buf, "%u\n", capability);
900}
901static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
902
4a0b2b4d
AK
903static ssize_t show_idle_count(struct sys_device *dev,
904 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
905{
906 struct s390_idle_data *idle;
907 unsigned long long idle_count;
e98bbaaf 908 unsigned int sequence;
fae8b22d
HC
909
910 idle = &per_cpu(s390_idle, dev->id);
e98bbaaf
MS
911repeat:
912 sequence = idle->sequence;
913 smp_rmb();
914 if (sequence & 1)
915 goto repeat;
fae8b22d 916 idle_count = idle->idle_count;
6f430924
MS
917 if (idle->idle_enter)
918 idle_count++;
e98bbaaf
MS
919 smp_rmb();
920 if (idle->sequence != sequence)
921 goto repeat;
fae8b22d
HC
922 return sprintf(buf, "%llu\n", idle_count);
923}
924static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
925
4a0b2b4d
AK
926static ssize_t show_idle_time(struct sys_device *dev,
927 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
928{
929 struct s390_idle_data *idle;
6f430924 930 unsigned long long now, idle_time, idle_enter;
e98bbaaf 931 unsigned int sequence;
fae8b22d
HC
932
933 idle = &per_cpu(s390_idle, dev->id);
6f430924 934 now = get_clock();
e98bbaaf
MS
935repeat:
936 sequence = idle->sequence;
937 smp_rmb();
938 if (sequence & 1)
939 goto repeat;
6f430924
MS
940 idle_time = idle->idle_time;
941 idle_enter = idle->idle_enter;
942 if (idle_enter != 0ULL && idle_enter < now)
943 idle_time += now - idle_enter;
e98bbaaf
MS
944 smp_rmb();
945 if (idle->sequence != sequence)
946 goto repeat;
6f430924 947 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 948}
69d39d66 949static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 950
08d07968 951static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
952 &attr_capability.attr,
953 &attr_idle_count.attr,
69d39d66 954 &attr_idle_time_us.attr,
fae8b22d
HC
955 NULL,
956};
957
08d07968
HC
958static struct attribute_group cpu_online_attr_group = {
959 .attrs = cpu_online_attrs,
fae8b22d
HC
960};
961
2fc2d1e9
HC
962static int __cpuinit smp_cpu_notify(struct notifier_block *self,
963 unsigned long action, void *hcpu)
964{
965 unsigned int cpu = (unsigned int)(long)hcpu;
966 struct cpu *c = &per_cpu(cpu_devices, cpu);
967 struct sys_device *s = &c->sysdev;
fae8b22d 968 struct s390_idle_data *idle;
d882ba69 969 int err = 0;
2fc2d1e9
HC
970
971 switch (action) {
972 case CPU_ONLINE:
8bb78442 973 case CPU_ONLINE_FROZEN:
fae8b22d 974 idle = &per_cpu(s390_idle, cpu);
e98bbaaf 975 memset(idle, 0, sizeof(struct s390_idle_data));
d882ba69 976 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
977 break;
978 case CPU_DEAD:
8bb78442 979 case CPU_DEAD_FROZEN:
08d07968 980 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
981 break;
982 }
d882ba69 983 return notifier_from_errno(err);
2fc2d1e9
HC
984}
985
986static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 987 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
988};
989
2bc89b5e 990static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
991{
992 struct cpu *c = &per_cpu(cpu_devices, cpu);
993 struct sys_device *s = &c->sysdev;
994 int rc;
995
996 c->hotpluggable = 1;
997 rc = register_cpu(c, cpu);
998 if (rc)
999 goto out;
1000 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1001 if (rc)
1002 goto out_cpu;
1003 if (!cpu_online(cpu))
1004 goto out;
1005 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1006 if (!rc)
1007 return 0;
1008 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1009out_cpu:
1010#ifdef CONFIG_HOTPLUG_CPU
1011 unregister_cpu(c);
1012#endif
1013out:
1014 return rc;
1015}
1016
1017#ifdef CONFIG_HOTPLUG_CPU
1e489518 1018
67060d9c 1019int __ref smp_rescan_cpus(void)
08d07968
HC
1020{
1021 cpumask_t newcpus;
1022 int cpu;
1023 int rc;
1024
9d40d2e3 1025 get_online_cpus();
0b18d318 1026 mutex_lock(&smp_cpu_state_mutex);
0f1959f5 1027 cpumask_copy(&newcpus, cpu_present_mask);
1e489518 1028 rc = __smp_rescan_cpus();
08d07968
HC
1029 if (rc)
1030 goto out;
0f1959f5
KM
1031 cpumask_andnot(&newcpus, cpu_present_mask, &newcpus);
1032 for_each_cpu(cpu, &newcpus) {
08d07968
HC
1033 rc = smp_add_present_cpu(cpu);
1034 if (rc)
0f1959f5 1035 set_cpu_present(cpu, false);
08d07968
HC
1036 }
1037 rc = 0;
1038out:
08d07968 1039 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1040 put_online_cpus();
0f1959f5 1041 if (!cpumask_empty(&newcpus))
c10fde0d 1042 topology_schedule_update();
1e489518
HC
1043 return rc;
1044}
1045
c9be0a36
AK
1046static ssize_t __ref rescan_store(struct sysdev_class *class,
1047 struct sysdev_class_attribute *attr,
1048 const char *buf,
1e489518
HC
1049 size_t count)
1050{
1051 int rc;
1052
1053 rc = smp_rescan_cpus();
08d07968
HC
1054 return rc ? rc : count;
1055}
da5aae70 1056static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1057#endif /* CONFIG_HOTPLUG_CPU */
1058
5fbcae57
HC
1059static ssize_t dispatching_show(struct sysdev_class *class,
1060 struct sysdev_class_attribute *attr,
1061 char *buf)
c10fde0d
HC
1062{
1063 ssize_t count;
1064
1065 mutex_lock(&smp_cpu_state_mutex);
1066 count = sprintf(buf, "%d\n", cpu_management);
1067 mutex_unlock(&smp_cpu_state_mutex);
1068 return count;
1069}
1070
c9be0a36
AK
1071static ssize_t dispatching_store(struct sysdev_class *dev,
1072 struct sysdev_class_attribute *attr,
1073 const char *buf,
da5aae70 1074 size_t count)
c10fde0d
HC
1075{
1076 int val, rc;
1077 char delim;
1078
1079 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1080 return -EINVAL;
1081 if (val != 0 && val != 1)
1082 return -EINVAL;
1083 rc = 0;
c10fde0d 1084 get_online_cpus();
0b18d318 1085 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1086 if (cpu_management == val)
1087 goto out;
1088 rc = topology_set_cpu_management(val);
1089 if (!rc)
1090 cpu_management = val;
1091out:
c10fde0d 1092 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1093 put_online_cpus();
c10fde0d
HC
1094 return rc ? rc : count;
1095}
da5aae70
HC
1096static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1097 dispatching_store);
c10fde0d 1098
1da177e4
LT
1099static int __init topology_init(void)
1100{
1101 int cpu;
fae8b22d 1102 int rc;
2fc2d1e9
HC
1103
1104 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1105
08d07968 1106#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1107 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1108 if (rc)
1109 return rc;
1110#endif
da5aae70 1111 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1112 if (rc)
1113 return rc;
08d07968
HC
1114 for_each_present_cpu(cpu) {
1115 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1116 if (rc)
1117 return rc;
1da177e4
LT
1118 }
1119 return 0;
1120}
1da177e4 1121subsys_initcall(topology_init);
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