Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
155af2f9 | 4 | * Copyright IBM Corp. 1999, 2009 |
1da177e4 | 5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
39ce010d HC |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
1da177e4 | 8 | * |
39ce010d | 9 | * based on other smp stuff by |
1da177e4 LT |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
395d31d4 MS |
23 | #define KMSG_COMPONENT "cpu" |
24 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
25 | ||
1da177e4 LT |
26 | #include <linux/module.h> |
27 | #include <linux/init.h> | |
1da177e4 | 28 | #include <linux/mm.h> |
4e950f6f | 29 | #include <linux/err.h> |
1da177e4 LT |
30 | #include <linux/spinlock.h> |
31 | #include <linux/kernel_stat.h> | |
1da177e4 LT |
32 | #include <linux/delay.h> |
33 | #include <linux/cache.h> | |
34 | #include <linux/interrupt.h> | |
3324e60a | 35 | #include <linux/irqflags.h> |
1da177e4 | 36 | #include <linux/cpu.h> |
2b67fc46 | 37 | #include <linux/timex.h> |
411ed322 | 38 | #include <linux/bootmem.h> |
46b05d26 | 39 | #include <asm/ipl.h> |
2b67fc46 | 40 | #include <asm/setup.h> |
1da177e4 LT |
41 | #include <asm/sigp.h> |
42 | #include <asm/pgalloc.h> | |
43 | #include <asm/irq.h> | |
44 | #include <asm/s390_ext.h> | |
45 | #include <asm/cpcmd.h> | |
46 | #include <asm/tlbflush.h> | |
2b67fc46 | 47 | #include <asm/timer.h> |
411ed322 | 48 | #include <asm/lowcore.h> |
08d07968 | 49 | #include <asm/sclp.h> |
76d4e00a | 50 | #include <asm/cputime.h> |
c742b31c | 51 | #include <asm/vdso.h> |
4bb5e07b | 52 | #include <asm/cpu.h> |
a806170e | 53 | #include "entry.h" |
1da177e4 | 54 | |
1da177e4 LT |
55 | static struct task_struct *current_set[NR_CPUS]; |
56 | ||
08d07968 HC |
57 | static u8 smp_cpu_type; |
58 | static int smp_use_sigp_detection; | |
59 | ||
60 | enum s390_cpu_state { | |
61 | CPU_STATE_STANDBY, | |
62 | CPU_STATE_CONFIGURED, | |
63 | }; | |
64 | ||
dbd70fb4 | 65 | DEFINE_MUTEX(smp_cpu_state_mutex); |
c10fde0d | 66 | int smp_cpu_polarization[NR_CPUS]; |
08d07968 | 67 | static int smp_cpu_state[NR_CPUS]; |
c10fde0d | 68 | static int cpu_management; |
08d07968 HC |
69 | |
70 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
08d07968 | 71 | |
1da177e4 | 72 | static void smp_ext_bitcall(int, ec_bit_sig); |
1da177e4 | 73 | |
677d7623 | 74 | void smp_send_stop(void) |
1da177e4 | 75 | { |
39ce010d | 76 | int cpu, rc; |
1da177e4 | 77 | |
677d7623 HC |
78 | /* Disable all interrupts/machine checks */ |
79 | __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); | |
3324e60a | 80 | trace_hardirqs_off(); |
1da177e4 | 81 | |
677d7623 | 82 | /* stop all processors */ |
1da177e4 LT |
83 | for_each_online_cpu(cpu) { |
84 | if (cpu == smp_processor_id()) | |
85 | continue; | |
86 | do { | |
677d7623 | 87 | rc = signal_processor(cpu, sigp_stop); |
39ce010d | 88 | } while (rc == sigp_busy); |
1da177e4 | 89 | |
39ce010d | 90 | while (!smp_cpu_not_running(cpu)) |
c6b5b847 HC |
91 | cpu_relax(); |
92 | } | |
93 | } | |
94 | ||
1da177e4 LT |
95 | /* |
96 | * This is the main routine where commands issued by other | |
97 | * cpus are handled. | |
98 | */ | |
99 | ||
2b67fc46 | 100 | static void do_ext_call_interrupt(__u16 code) |
1da177e4 | 101 | { |
39ce010d | 102 | unsigned long bits; |
1da177e4 | 103 | |
39ce010d HC |
104 | /* |
105 | * handle bit signal external calls | |
106 | * | |
107 | * For the ec_schedule signal we have to do nothing. All the work | |
108 | * is done automatically when we return from the interrupt. | |
109 | */ | |
1da177e4 LT |
110 | bits = xchg(&S390_lowcore.ext_call_fast, 0); |
111 | ||
39ce010d | 112 | if (test_bit(ec_call_function, &bits)) |
ca9fc75a HC |
113 | generic_smp_call_function_interrupt(); |
114 | ||
115 | if (test_bit(ec_call_function_single, &bits)) | |
116 | generic_smp_call_function_single_interrupt(); | |
1da177e4 LT |
117 | } |
118 | ||
119 | /* | |
120 | * Send an external call sigp to another cpu and return without waiting | |
121 | * for its completion. | |
122 | */ | |
123 | static void smp_ext_bitcall(int cpu, ec_bit_sig sig) | |
124 | { | |
39ce010d HC |
125 | /* |
126 | * Set signaling bit in lowcore of target cpu and kick it | |
127 | */ | |
1da177e4 | 128 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); |
39ce010d | 129 | while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
130 | udelay(10); |
131 | } | |
132 | ||
ca9fc75a HC |
133 | void arch_send_call_function_ipi(cpumask_t mask) |
134 | { | |
135 | int cpu; | |
136 | ||
137 | for_each_cpu_mask(cpu, mask) | |
138 | smp_ext_bitcall(cpu, ec_call_function); | |
139 | } | |
140 | ||
141 | void arch_send_call_function_single_ipi(int cpu) | |
142 | { | |
143 | smp_ext_bitcall(cpu, ec_call_function_single); | |
144 | } | |
145 | ||
347a8dc3 | 146 | #ifndef CONFIG_64BIT |
1da177e4 LT |
147 | /* |
148 | * this function sends a 'purge tlb' signal to another CPU. | |
149 | */ | |
a806170e | 150 | static void smp_ptlb_callback(void *info) |
1da177e4 | 151 | { |
ba8a9229 | 152 | __tlb_flush_local(); |
1da177e4 LT |
153 | } |
154 | ||
155 | void smp_ptlb_all(void) | |
156 | { | |
15c8b6c1 | 157 | on_each_cpu(smp_ptlb_callback, NULL, 1); |
1da177e4 LT |
158 | } |
159 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 160 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
161 | |
162 | /* | |
163 | * this function sends a 'reschedule' IPI to another CPU. | |
164 | * it goes straight through and wastes no time serializing | |
165 | * anything. Worst case is that we lose a reschedule ... | |
166 | */ | |
167 | void smp_send_reschedule(int cpu) | |
168 | { | |
39ce010d | 169 | smp_ext_bitcall(cpu, ec_schedule); |
1da177e4 LT |
170 | } |
171 | ||
172 | /* | |
173 | * parameter area for the set/clear control bit callbacks | |
174 | */ | |
94c12cc7 | 175 | struct ec_creg_mask_parms { |
1da177e4 LT |
176 | unsigned long orvals[16]; |
177 | unsigned long andvals[16]; | |
94c12cc7 | 178 | }; |
1da177e4 LT |
179 | |
180 | /* | |
181 | * callback for setting/clearing control bits | |
182 | */ | |
39ce010d HC |
183 | static void smp_ctl_bit_callback(void *info) |
184 | { | |
94c12cc7 | 185 | struct ec_creg_mask_parms *pp = info; |
1da177e4 LT |
186 | unsigned long cregs[16]; |
187 | int i; | |
39ce010d | 188 | |
94c12cc7 MS |
189 | __ctl_store(cregs, 0, 15); |
190 | for (i = 0; i <= 15; i++) | |
1da177e4 | 191 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; |
94c12cc7 | 192 | __ctl_load(cregs, 0, 15); |
1da177e4 LT |
193 | } |
194 | ||
195 | /* | |
196 | * Set a bit in a control register of all cpus | |
197 | */ | |
94c12cc7 MS |
198 | void smp_ctl_set_bit(int cr, int bit) |
199 | { | |
200 | struct ec_creg_mask_parms parms; | |
1da177e4 | 201 | |
94c12cc7 MS |
202 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
203 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 204 | parms.orvals[cr] = 1 << bit; |
15c8b6c1 | 205 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 206 | } |
39ce010d | 207 | EXPORT_SYMBOL(smp_ctl_set_bit); |
1da177e4 LT |
208 | |
209 | /* | |
210 | * Clear a bit in a control register of all cpus | |
211 | */ | |
94c12cc7 MS |
212 | void smp_ctl_clear_bit(int cr, int bit) |
213 | { | |
214 | struct ec_creg_mask_parms parms; | |
1da177e4 | 215 | |
94c12cc7 MS |
216 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
217 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 218 | parms.andvals[cr] = ~(1L << bit); |
15c8b6c1 | 219 | on_each_cpu(smp_ctl_bit_callback, &parms, 1); |
1da177e4 | 220 | } |
39ce010d | 221 | EXPORT_SYMBOL(smp_ctl_clear_bit); |
1da177e4 | 222 | |
08d07968 HC |
223 | /* |
224 | * In early ipl state a temp. logically cpu number is needed, so the sigp | |
225 | * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on | |
226 | * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1. | |
227 | */ | |
228 | #define CPU_INIT_NO 1 | |
229 | ||
59f2e69d | 230 | #ifdef CONFIG_ZFCPDUMP |
411ed322 MH |
231 | |
232 | /* | |
233 | * zfcpdump_prefix_array holds prefix registers for the following scenario: | |
234 | * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to | |
235 | * save its prefix registers, since they get lost, when switching from 31 bit | |
236 | * to 64 bit. | |
237 | */ | |
238 | unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \ | |
239 | __attribute__((__section__(".data"))); | |
240 | ||
285f6722 | 241 | static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) |
411ed322 | 242 | { |
411ed322 MH |
243 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) |
244 | return; | |
285f6722 | 245 | if (cpu >= NR_CPUS) { |
395d31d4 MS |
246 | pr_warning("CPU %i exceeds the maximum %i and is excluded from " |
247 | "the dump\n", cpu, NR_CPUS - 1); | |
285f6722 | 248 | return; |
411ed322 | 249 | } |
48483b32 | 250 | zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL); |
08d07968 HC |
251 | __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu; |
252 | while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) == | |
253 | sigp_busy) | |
285f6722 HC |
254 | cpu_relax(); |
255 | memcpy(zfcpdump_save_areas[cpu], | |
256 | (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE, | |
257 | SAVE_AREA_SIZE); | |
258 | #ifdef CONFIG_64BIT | |
259 | /* copy original prefix register */ | |
260 | zfcpdump_save_areas[cpu]->s390x.pref_reg = zfcpdump_prefix_array[cpu]; | |
261 | #endif | |
411ed322 MH |
262 | } |
263 | ||
264 | union save_area *zfcpdump_save_areas[NR_CPUS + 1]; | |
265 | EXPORT_SYMBOL_GPL(zfcpdump_save_areas); | |
266 | ||
267 | #else | |
285f6722 HC |
268 | |
269 | static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { } | |
270 | ||
59f2e69d | 271 | #endif /* CONFIG_ZFCPDUMP */ |
411ed322 | 272 | |
08d07968 HC |
273 | static int cpu_stopped(int cpu) |
274 | { | |
275 | __u32 status; | |
276 | ||
277 | /* Check for stopped state */ | |
278 | if (signal_processor_ps(&status, 0, cpu, sigp_sense) == | |
279 | sigp_status_stored) { | |
280 | if (status & 0x40) | |
281 | return 1; | |
282 | } | |
283 | return 0; | |
284 | } | |
285 | ||
08d07968 HC |
286 | static int cpu_known(int cpu_id) |
287 | { | |
288 | int cpu; | |
289 | ||
290 | for_each_present_cpu(cpu) { | |
291 | if (__cpu_logical_map[cpu] == cpu_id) | |
292 | return 1; | |
293 | } | |
294 | return 0; | |
295 | } | |
296 | ||
297 | static int smp_rescan_cpus_sigp(cpumask_t avail) | |
298 | { | |
299 | int cpu_id, logical_cpu; | |
300 | ||
93632d1b RR |
301 | logical_cpu = cpumask_first(&avail); |
302 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 | 303 | return 0; |
4bb5e07b | 304 | for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) { |
08d07968 HC |
305 | if (cpu_known(cpu_id)) |
306 | continue; | |
307 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 308 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
309 | if (!cpu_stopped(logical_cpu)) |
310 | continue; | |
311 | cpu_set(logical_cpu, cpu_present_map); | |
312 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
93632d1b RR |
313 | logical_cpu = cpumask_next(logical_cpu, &avail); |
314 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 HC |
315 | break; |
316 | } | |
317 | return 0; | |
318 | } | |
319 | ||
48483b32 | 320 | static int smp_rescan_cpus_sclp(cpumask_t avail) |
08d07968 HC |
321 | { |
322 | struct sclp_cpu_info *info; | |
323 | int cpu_id, logical_cpu, cpu; | |
324 | int rc; | |
325 | ||
93632d1b RR |
326 | logical_cpu = cpumask_first(&avail); |
327 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 | 328 | return 0; |
48483b32 | 329 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
08d07968 HC |
330 | if (!info) |
331 | return -ENOMEM; | |
332 | rc = sclp_get_cpu_info(info); | |
333 | if (rc) | |
334 | goto out; | |
335 | for (cpu = 0; cpu < info->combined; cpu++) { | |
336 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
337 | continue; | |
338 | cpu_id = info->cpu[cpu].address; | |
339 | if (cpu_known(cpu_id)) | |
340 | continue; | |
341 | __cpu_logical_map[logical_cpu] = cpu_id; | |
c10fde0d | 342 | smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; |
08d07968 HC |
343 | cpu_set(logical_cpu, cpu_present_map); |
344 | if (cpu >= info->configured) | |
345 | smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY; | |
346 | else | |
347 | smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; | |
93632d1b RR |
348 | logical_cpu = cpumask_next(logical_cpu, &avail); |
349 | if (logical_cpu >= nr_cpu_ids) | |
08d07968 HC |
350 | break; |
351 | } | |
352 | out: | |
48483b32 | 353 | kfree(info); |
08d07968 HC |
354 | return rc; |
355 | } | |
356 | ||
1e489518 | 357 | static int __smp_rescan_cpus(void) |
08d07968 HC |
358 | { |
359 | cpumask_t avail; | |
360 | ||
48483b32 | 361 | cpus_xor(avail, cpu_possible_map, cpu_present_map); |
08d07968 HC |
362 | if (smp_use_sigp_detection) |
363 | return smp_rescan_cpus_sigp(avail); | |
364 | else | |
365 | return smp_rescan_cpus_sclp(avail); | |
1da177e4 LT |
366 | } |
367 | ||
48483b32 HC |
368 | static void __init smp_detect_cpus(void) |
369 | { | |
370 | unsigned int cpu, c_cpus, s_cpus; | |
371 | struct sclp_cpu_info *info; | |
372 | u16 boot_cpu_addr, cpu_addr; | |
373 | ||
374 | c_cpus = 1; | |
375 | s_cpus = 0; | |
7b468488 | 376 | boot_cpu_addr = __cpu_logical_map[0]; |
48483b32 HC |
377 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
378 | if (!info) | |
379 | panic("smp_detect_cpus failed to allocate memory\n"); | |
380 | /* Use sigp detection algorithm if sclp doesn't work. */ | |
381 | if (sclp_get_cpu_info(info)) { | |
382 | smp_use_sigp_detection = 1; | |
4bb5e07b | 383 | for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) { |
48483b32 HC |
384 | if (cpu == boot_cpu_addr) |
385 | continue; | |
386 | __cpu_logical_map[CPU_INIT_NO] = cpu; | |
387 | if (!cpu_stopped(CPU_INIT_NO)) | |
388 | continue; | |
389 | smp_get_save_area(c_cpus, cpu); | |
390 | c_cpus++; | |
391 | } | |
392 | goto out; | |
393 | } | |
394 | ||
395 | if (info->has_cpu_type) { | |
396 | for (cpu = 0; cpu < info->combined; cpu++) { | |
397 | if (info->cpu[cpu].address == boot_cpu_addr) { | |
398 | smp_cpu_type = info->cpu[cpu].type; | |
399 | break; | |
400 | } | |
401 | } | |
402 | } | |
403 | ||
404 | for (cpu = 0; cpu < info->combined; cpu++) { | |
405 | if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) | |
406 | continue; | |
407 | cpu_addr = info->cpu[cpu].address; | |
408 | if (cpu_addr == boot_cpu_addr) | |
409 | continue; | |
410 | __cpu_logical_map[CPU_INIT_NO] = cpu_addr; | |
411 | if (!cpu_stopped(CPU_INIT_NO)) { | |
412 | s_cpus++; | |
413 | continue; | |
414 | } | |
415 | smp_get_save_area(c_cpus, cpu_addr); | |
416 | c_cpus++; | |
417 | } | |
418 | out: | |
419 | kfree(info); | |
395d31d4 | 420 | pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); |
9d40d2e3 | 421 | get_online_cpus(); |
1e489518 | 422 | __smp_rescan_cpus(); |
9d40d2e3 | 423 | put_online_cpus(); |
48483b32 HC |
424 | } |
425 | ||
1da177e4 | 426 | /* |
39ce010d | 427 | * Activate a secondary processor. |
1da177e4 | 428 | */ |
ea1f4eec | 429 | int __cpuinit start_secondary(void *cpuvoid) |
1da177e4 | 430 | { |
39ce010d HC |
431 | /* Setup the cpu */ |
432 | cpu_init(); | |
5bfb5d69 | 433 | preempt_disable(); |
d54853ef | 434 | /* Enable TOD clock interrupts on the secondary cpu. */ |
39ce010d | 435 | init_cpu_timer(); |
d54853ef | 436 | /* Enable cpu timer interrupts on the secondary cpu. */ |
39ce010d | 437 | init_cpu_vtimer(); |
1da177e4 | 438 | /* Enable pfault pseudo page faults on this cpu. */ |
29b08d2b HC |
439 | pfault_init(); |
440 | ||
e545a614 MS |
441 | /* call cpu notifiers */ |
442 | notify_cpu_starting(smp_processor_id()); | |
1da177e4 | 443 | /* Mark this cpu as online */ |
ca9fc75a | 444 | ipi_call_lock(); |
1da177e4 | 445 | cpu_set(smp_processor_id(), cpu_online_map); |
ca9fc75a | 446 | ipi_call_unlock(); |
1da177e4 LT |
447 | /* Switch on interrupts */ |
448 | local_irq_enable(); | |
39ce010d | 449 | /* Print info about this processor */ |
7b468488 | 450 | print_cpu_info(); |
39ce010d HC |
451 | /* cpu_idle will call schedule for us */ |
452 | cpu_idle(); | |
453 | return 0; | |
1da177e4 LT |
454 | } |
455 | ||
456 | static void __init smp_create_idle(unsigned int cpu) | |
457 | { | |
458 | struct task_struct *p; | |
459 | ||
460 | /* | |
461 | * don't care about the psw and regs settings since we'll never | |
462 | * reschedule the forked task. | |
463 | */ | |
464 | p = fork_idle(cpu); | |
465 | if (IS_ERR(p)) | |
466 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
467 | current_set[cpu] = p; | |
468 | } | |
469 | ||
1cb6bb4b HC |
470 | static int __cpuinit smp_alloc_lowcore(int cpu) |
471 | { | |
472 | unsigned long async_stack, panic_stack; | |
473 | struct _lowcore *lowcore; | |
474 | int lc_order; | |
475 | ||
476 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
477 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order); | |
478 | if (!lowcore) | |
479 | return -ENOMEM; | |
480 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
1cb6bb4b | 481 | panic_stack = __get_free_page(GFP_KERNEL); |
591bb4f6 HC |
482 | if (!panic_stack || !async_stack) |
483 | goto out; | |
98c7b388 HC |
484 | memcpy(lowcore, &S390_lowcore, 512); |
485 | memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512); | |
1cb6bb4b HC |
486 | lowcore->async_stack = async_stack + ASYNC_SIZE; |
487 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
488 | ||
489 | #ifndef CONFIG_64BIT | |
490 | if (MACHINE_HAS_IEEE) { | |
491 | unsigned long save_area; | |
492 | ||
493 | save_area = get_zeroed_page(GFP_KERNEL); | |
494 | if (!save_area) | |
33b1d09e | 495 | goto out; |
1cb6bb4b HC |
496 | lowcore->extended_save_area_addr = (u32) save_area; |
497 | } | |
c742b31c MS |
498 | #else |
499 | if (vdso_alloc_per_cpu(cpu, lowcore)) | |
500 | goto out; | |
1cb6bb4b HC |
501 | #endif |
502 | lowcore_ptr[cpu] = lowcore; | |
503 | return 0; | |
504 | ||
591bb4f6 | 505 | out: |
33b1d09e | 506 | free_page(panic_stack); |
1cb6bb4b | 507 | free_pages(async_stack, ASYNC_ORDER); |
1cb6bb4b HC |
508 | free_pages((unsigned long) lowcore, lc_order); |
509 | return -ENOMEM; | |
510 | } | |
511 | ||
1cb6bb4b HC |
512 | static void smp_free_lowcore(int cpu) |
513 | { | |
514 | struct _lowcore *lowcore; | |
515 | int lc_order; | |
516 | ||
517 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
518 | lowcore = lowcore_ptr[cpu]; | |
519 | #ifndef CONFIG_64BIT | |
520 | if (MACHINE_HAS_IEEE) | |
521 | free_page((unsigned long) lowcore->extended_save_area_addr); | |
c742b31c MS |
522 | #else |
523 | vdso_free_per_cpu(cpu, lowcore); | |
1cb6bb4b HC |
524 | #endif |
525 | free_page(lowcore->panic_stack - PAGE_SIZE); | |
526 | free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER); | |
527 | free_pages((unsigned long) lowcore, lc_order); | |
528 | lowcore_ptr[cpu] = NULL; | |
529 | } | |
1cb6bb4b | 530 | |
1da177e4 | 531 | /* Upping and downing of CPUs */ |
1cb6bb4b | 532 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 LT |
533 | { |
534 | struct task_struct *idle; | |
39ce010d | 535 | struct _lowcore *cpu_lowcore; |
1da177e4 | 536 | struct stack_frame *sf; |
39ce010d | 537 | sigp_ccode ccode; |
d0d3cdf4 | 538 | u32 lowcore; |
1da177e4 | 539 | |
08d07968 HC |
540 | if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED) |
541 | return -EIO; | |
1cb6bb4b HC |
542 | if (smp_alloc_lowcore(cpu)) |
543 | return -ENOMEM; | |
d0d3cdf4 HC |
544 | do { |
545 | ccode = signal_processor(cpu, sigp_initial_cpu_reset); | |
546 | if (ccode == sigp_busy) | |
547 | udelay(10); | |
548 | if (ccode == sigp_not_operational) | |
549 | goto err_out; | |
550 | } while (ccode == sigp_busy); | |
551 | ||
552 | lowcore = (u32)(unsigned long)lowcore_ptr[cpu]; | |
553 | while (signal_processor_p(lowcore, cpu, sigp_set_prefix) == sigp_busy) | |
554 | udelay(10); | |
1da177e4 LT |
555 | |
556 | idle = current_set[cpu]; | |
39ce010d | 557 | cpu_lowcore = lowcore_ptr[cpu]; |
1da177e4 | 558 | cpu_lowcore->kernel_stack = (unsigned long) |
39ce010d | 559 | task_stack_page(idle) + THREAD_SIZE; |
1cb6bb4b | 560 | cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle); |
1da177e4 LT |
561 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
562 | - sizeof(struct pt_regs) | |
563 | - sizeof(struct stack_frame)); | |
564 | memset(sf, 0, sizeof(struct stack_frame)); | |
565 | sf->gprs[9] = (unsigned long) sf; | |
566 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
24d3e210 | 567 | __ctl_store(cpu_lowcore->cregs_save_area, 0, 15); |
94c12cc7 MS |
568 | asm volatile( |
569 | " stam 0,15,0(%0)" | |
570 | : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); | |
1da177e4 | 571 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; |
39ce010d | 572 | cpu_lowcore->current_task = (unsigned long) idle; |
7b468488 | 573 | cpu_lowcore->cpu_nr = cpu; |
591bb4f6 | 574 | cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce; |
25097bf1 | 575 | cpu_lowcore->machine_flags = S390_lowcore.machine_flags; |
dfd9f7ab | 576 | cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func; |
1da177e4 | 577 | eieio(); |
699ff13f | 578 | |
39ce010d | 579 | while (signal_processor(cpu, sigp_restart) == sigp_busy) |
699ff13f | 580 | udelay(10); |
1da177e4 LT |
581 | |
582 | while (!cpu_online(cpu)) | |
583 | cpu_relax(); | |
584 | return 0; | |
d0d3cdf4 HC |
585 | |
586 | err_out: | |
587 | smp_free_lowcore(cpu); | |
588 | return -EIO; | |
1da177e4 LT |
589 | } |
590 | ||
48483b32 | 591 | static int __init setup_possible_cpus(char *s) |
255acee7 | 592 | { |
48483b32 | 593 | int pcpus, cpu; |
255acee7 | 594 | |
48483b32 | 595 | pcpus = simple_strtoul(s, NULL, 0); |
88e01285 HC |
596 | init_cpu_possible(cpumask_of(0)); |
597 | for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++) | |
def6cfb7 | 598 | set_cpu_possible(cpu, true); |
37a33026 HC |
599 | return 0; |
600 | } | |
601 | early_param("possible_cpus", setup_possible_cpus); | |
602 | ||
48483b32 HC |
603 | #ifdef CONFIG_HOTPLUG_CPU |
604 | ||
39ce010d | 605 | int __cpu_disable(void) |
1da177e4 | 606 | { |
94c12cc7 | 607 | struct ec_creg_mask_parms cr_parms; |
f3705136 | 608 | int cpu = smp_processor_id(); |
1da177e4 | 609 | |
f3705136 | 610 | cpu_clear(cpu, cpu_online_map); |
1da177e4 | 611 | |
1da177e4 | 612 | /* Disable pfault pseudo page faults on this cpu. */ |
29b08d2b | 613 | pfault_fini(); |
1da177e4 | 614 | |
94c12cc7 MS |
615 | memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals)); |
616 | memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals)); | |
1da177e4 | 617 | |
94c12cc7 | 618 | /* disable all external interrupts */ |
1da177e4 | 619 | cr_parms.orvals[0] = 0; |
39ce010d HC |
620 | cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 | |
621 | 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4); | |
1da177e4 | 622 | /* disable all I/O interrupts */ |
1da177e4 | 623 | cr_parms.orvals[6] = 0; |
39ce010d HC |
624 | cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 | |
625 | 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24); | |
1da177e4 | 626 | /* disable most machine checks */ |
1da177e4 | 627 | cr_parms.orvals[14] = 0; |
39ce010d HC |
628 | cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 | |
629 | 1 << 25 | 1 << 24); | |
94c12cc7 | 630 | |
1da177e4 LT |
631 | smp_ctl_bit_callback(&cr_parms); |
632 | ||
1da177e4 LT |
633 | return 0; |
634 | } | |
635 | ||
39ce010d | 636 | void __cpu_die(unsigned int cpu) |
1da177e4 LT |
637 | { |
638 | /* Wait until target cpu is down */ | |
639 | while (!smp_cpu_not_running(cpu)) | |
640 | cpu_relax(); | |
1cb6bb4b | 641 | smp_free_lowcore(cpu); |
395d31d4 | 642 | pr_info("Processor %d stopped\n", cpu); |
1da177e4 LT |
643 | } |
644 | ||
39ce010d | 645 | void cpu_die(void) |
1da177e4 LT |
646 | { |
647 | idle_task_exit(); | |
648 | signal_processor(smp_processor_id(), sigp_stop); | |
649 | BUG(); | |
39ce010d | 650 | for (;;); |
1da177e4 LT |
651 | } |
652 | ||
255acee7 HC |
653 | #endif /* CONFIG_HOTPLUG_CPU */ |
654 | ||
1da177e4 LT |
655 | void __init smp_prepare_cpus(unsigned int max_cpus) |
656 | { | |
591bb4f6 HC |
657 | #ifndef CONFIG_64BIT |
658 | unsigned long save_area = 0; | |
659 | #endif | |
660 | unsigned long async_stack, panic_stack; | |
661 | struct _lowcore *lowcore; | |
1da177e4 | 662 | unsigned int cpu; |
591bb4f6 | 663 | int lc_order; |
39ce010d | 664 | |
48483b32 HC |
665 | smp_detect_cpus(); |
666 | ||
39ce010d HC |
667 | /* request the 0x1201 emergency signal external interrupt */ |
668 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
669 | panic("Couldn't request external interrupt 0x1201"); | |
7b468488 | 670 | print_cpu_info(); |
1da177e4 | 671 | |
591bb4f6 HC |
672 | /* Reallocate current lowcore, but keep its contents. */ |
673 | lc_order = sizeof(long) == 8 ? 1 : 0; | |
674 | lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order); | |
675 | panic_stack = __get_free_page(GFP_KERNEL); | |
676 | async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); | |
c742b31c | 677 | BUG_ON(!lowcore || !panic_stack || !async_stack); |
347a8dc3 | 678 | #ifndef CONFIG_64BIT |
77fa2245 | 679 | if (MACHINE_HAS_IEEE) |
591bb4f6 | 680 | save_area = get_zeroed_page(GFP_KERNEL); |
77fa2245 | 681 | #endif |
591bb4f6 HC |
682 | local_irq_disable(); |
683 | local_mcck_disable(); | |
684 | lowcore_ptr[smp_processor_id()] = lowcore; | |
685 | *lowcore = S390_lowcore; | |
686 | lowcore->panic_stack = panic_stack + PAGE_SIZE; | |
687 | lowcore->async_stack = async_stack + ASYNC_SIZE; | |
688 | #ifndef CONFIG_64BIT | |
689 | if (MACHINE_HAS_IEEE) | |
690 | lowcore->extended_save_area_addr = (u32) save_area; | |
691 | #endif | |
692 | set_prefix((u32)(unsigned long) lowcore); | |
693 | local_mcck_enable(); | |
694 | local_irq_enable(); | |
3a6ba460 HC |
695 | #ifdef CONFIG_64BIT |
696 | if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore)) | |
697 | BUG(); | |
698 | #endif | |
97db7fbf | 699 | for_each_possible_cpu(cpu) |
1da177e4 LT |
700 | if (cpu != smp_processor_id()) |
701 | smp_create_idle(cpu); | |
702 | } | |
703 | ||
ea1f4eec | 704 | void __init smp_prepare_boot_cpu(void) |
1da177e4 LT |
705 | { |
706 | BUG_ON(smp_processor_id() != 0); | |
707 | ||
48483b32 HC |
708 | current_thread_info()->cpu = 0; |
709 | cpu_set(0, cpu_present_map); | |
1da177e4 | 710 | cpu_set(0, cpu_online_map); |
1da177e4 LT |
711 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
712 | current_set[0] = current; | |
08d07968 | 713 | smp_cpu_state[0] = CPU_STATE_CONFIGURED; |
c10fde0d | 714 | smp_cpu_polarization[0] = POLARIZATION_UNKNWN; |
1da177e4 LT |
715 | } |
716 | ||
ea1f4eec | 717 | void __init smp_cpus_done(unsigned int max_cpus) |
1da177e4 | 718 | { |
1da177e4 LT |
719 | } |
720 | ||
721 | /* | |
722 | * the frequency of the profiling timer can be changed | |
723 | * by writing a multiplier value into /proc/profile. | |
724 | * | |
725 | * usually you want to run this on all CPUs ;) | |
726 | */ | |
727 | int setup_profiling_timer(unsigned int multiplier) | |
728 | { | |
39ce010d | 729 | return 0; |
1da177e4 LT |
730 | } |
731 | ||
08d07968 | 732 | #ifdef CONFIG_HOTPLUG_CPU |
4a0b2b4d AK |
733 | static ssize_t cpu_configure_show(struct sys_device *dev, |
734 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
735 | { |
736 | ssize_t count; | |
737 | ||
738 | mutex_lock(&smp_cpu_state_mutex); | |
739 | count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]); | |
740 | mutex_unlock(&smp_cpu_state_mutex); | |
741 | return count; | |
742 | } | |
743 | ||
4a0b2b4d AK |
744 | static ssize_t cpu_configure_store(struct sys_device *dev, |
745 | struct sysdev_attribute *attr, | |
746 | const char *buf, size_t count) | |
08d07968 HC |
747 | { |
748 | int cpu = dev->id; | |
749 | int val, rc; | |
750 | char delim; | |
751 | ||
752 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
753 | return -EINVAL; | |
754 | if (val != 0 && val != 1) | |
755 | return -EINVAL; | |
756 | ||
9d40d2e3 | 757 | get_online_cpus(); |
0b18d318 | 758 | mutex_lock(&smp_cpu_state_mutex); |
08d07968 HC |
759 | rc = -EBUSY; |
760 | if (cpu_online(cpu)) | |
761 | goto out; | |
762 | rc = 0; | |
763 | switch (val) { | |
764 | case 0: | |
765 | if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) { | |
766 | rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]); | |
c10fde0d | 767 | if (!rc) { |
08d07968 | 768 | smp_cpu_state[cpu] = CPU_STATE_STANDBY; |
c10fde0d HC |
769 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
770 | } | |
08d07968 HC |
771 | } |
772 | break; | |
773 | case 1: | |
774 | if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) { | |
775 | rc = sclp_cpu_configure(__cpu_logical_map[cpu]); | |
c10fde0d | 776 | if (!rc) { |
08d07968 | 777 | smp_cpu_state[cpu] = CPU_STATE_CONFIGURED; |
c10fde0d HC |
778 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
779 | } | |
08d07968 HC |
780 | } |
781 | break; | |
782 | default: | |
783 | break; | |
784 | } | |
785 | out: | |
08d07968 | 786 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 787 | put_online_cpus(); |
08d07968 HC |
788 | return rc ? rc : count; |
789 | } | |
790 | static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); | |
791 | #endif /* CONFIG_HOTPLUG_CPU */ | |
792 | ||
4a0b2b4d AK |
793 | static ssize_t cpu_polarization_show(struct sys_device *dev, |
794 | struct sysdev_attribute *attr, char *buf) | |
c10fde0d HC |
795 | { |
796 | int cpu = dev->id; | |
797 | ssize_t count; | |
798 | ||
799 | mutex_lock(&smp_cpu_state_mutex); | |
800 | switch (smp_cpu_polarization[cpu]) { | |
801 | case POLARIZATION_HRZ: | |
802 | count = sprintf(buf, "horizontal\n"); | |
803 | break; | |
804 | case POLARIZATION_VL: | |
805 | count = sprintf(buf, "vertical:low\n"); | |
806 | break; | |
807 | case POLARIZATION_VM: | |
808 | count = sprintf(buf, "vertical:medium\n"); | |
809 | break; | |
810 | case POLARIZATION_VH: | |
811 | count = sprintf(buf, "vertical:high\n"); | |
812 | break; | |
813 | default: | |
814 | count = sprintf(buf, "unknown\n"); | |
815 | break; | |
816 | } | |
817 | mutex_unlock(&smp_cpu_state_mutex); | |
818 | return count; | |
819 | } | |
820 | static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL); | |
821 | ||
4a0b2b4d AK |
822 | static ssize_t show_cpu_address(struct sys_device *dev, |
823 | struct sysdev_attribute *attr, char *buf) | |
08d07968 HC |
824 | { |
825 | return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]); | |
826 | } | |
827 | static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL); | |
828 | ||
829 | ||
830 | static struct attribute *cpu_common_attrs[] = { | |
831 | #ifdef CONFIG_HOTPLUG_CPU | |
832 | &attr_configure.attr, | |
833 | #endif | |
834 | &attr_address.attr, | |
c10fde0d | 835 | &attr_polarization.attr, |
08d07968 HC |
836 | NULL, |
837 | }; | |
838 | ||
839 | static struct attribute_group cpu_common_attr_group = { | |
840 | .attrs = cpu_common_attrs, | |
841 | }; | |
1da177e4 | 842 | |
4a0b2b4d AK |
843 | static ssize_t show_capability(struct sys_device *dev, |
844 | struct sysdev_attribute *attr, char *buf) | |
2fc2d1e9 HC |
845 | { |
846 | unsigned int capability; | |
847 | int rc; | |
848 | ||
849 | rc = get_cpu_capability(&capability); | |
850 | if (rc) | |
851 | return rc; | |
852 | return sprintf(buf, "%u\n", capability); | |
853 | } | |
854 | static SYSDEV_ATTR(capability, 0444, show_capability, NULL); | |
855 | ||
4a0b2b4d AK |
856 | static ssize_t show_idle_count(struct sys_device *dev, |
857 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
858 | { |
859 | struct s390_idle_data *idle; | |
860 | unsigned long long idle_count; | |
e98bbaaf | 861 | unsigned int sequence; |
fae8b22d HC |
862 | |
863 | idle = &per_cpu(s390_idle, dev->id); | |
e98bbaaf MS |
864 | repeat: |
865 | sequence = idle->sequence; | |
866 | smp_rmb(); | |
867 | if (sequence & 1) | |
868 | goto repeat; | |
fae8b22d | 869 | idle_count = idle->idle_count; |
6f430924 MS |
870 | if (idle->idle_enter) |
871 | idle_count++; | |
e98bbaaf MS |
872 | smp_rmb(); |
873 | if (idle->sequence != sequence) | |
874 | goto repeat; | |
fae8b22d HC |
875 | return sprintf(buf, "%llu\n", idle_count); |
876 | } | |
877 | static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL); | |
878 | ||
4a0b2b4d AK |
879 | static ssize_t show_idle_time(struct sys_device *dev, |
880 | struct sysdev_attribute *attr, char *buf) | |
fae8b22d HC |
881 | { |
882 | struct s390_idle_data *idle; | |
6f430924 | 883 | unsigned long long now, idle_time, idle_enter; |
e98bbaaf | 884 | unsigned int sequence; |
fae8b22d HC |
885 | |
886 | idle = &per_cpu(s390_idle, dev->id); | |
6f430924 | 887 | now = get_clock(); |
e98bbaaf MS |
888 | repeat: |
889 | sequence = idle->sequence; | |
890 | smp_rmb(); | |
891 | if (sequence & 1) | |
892 | goto repeat; | |
6f430924 MS |
893 | idle_time = idle->idle_time; |
894 | idle_enter = idle->idle_enter; | |
895 | if (idle_enter != 0ULL && idle_enter < now) | |
896 | idle_time += now - idle_enter; | |
e98bbaaf MS |
897 | smp_rmb(); |
898 | if (idle->sequence != sequence) | |
899 | goto repeat; | |
6f430924 | 900 | return sprintf(buf, "%llu\n", idle_time >> 12); |
fae8b22d | 901 | } |
69d39d66 | 902 | static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL); |
fae8b22d | 903 | |
08d07968 | 904 | static struct attribute *cpu_online_attrs[] = { |
fae8b22d HC |
905 | &attr_capability.attr, |
906 | &attr_idle_count.attr, | |
69d39d66 | 907 | &attr_idle_time_us.attr, |
fae8b22d HC |
908 | NULL, |
909 | }; | |
910 | ||
08d07968 HC |
911 | static struct attribute_group cpu_online_attr_group = { |
912 | .attrs = cpu_online_attrs, | |
fae8b22d HC |
913 | }; |
914 | ||
2fc2d1e9 HC |
915 | static int __cpuinit smp_cpu_notify(struct notifier_block *self, |
916 | unsigned long action, void *hcpu) | |
917 | { | |
918 | unsigned int cpu = (unsigned int)(long)hcpu; | |
919 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
920 | struct sys_device *s = &c->sysdev; | |
fae8b22d | 921 | struct s390_idle_data *idle; |
2fc2d1e9 HC |
922 | |
923 | switch (action) { | |
924 | case CPU_ONLINE: | |
8bb78442 | 925 | case CPU_ONLINE_FROZEN: |
fae8b22d | 926 | idle = &per_cpu(s390_idle, cpu); |
e98bbaaf | 927 | memset(idle, 0, sizeof(struct s390_idle_data)); |
08d07968 | 928 | if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) |
2fc2d1e9 HC |
929 | return NOTIFY_BAD; |
930 | break; | |
931 | case CPU_DEAD: | |
8bb78442 | 932 | case CPU_DEAD_FROZEN: |
08d07968 | 933 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); |
2fc2d1e9 HC |
934 | break; |
935 | } | |
936 | return NOTIFY_OK; | |
937 | } | |
938 | ||
939 | static struct notifier_block __cpuinitdata smp_cpu_nb = { | |
39ce010d | 940 | .notifier_call = smp_cpu_notify, |
2fc2d1e9 HC |
941 | }; |
942 | ||
2bc89b5e | 943 | static int __devinit smp_add_present_cpu(int cpu) |
08d07968 HC |
944 | { |
945 | struct cpu *c = &per_cpu(cpu_devices, cpu); | |
946 | struct sys_device *s = &c->sysdev; | |
947 | int rc; | |
948 | ||
949 | c->hotpluggable = 1; | |
950 | rc = register_cpu(c, cpu); | |
951 | if (rc) | |
952 | goto out; | |
953 | rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); | |
954 | if (rc) | |
955 | goto out_cpu; | |
956 | if (!cpu_online(cpu)) | |
957 | goto out; | |
958 | rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); | |
959 | if (!rc) | |
960 | return 0; | |
961 | sysfs_remove_group(&s->kobj, &cpu_common_attr_group); | |
962 | out_cpu: | |
963 | #ifdef CONFIG_HOTPLUG_CPU | |
964 | unregister_cpu(c); | |
965 | #endif | |
966 | out: | |
967 | return rc; | |
968 | } | |
969 | ||
970 | #ifdef CONFIG_HOTPLUG_CPU | |
1e489518 | 971 | |
67060d9c | 972 | int __ref smp_rescan_cpus(void) |
08d07968 HC |
973 | { |
974 | cpumask_t newcpus; | |
975 | int cpu; | |
976 | int rc; | |
977 | ||
9d40d2e3 | 978 | get_online_cpus(); |
0b18d318 | 979 | mutex_lock(&smp_cpu_state_mutex); |
08d07968 | 980 | newcpus = cpu_present_map; |
1e489518 | 981 | rc = __smp_rescan_cpus(); |
08d07968 HC |
982 | if (rc) |
983 | goto out; | |
984 | cpus_andnot(newcpus, cpu_present_map, newcpus); | |
985 | for_each_cpu_mask(cpu, newcpus) { | |
986 | rc = smp_add_present_cpu(cpu); | |
987 | if (rc) | |
988 | cpu_clear(cpu, cpu_present_map); | |
989 | } | |
990 | rc = 0; | |
991 | out: | |
08d07968 | 992 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 993 | put_online_cpus(); |
c10fde0d HC |
994 | if (!cpus_empty(newcpus)) |
995 | topology_schedule_update(); | |
1e489518 HC |
996 | return rc; |
997 | } | |
998 | ||
da5aae70 | 999 | static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf, |
1e489518 HC |
1000 | size_t count) |
1001 | { | |
1002 | int rc; | |
1003 | ||
1004 | rc = smp_rescan_cpus(); | |
08d07968 HC |
1005 | return rc ? rc : count; |
1006 | } | |
da5aae70 | 1007 | static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store); |
08d07968 HC |
1008 | #endif /* CONFIG_HOTPLUG_CPU */ |
1009 | ||
da5aae70 | 1010 | static ssize_t dispatching_show(struct sysdev_class *class, char *buf) |
c10fde0d HC |
1011 | { |
1012 | ssize_t count; | |
1013 | ||
1014 | mutex_lock(&smp_cpu_state_mutex); | |
1015 | count = sprintf(buf, "%d\n", cpu_management); | |
1016 | mutex_unlock(&smp_cpu_state_mutex); | |
1017 | return count; | |
1018 | } | |
1019 | ||
da5aae70 HC |
1020 | static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf, |
1021 | size_t count) | |
c10fde0d HC |
1022 | { |
1023 | int val, rc; | |
1024 | char delim; | |
1025 | ||
1026 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
1027 | return -EINVAL; | |
1028 | if (val != 0 && val != 1) | |
1029 | return -EINVAL; | |
1030 | rc = 0; | |
c10fde0d | 1031 | get_online_cpus(); |
0b18d318 | 1032 | mutex_lock(&smp_cpu_state_mutex); |
c10fde0d HC |
1033 | if (cpu_management == val) |
1034 | goto out; | |
1035 | rc = topology_set_cpu_management(val); | |
1036 | if (!rc) | |
1037 | cpu_management = val; | |
1038 | out: | |
c10fde0d | 1039 | mutex_unlock(&smp_cpu_state_mutex); |
0b18d318 | 1040 | put_online_cpus(); |
c10fde0d HC |
1041 | return rc ? rc : count; |
1042 | } | |
da5aae70 HC |
1043 | static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show, |
1044 | dispatching_store); | |
c10fde0d | 1045 | |
155af2f9 HJP |
1046 | /* |
1047 | * If the resume kernel runs on another cpu than the suspended kernel, | |
1048 | * we have to switch the cpu IDs in the logical map. | |
1049 | */ | |
1050 | void smp_switch_boot_cpu_in_resume(u32 resume_phys_cpu_id, | |
1051 | struct _lowcore *suspend_lowcore) | |
1052 | { | |
1053 | int cpu, suspend_cpu_id, resume_cpu_id; | |
1054 | u32 suspend_phys_cpu_id; | |
1055 | ||
1056 | suspend_phys_cpu_id = __cpu_logical_map[suspend_lowcore->cpu_nr]; | |
1057 | suspend_cpu_id = suspend_lowcore->cpu_nr; | |
1058 | ||
1059 | for_each_present_cpu(cpu) { | |
1060 | if (__cpu_logical_map[cpu] == resume_phys_cpu_id) { | |
1061 | resume_cpu_id = cpu; | |
1062 | goto found; | |
1063 | } | |
1064 | } | |
1065 | panic("Could not find resume cpu in logical map.\n"); | |
1066 | ||
1067 | found: | |
1068 | printk("Resume cpu ID: %i/%i\n", resume_phys_cpu_id, resume_cpu_id); | |
1069 | printk("Suspend cpu ID: %i/%i\n", suspend_phys_cpu_id, suspend_cpu_id); | |
1070 | ||
1071 | __cpu_logical_map[resume_cpu_id] = suspend_phys_cpu_id; | |
1072 | __cpu_logical_map[suspend_cpu_id] = resume_phys_cpu_id; | |
1073 | ||
1074 | lowcore_ptr[suspend_cpu_id]->cpu_addr = resume_phys_cpu_id; | |
1075 | } | |
1076 | ||
1077 | u32 smp_get_phys_cpu_id(void) | |
1078 | { | |
1079 | return __cpu_logical_map[smp_processor_id()]; | |
1080 | } | |
1081 | ||
1da177e4 LT |
1082 | static int __init topology_init(void) |
1083 | { | |
1084 | int cpu; | |
fae8b22d | 1085 | int rc; |
2fc2d1e9 HC |
1086 | |
1087 | register_cpu_notifier(&smp_cpu_nb); | |
1da177e4 | 1088 | |
08d07968 | 1089 | #ifdef CONFIG_HOTPLUG_CPU |
da5aae70 | 1090 | rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan); |
08d07968 HC |
1091 | if (rc) |
1092 | return rc; | |
1093 | #endif | |
da5aae70 | 1094 | rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching); |
c10fde0d HC |
1095 | if (rc) |
1096 | return rc; | |
08d07968 HC |
1097 | for_each_present_cpu(cpu) { |
1098 | rc = smp_add_present_cpu(cpu); | |
fae8b22d HC |
1099 | if (rc) |
1100 | return rc; | |
1da177e4 LT |
1101 | } |
1102 | return 0; | |
1103 | } | |
1da177e4 | 1104 | subsys_initcall(topology_init); |