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155af2f9 HJP |
1 | /* |
2 | * S390 64-bit swsusp implementation | |
3 | * | |
4 | * Copyright IBM Corp. 2009 | |
5 | * | |
6 | * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com> | |
7 | * Michael Holzheu <holzheu@linux.vnet.ibm.com> | |
8 | */ | |
9 | ||
10 | #include <asm/page.h> | |
11 | #include <asm/ptrace.h> | |
1aaf179d | 12 | #include <asm/thread_info.h> |
155af2f9 HJP |
13 | #include <asm/asm-offsets.h> |
14 | ||
15 | /* | |
16 | * Save register context in absolute 0 lowcore and call swsusp_save() to | |
17 | * create in-memory kernel image. The context is saved in the designated | |
18 | * "store status" memory locations (see POP). | |
19 | * We return from this function twice. The first time during the suspend to | |
20 | * disk process. The second time via the swsusp_arch_resume() function | |
21 | * (see below) in the resume process. | |
22 | * This function runs with disabled interrupts. | |
23 | */ | |
24 | .section .text | |
c48ff644 | 25 | .align 4 |
155af2f9 HJP |
26 | .globl swsusp_arch_suspend |
27 | swsusp_arch_suspend: | |
28 | stmg %r6,%r15,__SF_GPRS(%r15) | |
29 | lgr %r1,%r15 | |
30 | aghi %r15,-STACK_FRAME_OVERHEAD | |
31 | stg %r1,__SF_BACKCHAIN(%r15) | |
32 | ||
33 | /* Deactivate DAT */ | |
34 | stnsm __SF_EMPTY(%r15),0xfb | |
35 | ||
155af2f9 HJP |
36 | /* Store prefix register on stack */ |
37 | stpx __SF_EMPTY(%r15) | |
38 | ||
5f954c34 HC |
39 | /* Save prefix register contents for lowcore */ |
40 | llgf %r4,__SF_EMPTY(%r15) | |
155af2f9 HJP |
41 | |
42 | /* Get pointer to save area */ | |
5f954c34 | 43 | lghi %r1,0x1000 |
155af2f9 | 44 | |
1aaf179d | 45 | /* Save CPU address */ |
dd43bfca | 46 | stap __LC_CPU_ADDRESS(%r0) |
1aaf179d | 47 | |
155af2f9 HJP |
48 | /* Store registers */ |
49 | mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */ | |
50 | stfpc 0x31c(%r1) /* store fpu control */ | |
51 | std 0,0x200(%r1) /* store f0 */ | |
52 | std 1,0x208(%r1) /* store f1 */ | |
53 | std 2,0x210(%r1) /* store f2 */ | |
54 | std 3,0x218(%r1) /* store f3 */ | |
55 | std 4,0x220(%r1) /* store f4 */ | |
56 | std 5,0x228(%r1) /* store f5 */ | |
57 | std 6,0x230(%r1) /* store f6 */ | |
58 | std 7,0x238(%r1) /* store f7 */ | |
59 | std 8,0x240(%r1) /* store f8 */ | |
60 | std 9,0x248(%r1) /* store f9 */ | |
61 | std 10,0x250(%r1) /* store f10 */ | |
62 | std 11,0x258(%r1) /* store f11 */ | |
63 | std 12,0x260(%r1) /* store f12 */ | |
64 | std 13,0x268(%r1) /* store f13 */ | |
65 | std 14,0x270(%r1) /* store f14 */ | |
66 | std 15,0x278(%r1) /* store f15 */ | |
67 | stam %a0,%a15,0x340(%r1) /* store access registers */ | |
68 | stctg %c0,%c15,0x380(%r1) /* store control registers */ | |
69 | stmg %r0,%r15,0x280(%r1) /* store general registers */ | |
70 | ||
71 | stpt 0x328(%r1) /* store timer */ | |
623c08e4 | 72 | stck __SF_EMPTY(%r15) /* store clock */ |
155af2f9 HJP |
73 | stckc 0x330(%r1) /* store clock comparator */ |
74 | ||
623c08e4 MS |
75 | /* Update cputime accounting before going to sleep */ |
76 | lg %r0,__LC_LAST_UPDATE_TIMER | |
77 | slg %r0,0x328(%r1) | |
78 | alg %r0,__LC_SYSTEM_TIMER | |
79 | stg %r0,__LC_SYSTEM_TIMER | |
80 | mvc __LC_LAST_UPDATE_TIMER(8),0x328(%r1) | |
81 | lg %r0,__LC_LAST_UPDATE_CLOCK | |
82 | slg %r0,__SF_EMPTY(%r15) | |
83 | alg %r0,__LC_STEAL_TIMER | |
84 | stg %r0,__LC_STEAL_TIMER | |
85 | mvc __LC_LAST_UPDATE_CLOCK(8),__SF_EMPTY(%r15) | |
86 | ||
155af2f9 HJP |
87 | /* Activate DAT */ |
88 | stosm __SF_EMPTY(%r15),0x04 | |
89 | ||
90 | /* Set prefix page to zero */ | |
91 | xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15) | |
92 | spx __SF_EMPTY(%r15) | |
93 | ||
5f954c34 HC |
94 | lghi %r2,0 |
95 | lghi %r3,2*PAGE_SIZE | |
96 | lghi %r5,2*PAGE_SIZE | |
97 | 1: mvcle %r2,%r4,0 | |
98 | jo 1b | |
155af2f9 HJP |
99 | |
100 | /* Save image */ | |
101 | brasl %r14,swsusp_save | |
102 | ||
155af2f9 HJP |
103 | /* Restore prefix register and return */ |
104 | lghi %r1,0x1000 | |
105 | spx 0x318(%r1) | |
106 | lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) | |
107 | lghi %r2,0 | |
108 | br %r14 | |
109 | ||
110 | /* | |
111 | * Restore saved memory image to correct place and restore register context. | |
112 | * Then we return to the function that called swsusp_arch_suspend(). | |
113 | * swsusp_arch_resume() runs with disabled interrupts. | |
114 | */ | |
115 | .globl swsusp_arch_resume | |
116 | swsusp_arch_resume: | |
117 | stmg %r6,%r15,__SF_GPRS(%r15) | |
118 | lgr %r1,%r15 | |
119 | aghi %r15,-STACK_FRAME_OVERHEAD | |
120 | stg %r1,__SF_BACKCHAIN(%r15) | |
121 | ||
846955c8 HC |
122 | /* Make all free pages stable */ |
123 | lghi %r2,1 | |
124 | brasl %r14,arch_set_page_states | |
1aaf179d | 125 | |
155af2f9 HJP |
126 | /* Deactivate DAT */ |
127 | stnsm __SF_EMPTY(%r15),0xfb | |
128 | ||
155af2f9 HJP |
129 | /* Set prefix page to zero */ |
130 | xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15) | |
131 | spx __SF_EMPTY(%r15) | |
132 | ||
133 | /* Restore saved image */ | |
134 | larl %r1,restore_pblist | |
135 | lg %r1,0(%r1) | |
136 | ltgr %r1,%r1 | |
137 | jz 2f | |
138 | 0: | |
139 | lg %r2,8(%r1) | |
140 | lg %r4,0(%r1) | |
141 | lghi %r3,PAGE_SIZE | |
142 | lghi %r5,PAGE_SIZE | |
143 | 1: | |
144 | mvcle %r2,%r4,0 | |
145 | jo 1b | |
146 | lg %r1,16(%r1) | |
147 | ltgr %r1,%r1 | |
148 | jnz 0b | |
149 | 2: | |
150 | ptlb /* flush tlb */ | |
151 | ||
2583d1ef HC |
152 | /* Reset System */ |
153 | larl %r1,restart_entry | |
1aaf179d | 154 | larl %r2,.Lrestart_diag308_psw |
2583d1ef HC |
155 | og %r1,0(%r2) |
156 | stg %r1,0(%r0) | |
1aaf179d | 157 | larl %r1,.Lnew_pgm_check_psw |
2583d1ef HC |
158 | epsw %r2,%r3 |
159 | stm %r2,%r3,0(%r1) | |
160 | mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1) | |
161 | lghi %r0,0 | |
162 | diag %r0,%r0,0x308 | |
163 | restart_entry: | |
164 | lhi %r1,1 | |
165 | sigp %r1,%r0,0x12 | |
166 | sam64 | |
1aaf179d | 167 | larl %r1,.Lnew_pgm_check_psw |
2583d1ef HC |
168 | lpswe 0(%r1) |
169 | pgm_check_entry: | |
2583d1ef | 170 | |
1aaf179d MH |
171 | /* Switch to original suspend CPU */ |
172 | larl %r1,.Lresume_cpu /* Resume CPU address: r2 */ | |
173 | stap 0(%r1) | |
174 | llgh %r2,0(%r1) | |
dd43bfca | 175 | llgh %r1,__LC_CPU_ADDRESS(%r0) /* Suspend CPU address: r1 */ |
1aaf179d MH |
176 | cgr %r1,%r2 |
177 | je restore_registers /* r1 = r2 -> nothing to do */ | |
178 | larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */ | |
179 | mvc __LC_RESTART_PSW(16,%r0),0(%r4) | |
180 | 3: | |
181 | sigp %r9,%r1,__SIGP_INITIAL_CPU_RESET | |
182 | brc 8,4f /* accepted */ | |
183 | brc 2,3b /* busy, try again */ | |
184 | ||
185 | /* Suspend CPU not available -> panic */ | |
186 | larl %r15,init_thread_union | |
187 | ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) | |
188 | larl %r2,.Lpanic_string | |
189 | larl %r3,_sclp_print_early | |
190 | lghi %r1,0 | |
191 | sam31 | |
192 | sigp %r1,%r0,0x12 | |
193 | basr %r14,%r3 | |
194 | larl %r3,.Ldisabled_wait_31 | |
195 | lpsw 0(%r3) | |
196 | 4: | |
197 | /* Switch to suspend CPU */ | |
198 | sigp %r9,%r1,__SIGP_RESTART /* start suspend CPU */ | |
199 | brc 2,4b /* busy, try again */ | |
200 | 5: | |
201 | sigp %r9,%r2,__SIGP_STOP /* stop resume (current) CPU */ | |
f8501ba7 | 202 | brc 2,5b /* busy, try again */ |
1aaf179d MH |
203 | 6: j 6b |
204 | ||
205 | restart_suspend: | |
206 | larl %r1,.Lresume_cpu | |
207 | llgh %r2,0(%r1) | |
208 | 7: | |
209 | sigp %r9,%r2,__SIGP_SENSE /* Wait for resume CPU */ | |
210 | brc 2,7b /* busy, try again */ | |
211 | tmll %r9,0x40 /* Test if resume CPU is stopped */ | |
212 | jz 7b | |
213 | ||
214 | restore_registers: | |
155af2f9 | 215 | /* Restore registers */ |
623c08e4 | 216 | lghi %r13,0x1000 /* %r1 = pointer to save area */ |
155af2f9 | 217 | |
623c08e4 MS |
218 | /* Ignore time spent in suspended state. */ |
219 | llgf %r1,0x318(%r13) | |
220 | stck __LC_LAST_UPDATE_CLOCK(%r1) | |
155af2f9 HJP |
221 | spt 0x328(%r13) /* reprogram timer */ |
222 | //sckc 0x330(%r13) /* set clock comparator */ | |
223 | ||
224 | lctlg %c0,%c15,0x380(%r13) /* load control registers */ | |
225 | lam %a0,%a15,0x340(%r13) /* load access registers */ | |
226 | ||
227 | lfpc 0x31c(%r13) /* load fpu control */ | |
228 | ld 0,0x200(%r13) /* load f0 */ | |
229 | ld 1,0x208(%r13) /* load f1 */ | |
230 | ld 2,0x210(%r13) /* load f2 */ | |
231 | ld 3,0x218(%r13) /* load f3 */ | |
232 | ld 4,0x220(%r13) /* load f4 */ | |
233 | ld 5,0x228(%r13) /* load f5 */ | |
234 | ld 6,0x230(%r13) /* load f6 */ | |
235 | ld 7,0x238(%r13) /* load f7 */ | |
236 | ld 8,0x240(%r13) /* load f8 */ | |
237 | ld 9,0x248(%r13) /* load f9 */ | |
238 | ld 10,0x250(%r13) /* load f10 */ | |
239 | ld 11,0x258(%r13) /* load f11 */ | |
240 | ld 12,0x260(%r13) /* load f12 */ | |
241 | ld 13,0x268(%r13) /* load f13 */ | |
242 | ld 14,0x270(%r13) /* load f14 */ | |
243 | ld 15,0x278(%r13) /* load f15 */ | |
244 | ||
245 | /* Load old stack */ | |
246 | lg %r15,0x2f8(%r13) | |
247 | ||
155af2f9 HJP |
248 | /* Restore prefix register */ |
249 | spx 0x318(%r13) | |
250 | ||
155af2f9 HJP |
251 | /* Activate DAT */ |
252 | stosm __SF_EMPTY(%r15),0x04 | |
253 | ||
846955c8 HC |
254 | /* Make all free pages unstable */ |
255 | lghi %r2,0 | |
256 | brasl %r14,arch_set_page_states | |
257 | ||
155af2f9 HJP |
258 | /* Return 0 */ |
259 | lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) | |
260 | lghi %r2,0 | |
261 | br %r14 | |
2583d1ef HC |
262 | |
263 | .section .data.nosave,"aw",@progbits | |
264 | .align 8 | |
1aaf179d MH |
265 | .Ldisabled_wait_31: |
266 | .long 0x000a0000,0x00000000 | |
267 | .Lpanic_string: | |
268 | .asciz "Resume not possible because suspend CPU is no longer available" | |
269 | .align 8 | |
270 | .Lrestart_diag308_psw: | |
2583d1ef | 271 | .long 0x00080000,0x80000000 |
1aaf179d MH |
272 | .Lrestart_suspend_psw: |
273 | .quad 0x0000000180000000,restart_suspend | |
274 | .Lnew_pgm_check_psw: | |
2583d1ef | 275 | .quad 0,pgm_check_entry |
1aaf179d MH |
276 | .Lresume_cpu: |
277 | .byte 0,0 |