timekeeping: Move reset of cycle_last for tsc clocksource to tsc
[deliverable/linux.git] / arch / s390 / kernel / time.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
4 *
5 * S390 version
d2fec595 6 * Copyright IBM Corp. 1999, 2008
1da177e4
LT
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
10 *
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
13 */
14
feab6501
MS
15#define KMSG_COMPONENT "time"
16#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
17
1da177e4
LT
18#include <linux/errno.h>
19#include <linux/module.h>
20#include <linux/sched.h>
21#include <linux/kernel.h>
22#include <linux/param.h>
23#include <linux/string.h>
24#include <linux/mm.h>
25#include <linux/interrupt.h>
750887de
HC
26#include <linux/cpu.h>
27#include <linux/stop_machine.h>
1da177e4 28#include <linux/time.h>
3367b994 29#include <linux/sysdev.h>
1da177e4
LT
30#include <linux/delay.h>
31#include <linux/init.h>
32#include <linux/smp.h>
33#include <linux/types.h>
34#include <linux/profile.h>
35#include <linux/timex.h>
36#include <linux/notifier.h>
dc64bef5 37#include <linux/clocksource.h>
5a62b192 38#include <linux/clockchips.h>
1da177e4
LT
39#include <asm/uaccess.h>
40#include <asm/delay.h>
41#include <asm/s390_ext.h>
42#include <asm/div64.h>
b020632e 43#include <asm/vdso.h>
1da177e4 44#include <asm/irq.h>
5a489b98 45#include <asm/irq_regs.h>
1da177e4 46#include <asm/timer.h>
d54853ef 47#include <asm/etr.h>
a806170e 48#include <asm/cio.h>
1da177e4
LT
49
50/* change this if you have some constant time drift */
51#define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
52#define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
53
54/*
55 * Create a small time difference between the timer interrupts
56 * on the different cpus to avoid lock contention.
57 */
58#define CPU_DEVIATION (smp_processor_id() << 12)
59
60#define TICK_SIZE tick
61
b6112ccb
MS
62u64 sched_clock_base_cc = -1; /* Force to data section. */
63
5a62b192 64static DEFINE_PER_CPU(struct clock_event_device, comparators);
1da177e4 65
1da177e4
LT
66/*
67 * Scheduler clock - returns current time in nanosec units.
68 */
88dbd203 69unsigned long long notrace sched_clock(void)
1da177e4 70{
8107d829 71 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
1da177e4
LT
72}
73
32f65f27
JG
74/*
75 * Monotonic_clock - returns # of nanoseconds passed since time_init()
76 */
77unsigned long long monotonic_clock(void)
78{
79 return sched_clock();
80}
81EXPORT_SYMBOL(monotonic_clock);
82
1da177e4
LT
83void tod_to_timeval(__u64 todval, struct timespec *xtime)
84{
85 unsigned long long sec;
86
87 sec = todval >> 12;
88 do_div(sec, 1000000);
89 xtime->tv_sec = sec;
90 todval -= (sec * 1000000) << 12;
91 xtime->tv_nsec = ((todval * 1000) >> 12);
92}
93
5a62b192 94void clock_comparator_work(void)
1da177e4 95{
5a62b192 96 struct clock_event_device *cd;
1da177e4 97
5a62b192
HC
98 S390_lowcore.clock_comparator = -1ULL;
99 set_clock_comparator(S390_lowcore.clock_comparator);
100 cd = &__get_cpu_var(comparators);
101 cd->event_handler(cd);
1da177e4
LT
102}
103
1da177e4 104/*
5a62b192 105 * Fixup the clock comparator.
1da177e4 106 */
5a62b192 107static void fixup_clock_comparator(unsigned long long delta)
1da177e4 108{
5a62b192
HC
109 /* If nobody is waiting there's nothing to fix. */
110 if (S390_lowcore.clock_comparator == -1ULL)
1da177e4 111 return;
5a62b192
HC
112 S390_lowcore.clock_comparator += delta;
113 set_clock_comparator(S390_lowcore.clock_comparator);
1da177e4
LT
114}
115
5a62b192
HC
116static int s390_next_event(unsigned long delta,
117 struct clock_event_device *evt)
1da177e4 118{
5a62b192
HC
119 S390_lowcore.clock_comparator = get_clock() + delta;
120 set_clock_comparator(S390_lowcore.clock_comparator);
121 return 0;
1da177e4
LT
122}
123
5a62b192
HC
124static void s390_set_mode(enum clock_event_mode mode,
125 struct clock_event_device *evt)
1da177e4 126{
d54853ef
MS
127}
128
129/*
130 * Set up lowcore and control register of the current cpu to
131 * enable TOD clock and clock comparator interrupts.
1da177e4
LT
132 */
133void init_cpu_timer(void)
134{
5a62b192
HC
135 struct clock_event_device *cd;
136 int cpu;
137
138 S390_lowcore.clock_comparator = -1ULL;
139 set_clock_comparator(S390_lowcore.clock_comparator);
140
141 cpu = smp_processor_id();
142 cd = &per_cpu(comparators, cpu);
143 cd->name = "comparator";
144 cd->features = CLOCK_EVT_FEAT_ONESHOT;
145 cd->mult = 16777;
146 cd->shift = 12;
147 cd->min_delta_ns = 1;
148 cd->max_delta_ns = LONG_MAX;
149 cd->rating = 400;
320ab2b0 150 cd->cpumask = cpumask_of(cpu);
5a62b192
HC
151 cd->set_next_event = s390_next_event;
152 cd->set_mode = s390_set_mode;
153
154 clockevents_register_device(cd);
d54853ef
MS
155
156 /* Enable clock comparator timer interrupt. */
157 __ctl_set_bit(0,11);
158
d2fec595 159 /* Always allow the timing alert external interrupt. */
d54853ef
MS
160 __ctl_set_bit(0, 4);
161}
162
163static void clock_comparator_interrupt(__u16 code)
164{
d3d238c7
HC
165 if (S390_lowcore.clock_comparator == -1ULL)
166 set_clock_comparator(S390_lowcore.clock_comparator);
d54853ef
MS
167}
168
d2fec595
MS
169static void etr_timing_alert(struct etr_irq_parm *);
170static void stp_timing_alert(struct stp_irq_parm *);
171
172static void timing_alert_interrupt(__u16 code)
173{
174 if (S390_lowcore.ext_params & 0x00c40000)
175 etr_timing_alert((struct etr_irq_parm *)
176 &S390_lowcore.ext_params);
177 if (S390_lowcore.ext_params & 0x00038000)
178 stp_timing_alert((struct stp_irq_parm *)
179 &S390_lowcore.ext_params);
180}
181
d54853ef 182static void etr_reset(void);
d2fec595 183static void stp_reset(void);
d54853ef 184
b6112ccb 185unsigned long read_persistent_clock(void)
d54853ef 186{
b6112ccb 187 struct timespec ts;
d54853ef 188
b6112ccb
MS
189 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
190 return ts.tv_sec;
1da177e4
LT
191}
192
8e19608e 193static cycle_t read_tod_clock(struct clocksource *cs)
dc64bef5
MS
194{
195 return get_clock();
196}
197
198static struct clocksource clocksource_tod = {
199 .name = "tod",
d2cb0e6e 200 .rating = 400,
dc64bef5
MS
201 .read = read_tod_clock,
202 .mask = -1ULL,
203 .mult = 1000,
204 .shift = 12,
cc02d809 205 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
dc64bef5
MS
206};
207
208
b020632e
MS
209void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
210{
211 if (clock != &clocksource_tod)
212 return;
213
214 /* Make userspace gettimeofday spin until we're done. */
215 ++vdso_data->tb_update_count;
216 smp_wmb();
217 vdso_data->xtime_tod_stamp = clock->cycle_last;
218 vdso_data->xtime_clock_sec = xtime.tv_sec;
219 vdso_data->xtime_clock_nsec = xtime.tv_nsec;
220 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
221 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
222 smp_wmb();
223 ++vdso_data->tb_update_count;
224}
225
226extern struct timezone sys_tz;
227
228void update_vsyscall_tz(void)
229{
230 /* Make userspace gettimeofday spin until we're done. */
231 ++vdso_data->tb_update_count;
232 smp_wmb();
233 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
234 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
235 smp_wmb();
236 ++vdso_data->tb_update_count;
237}
238
1da177e4
LT
239/*
240 * Initialize the TOD clock and the CPU timer of
241 * the boot cpu.
242 */
243void __init time_init(void)
244{
ab96e798
MS
245 struct timespec ts;
246 unsigned long flags;
247 cycle_t now;
248
b6112ccb
MS
249 /* Reset time synchronization interfaces. */
250 etr_reset();
251 stp_reset();
1da177e4 252
1da177e4 253 /* request the clock comparator external interrupt */
d7d1104f 254 if (register_external_interrupt(0x1004, clock_comparator_interrupt))
1da177e4
LT
255 panic("Couldn't request external interrupt 0x1004");
256
d2fec595 257 /* request the timing alert external interrupt */
d7d1104f 258 if (register_external_interrupt(0x1406, timing_alert_interrupt))
d54853ef
MS
259 panic("Couldn't request external interrupt 0x1406");
260
ab96e798
MS
261 if (clocksource_register(&clocksource_tod) != 0)
262 panic("Could not register TOD clock source");
263
264 /*
265 * The TOD clock is an accurate clock. The xtime should be
266 * initialized in a way that the difference between TOD and
267 * xtime is reasonably small. Too bad that timekeeping_init
268 * sets xtime.tv_nsec to zero. In addition the clock source
269 * change from the jiffies clock source to the TOD clock
270 * source add another error of up to 1/HZ second. The same
271 * function sets wall_to_monotonic to a value that is too
272 * small for /proc/uptime to be accurate.
273 * Reset xtime and wall_to_monotonic to sane values.
274 */
275 write_seqlock_irqsave(&xtime_lock, flags);
276 now = get_clock();
277 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
278 clocksource_tod.cycle_last = now;
279 clocksource_tod.raw_time = xtime;
280 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
281 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
282 write_sequnlock_irqrestore(&xtime_lock, flags);
283
d54853ef
MS
284 /* Enable TOD clock interrupts on the boot cpu. */
285 init_cpu_timer();
ab96e798 286
c185b783 287 /* Enable cpu timer interrupts on the boot cpu. */
1da177e4 288 vtime_init();
d54853ef
MS
289}
290
d2fec595
MS
291/*
292 * The time is "clock". old is what we think the time is.
293 * Adjust the value by a multiple of jiffies and add the delta to ntp.
294 * "delay" is an approximation how long the synchronization took. If
295 * the time correction is positive, then "delay" is subtracted from
296 * the time difference and only the remaining part is passed to ntp.
297 */
298static unsigned long long adjust_time(unsigned long long old,
299 unsigned long long clock,
300 unsigned long long delay)
301{
302 unsigned long long delta, ticks;
303 struct timex adjust;
304
305 if (clock > old) {
306 /* It is later than we thought. */
307 delta = ticks = clock - old;
308 delta = ticks = (delta < delay) ? 0 : delta - delay;
309 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
310 adjust.offset = ticks * (1000000 / HZ);
311 } else {
312 /* It is earlier than we thought. */
313 delta = ticks = old - clock;
314 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
315 delta = -delta;
316 adjust.offset = -ticks * (1000000 / HZ);
317 }
8107d829 318 sched_clock_base_cc += delta;
d2fec595 319 if (adjust.offset != 0) {
feab6501
MS
320 pr_notice("The ETR interface has adjusted the clock "
321 "by %li microseconds\n", adjust.offset);
d2fec595
MS
322 adjust.modes = ADJ_OFFSET_SINGLESHOT;
323 do_adjtimex(&adjust);
324 }
325 return delta;
326}
327
328static DEFINE_PER_CPU(atomic_t, clock_sync_word);
8283cb43 329static DEFINE_MUTEX(clock_sync_mutex);
d2fec595
MS
330static unsigned long clock_sync_flags;
331
332#define CLOCK_SYNC_HAS_ETR 0
333#define CLOCK_SYNC_HAS_STP 1
334#define CLOCK_SYNC_ETR 2
335#define CLOCK_SYNC_STP 3
336
337/*
338 * The synchronous get_clock function. It will write the current clock
339 * value to the clock pointer and return 0 if the clock is in sync with
340 * the external time source. If the clock mode is local it will return
341 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
342 * reference.
343 */
344int get_sync_clock(unsigned long long *clock)
345{
346 atomic_t *sw_ptr;
347 unsigned int sw0, sw1;
348
349 sw_ptr = &get_cpu_var(clock_sync_word);
350 sw0 = atomic_read(sw_ptr);
351 *clock = get_clock();
352 sw1 = atomic_read(sw_ptr);
353 put_cpu_var(clock_sync_sync);
354 if (sw0 == sw1 && (sw0 & 0x80000000U))
355 /* Success: time is in sync. */
356 return 0;
357 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
358 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
359 return -ENOSYS;
360 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
361 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
362 return -EACCES;
363 return -EAGAIN;
364}
365EXPORT_SYMBOL(get_sync_clock);
366
367/*
368 * Make get_sync_clock return -EAGAIN.
369 */
370static void disable_sync_clock(void *dummy)
371{
372 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
373 /*
374 * Clear the in-sync bit 2^31. All get_sync_clock calls will
375 * fail until the sync bit is turned back on. In addition
376 * increase the "sequence" counter to avoid the race of an
377 * etr event and the complete recovery against get_sync_clock.
378 */
379 atomic_clear_mask(0x80000000, sw_ptr);
380 atomic_inc(sw_ptr);
381}
382
383/*
384 * Make get_sync_clock return 0 again.
385 * Needs to be called from a context disabled for preemption.
386 */
387static void enable_sync_clock(void)
388{
389 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
390 atomic_set_mask(0x80000000, sw_ptr);
391}
392
8283cb43
MS
393/*
394 * Function to check if the clock is in sync.
395 */
396static inline int check_sync_clock(void)
397{
398 atomic_t *sw_ptr;
399 int rc;
400
401 sw_ptr = &get_cpu_var(clock_sync_word);
402 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
403 put_cpu_var(clock_sync_sync);
404 return rc;
405}
406
750887de
HC
407/* Single threaded workqueue used for etr and stp sync events */
408static struct workqueue_struct *time_sync_wq;
409
410static void __init time_init_wq(void)
411{
179cb81a
HC
412 if (time_sync_wq)
413 return;
414 time_sync_wq = create_singlethread_workqueue("timesync");
415 stop_machine_create();
750887de
HC
416}
417
d54853ef
MS
418/*
419 * External Time Reference (ETR) code.
420 */
421static int etr_port0_online;
422static int etr_port1_online;
d2fec595 423static int etr_steai_available;
d54853ef
MS
424
425static int __init early_parse_etr(char *p)
426{
427 if (strncmp(p, "off", 3) == 0)
428 etr_port0_online = etr_port1_online = 0;
429 else if (strncmp(p, "port0", 5) == 0)
430 etr_port0_online = 1;
431 else if (strncmp(p, "port1", 5) == 0)
432 etr_port1_online = 1;
433 else if (strncmp(p, "on", 2) == 0)
434 etr_port0_online = etr_port1_online = 1;
435 return 0;
436}
437early_param("etr", early_parse_etr);
438
439enum etr_event {
440 ETR_EVENT_PORT0_CHANGE,
441 ETR_EVENT_PORT1_CHANGE,
442 ETR_EVENT_PORT_ALERT,
443 ETR_EVENT_SYNC_CHECK,
444 ETR_EVENT_SWITCH_LOCAL,
445 ETR_EVENT_UPDATE,
446};
447
d54853ef
MS
448/*
449 * Valid bit combinations of the eacr register are (x = don't care):
450 * e0 e1 dp p0 p1 ea es sl
451 * 0 0 x 0 0 0 0 0 initial, disabled state
452 * 0 0 x 0 1 1 0 0 port 1 online
453 * 0 0 x 1 0 1 0 0 port 0 online
454 * 0 0 x 1 1 1 0 0 both ports online
455 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
456 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
457 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
458 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
459 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
460 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
461 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
462 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
463 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
464 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
465 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
466 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
467 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
468 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
469 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
470 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
471 */
472static struct etr_eacr etr_eacr;
473static u64 etr_tolec; /* time of last eacr update */
d54853ef
MS
474static struct etr_aib etr_port0;
475static int etr_port0_uptodate;
476static struct etr_aib etr_port1;
477static int etr_port1_uptodate;
478static unsigned long etr_events;
479static struct timer_list etr_timer;
d54853ef
MS
480
481static void etr_timeout(unsigned long dummy);
ecdcc023 482static void etr_work_fn(struct work_struct *work);
0b3016b7 483static DEFINE_MUTEX(etr_work_mutex);
ecdcc023 484static DECLARE_WORK(etr_work, etr_work_fn);
d54853ef 485
d54853ef
MS
486/*
487 * Reset ETR attachment.
488 */
489static void etr_reset(void)
490{
491 etr_eacr = (struct etr_eacr) {
492 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
493 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
494 .es = 0, .sl = 0 };
d2fec595 495 if (etr_setr(&etr_eacr) == 0) {
d54853ef 496 etr_tolec = get_clock();
d2fec595 497 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
8283cb43
MS
498 if (etr_port0_online && etr_port1_online)
499 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
d2fec595 500 } else if (etr_port0_online || etr_port1_online) {
feab6501
MS
501 pr_warning("The real or virtual hardware system does "
502 "not provide an ETR interface\n");
d2fec595 503 etr_port0_online = etr_port1_online = 0;
d54853ef
MS
504 }
505}
506
ecdcc023 507static int __init etr_init(void)
d54853ef
MS
508{
509 struct etr_aib aib;
510
d2fec595 511 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
ecdcc023 512 return 0;
750887de 513 time_init_wq();
d54853ef
MS
514 /* Check if this machine has the steai instruction. */
515 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
d2fec595 516 etr_steai_available = 1;
d54853ef 517 setup_timer(&etr_timer, etr_timeout, 0UL);
d54853ef
MS
518 if (etr_port0_online) {
519 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
750887de 520 queue_work(time_sync_wq, &etr_work);
d54853ef
MS
521 }
522 if (etr_port1_online) {
523 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
750887de 524 queue_work(time_sync_wq, &etr_work);
d54853ef 525 }
ecdcc023 526 return 0;
d54853ef
MS
527}
528
ecdcc023
MS
529arch_initcall(etr_init);
530
d54853ef
MS
531/*
532 * Two sorts of ETR machine checks. The architecture reads:
533 * "When a machine-check niterruption occurs and if a switch-to-local or
534 * ETR-sync-check interrupt request is pending but disabled, this pending
535 * disabled interruption request is indicated and is cleared".
536 * Which means that we can get etr_switch_to_local events from the machine
537 * check handler although the interruption condition is disabled. Lovely..
538 */
539
540/*
541 * Switch to local machine check. This is called when the last usable
542 * ETR port goes inactive. After switch to local the clock is not in sync.
543 */
544void etr_switch_to_local(void)
545{
546 if (!etr_eacr.sl)
547 return;
8283cb43 548 disable_sync_clock(NULL);
d54853ef 549 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
750887de 550 queue_work(time_sync_wq, &etr_work);
d54853ef
MS
551}
552
553/*
554 * ETR sync check machine check. This is called when the ETR OTE and the
555 * local clock OTE are farther apart than the ETR sync check tolerance.
556 * After a ETR sync check the clock is not in sync. The machine check
557 * is broadcasted to all cpus at the same time.
558 */
559void etr_sync_check(void)
560{
561 if (!etr_eacr.es)
562 return;
8283cb43 563 disable_sync_clock(NULL);
d54853ef 564 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
750887de 565 queue_work(time_sync_wq, &etr_work);
d54853ef
MS
566}
567
568/*
d2fec595 569 * ETR timing alert. There are two causes:
d54853ef
MS
570 * 1) port state change, check the usability of the port
571 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
572 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
573 * or ETR-data word 4 (edf4) has changed.
574 */
d2fec595 575static void etr_timing_alert(struct etr_irq_parm *intparm)
d54853ef 576{
d54853ef
MS
577 if (intparm->pc0)
578 /* ETR port 0 state change. */
579 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
580 if (intparm->pc1)
581 /* ETR port 1 state change. */
582 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
583 if (intparm->eai)
584 /*
585 * ETR port alert on either port 0, 1 or both.
586 * Both ports are not up-to-date now.
587 */
588 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
750887de 589 queue_work(time_sync_wq, &etr_work);
d54853ef
MS
590}
591
592static void etr_timeout(unsigned long dummy)
593{
594 set_bit(ETR_EVENT_UPDATE, &etr_events);
750887de 595 queue_work(time_sync_wq, &etr_work);
d54853ef
MS
596}
597
598/*
599 * Check if the etr mode is pss.
600 */
601static inline int etr_mode_is_pps(struct etr_eacr eacr)
602{
603 return eacr.es && !eacr.sl;
604}
605
606/*
607 * Check if the etr mode is etr.
608 */
609static inline int etr_mode_is_etr(struct etr_eacr eacr)
610{
611 return eacr.es && eacr.sl;
612}
613
614/*
615 * Check if the port can be used for TOD synchronization.
616 * For PPS mode the port has to receive OTEs. For ETR mode
617 * the port has to receive OTEs, the ETR stepping bit has to
618 * be zero and the validity bits for data frame 1, 2, and 3
619 * have to be 1.
620 */
621static int etr_port_valid(struct etr_aib *aib, int port)
622{
623 unsigned int psc;
624
625 /* Check that this port is receiving OTEs. */
626 if (aib->tsp == 0)
627 return 0;
628
629 psc = port ? aib->esw.psc1 : aib->esw.psc0;
630 if (psc == etr_lpsc_pps_mode)
631 return 1;
632 if (psc == etr_lpsc_operational_step)
633 return !aib->esw.y && aib->slsw.v1 &&
634 aib->slsw.v2 && aib->slsw.v3;
635 return 0;
636}
637
638/*
639 * Check if two ports are on the same network.
640 */
641static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
642{
643 // FIXME: any other fields we have to compare?
644 return aib1->edf1.net_id == aib2->edf1.net_id;
645}
646
647/*
648 * Wrapper for etr_stei that converts physical port states
649 * to logical port states to be consistent with the output
650 * of stetr (see etr_psc vs. etr_lpsc).
651 */
652static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
653{
654 BUG_ON(etr_steai(aib, func) != 0);
655 /* Convert port state to logical port state. */
656 if (aib->esw.psc0 == 1)
657 aib->esw.psc0 = 2;
658 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
659 aib->esw.psc0 = 1;
660 if (aib->esw.psc1 == 1)
661 aib->esw.psc1 = 2;
662 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
663 aib->esw.psc1 = 1;
664}
665
666/*
667 * Check if the aib a2 is still connected to the same attachment as
668 * aib a1, the etv values differ by one and a2 is valid.
669 */
670static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
671{
672 int state_a1, state_a2;
673
674 /* Paranoia check: e0/e1 should better be the same. */
675 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
676 a1->esw.eacr.e1 != a2->esw.eacr.e1)
677 return 0;
678
679 /* Still connected to the same etr ? */
680 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
681 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
682 if (state_a1 == etr_lpsc_operational_step) {
683 if (state_a2 != etr_lpsc_operational_step ||
684 a1->edf1.net_id != a2->edf1.net_id ||
685 a1->edf1.etr_id != a2->edf1.etr_id ||
686 a1->edf1.etr_pn != a2->edf1.etr_pn)
687 return 0;
688 } else if (state_a2 != etr_lpsc_pps_mode)
689 return 0;
690
691 /* The ETV value of a2 needs to be ETV of a1 + 1. */
692 if (a1->edf2.etv + 1 != a2->edf2.etv)
693 return 0;
694
695 if (!etr_port_valid(a2, p))
696 return 0;
697
698 return 1;
699}
700
d2fec595 701struct clock_sync_data {
750887de 702 atomic_t cpus;
5a62b192
HC
703 int in_sync;
704 unsigned long long fixup_cc;
750887de
HC
705 int etr_port;
706 struct etr_aib *etr_aib;
d2fec595 707};
5a62b192 708
750887de 709static void clock_sync_cpu(struct clock_sync_data *sync)
d54853ef 710{
750887de 711 atomic_dec(&sync->cpus);
d2fec595 712 enable_sync_clock();
d54853ef
MS
713 /*
714 * This looks like a busy wait loop but it isn't. etr_sync_cpus
715 * is called on all other cpus while the TOD clocks is stopped.
716 * __udelay will stop the cpu on an enabled wait psw until the
717 * TOD is running again.
718 */
d2fec595 719 while (sync->in_sync == 0) {
d54853ef 720 __udelay(1);
6c732de2
HC
721 /*
722 * A different cpu changes *in_sync. Therefore use
723 * barrier() to force memory access.
724 */
725 barrier();
726 }
d2fec595 727 if (sync->in_sync != 1)
d54853ef 728 /* Didn't work. Clear per-cpu in sync bit again. */
d2fec595 729 disable_sync_clock(NULL);
d54853ef
MS
730 /*
731 * This round of TOD syncing is done. Set the clock comparator
732 * to the next tick and let the processor continue.
733 */
d2fec595 734 fixup_clock_comparator(sync->fixup_cc);
d54853ef
MS
735}
736
d54853ef
MS
737/*
738 * Sync the TOD clock using the port refered to by aibp. This port
739 * has to be enabled and the other port has to be disabled. The
740 * last eacr update has to be more than 1.6 seconds in the past.
741 */
750887de 742static int etr_sync_clock(void *data)
d54853ef 743{
750887de 744 static int first;
5a62b192 745 unsigned long long clock, old_clock, delay, delta;
750887de
HC
746 struct clock_sync_data *etr_sync;
747 struct etr_aib *sync_port, *aib;
748 int port;
d54853ef
MS
749 int rc;
750
750887de 751 etr_sync = data;
d54853ef 752
750887de
HC
753 if (xchg(&first, 1) == 1) {
754 /* Slave */
755 clock_sync_cpu(etr_sync);
756 return 0;
757 }
758
759 /* Wait until all other cpus entered the sync function. */
760 while (atomic_read(&etr_sync->cpus) != 0)
761 cpu_relax();
762
763 port = etr_sync->etr_port;
764 aib = etr_sync->etr_aib;
765 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
d2fec595 766 enable_sync_clock();
d54853ef
MS
767
768 /* Set clock to next OTE. */
769 __ctl_set_bit(14, 21);
770 __ctl_set_bit(0, 29);
771 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
5a62b192 772 old_clock = get_clock();
d54853ef
MS
773 if (set_clock(clock) == 0) {
774 __udelay(1); /* Wait for the clock to start. */
775 __ctl_clear_bit(0, 29);
776 __ctl_clear_bit(14, 21);
777 etr_stetr(aib);
778 /* Adjust Linux timing variables. */
779 delay = (unsigned long long)
780 (aib->edf2.etv - sync_port->edf2.etv) << 32;
d2fec595 781 delta = adjust_time(old_clock, clock, delay);
750887de 782 etr_sync->fixup_cc = delta;
5a62b192 783 fixup_clock_comparator(delta);
d54853ef
MS
784 /* Verify that the clock is properly set. */
785 if (!etr_aib_follows(sync_port, aib, port)) {
786 /* Didn't work. */
d2fec595 787 disable_sync_clock(NULL);
750887de 788 etr_sync->in_sync = -EAGAIN;
d54853ef
MS
789 rc = -EAGAIN;
790 } else {
750887de 791 etr_sync->in_sync = 1;
d54853ef
MS
792 rc = 0;
793 }
794 } else {
795 /* Could not set the clock ?!? */
796 __ctl_clear_bit(0, 29);
797 __ctl_clear_bit(14, 21);
d2fec595 798 disable_sync_clock(NULL);
750887de 799 etr_sync->in_sync = -EAGAIN;
d54853ef
MS
800 rc = -EAGAIN;
801 }
750887de
HC
802 xchg(&first, 0);
803 return rc;
804}
805
806static int etr_sync_clock_stop(struct etr_aib *aib, int port)
807{
808 struct clock_sync_data etr_sync;
809 struct etr_aib *sync_port;
810 int follows;
811 int rc;
812
813 /* Check if the current aib is adjacent to the sync port aib. */
814 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
815 follows = etr_aib_follows(sync_port, aib, port);
816 memcpy(sync_port, aib, sizeof(*aib));
817 if (!follows)
818 return -EAGAIN;
819 memset(&etr_sync, 0, sizeof(etr_sync));
820 etr_sync.etr_aib = aib;
821 etr_sync.etr_port = port;
822 get_online_cpus();
823 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
824 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
825 put_online_cpus();
d54853ef
MS
826 return rc;
827}
828
829/*
830 * Handle the immediate effects of the different events.
831 * The port change event is used for online/offline changes.
832 */
833static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
834{
835 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
836 eacr.es = 0;
837 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
838 eacr.es = eacr.sl = 0;
839 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
840 etr_port0_uptodate = etr_port1_uptodate = 0;
841
842 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
843 if (eacr.e0)
844 /*
845 * Port change of an enabled port. We have to
846 * assume that this can have caused an stepping
847 * port switch.
848 */
849 etr_tolec = get_clock();
850 eacr.p0 = etr_port0_online;
851 if (!eacr.p0)
852 eacr.e0 = 0;
853 etr_port0_uptodate = 0;
854 }
855 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
856 if (eacr.e1)
857 /*
858 * Port change of an enabled port. We have to
859 * assume that this can have caused an stepping
860 * port switch.
861 */
862 etr_tolec = get_clock();
863 eacr.p1 = etr_port1_online;
864 if (!eacr.p1)
865 eacr.e1 = 0;
866 etr_port1_uptodate = 0;
867 }
868 clear_bit(ETR_EVENT_UPDATE, &etr_events);
869 return eacr;
870}
871
872/*
873 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
874 * one of the ports needs an update.
875 */
876static void etr_set_tolec_timeout(unsigned long long now)
877{
878 unsigned long micros;
879
880 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
881 (!etr_eacr.p1 || etr_port1_uptodate))
882 return;
883 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
884 micros = (micros > 1600000) ? 0 : 1600000 - micros;
885 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
886}
887
888/*
889 * Set up a time that expires after 1/2 second.
890 */
891static void etr_set_sync_timeout(void)
892{
893 mod_timer(&etr_timer, jiffies + HZ/2);
894}
895
896/*
897 * Update the aib information for one or both ports.
898 */
899static struct etr_eacr etr_handle_update(struct etr_aib *aib,
900 struct etr_eacr eacr)
901{
902 /* With both ports disabled the aib information is useless. */
903 if (!eacr.e0 && !eacr.e1)
904 return eacr;
905
ecdcc023 906 /* Update port0 or port1 with aib stored in etr_work_fn. */
d54853ef
MS
907 if (aib->esw.q == 0) {
908 /* Information for port 0 stored. */
909 if (eacr.p0 && !etr_port0_uptodate) {
910 etr_port0 = *aib;
911 if (etr_port0_online)
912 etr_port0_uptodate = 1;
913 }
914 } else {
915 /* Information for port 1 stored. */
916 if (eacr.p1 && !etr_port1_uptodate) {
917 etr_port1 = *aib;
918 if (etr_port0_online)
919 etr_port1_uptodate = 1;
920 }
921 }
922
923 /*
924 * Do not try to get the alternate port aib if the clock
925 * is not in sync yet.
926 */
8283cb43 927 if (!check_sync_clock())
d54853ef
MS
928 return eacr;
929
930 /*
931 * If steai is available we can get the information about
932 * the other port immediately. If only stetr is available the
933 * data-port bit toggle has to be used.
934 */
d2fec595 935 if (etr_steai_available) {
d54853ef
MS
936 if (eacr.p0 && !etr_port0_uptodate) {
937 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
938 etr_port0_uptodate = 1;
939 }
940 if (eacr.p1 && !etr_port1_uptodate) {
941 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
942 etr_port1_uptodate = 1;
943 }
944 } else {
945 /*
946 * One port was updated above, if the other
947 * port is not uptodate toggle dp bit.
948 */
949 if ((eacr.p0 && !etr_port0_uptodate) ||
950 (eacr.p1 && !etr_port1_uptodate))
951 eacr.dp ^= 1;
952 else
953 eacr.dp = 0;
954 }
955 return eacr;
956}
957
958/*
959 * Write new etr control register if it differs from the current one.
960 * Return 1 if etr_tolec has been updated as well.
961 */
962static void etr_update_eacr(struct etr_eacr eacr)
963{
964 int dp_changed;
965
966 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
967 /* No change, return. */
968 return;
969 /*
970 * The disable of an active port of the change of the data port
971 * bit can/will cause a change in the data port.
972 */
973 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
974 (etr_eacr.dp ^ eacr.dp) != 0;
975 etr_eacr = eacr;
976 etr_setr(&etr_eacr);
977 if (dp_changed)
978 etr_tolec = get_clock();
979}
980
981/*
750887de 982 * ETR work. In this function you'll find the main logic. In
d54853ef
MS
983 * particular this is the only function that calls etr_update_eacr(),
984 * it "controls" the etr control register.
985 */
ecdcc023 986static void etr_work_fn(struct work_struct *work)
d54853ef
MS
987{
988 unsigned long long now;
989 struct etr_eacr eacr;
990 struct etr_aib aib;
991 int sync_port;
992
0b3016b7
MS
993 /* prevent multiple execution. */
994 mutex_lock(&etr_work_mutex);
995
d54853ef
MS
996 /* Create working copy of etr_eacr. */
997 eacr = etr_eacr;
998
999 /* Check for the different events and their immediate effects. */
1000 eacr = etr_handle_events(eacr);
1001
1002 /* Check if ETR is supposed to be active. */
1003 eacr.ea = eacr.p0 || eacr.p1;
1004 if (!eacr.ea) {
1005 /* Both ports offline. Reset everything. */
1006 eacr.dp = eacr.es = eacr.sl = 0;
1a781a77 1007 on_each_cpu(disable_sync_clock, NULL, 1);
d54853ef
MS
1008 del_timer_sync(&etr_timer);
1009 etr_update_eacr(eacr);
0b3016b7 1010 goto out_unlock;
d54853ef
MS
1011 }
1012
1013 /* Store aib to get the current ETR status word. */
1014 BUG_ON(etr_stetr(&aib) != 0);
1015 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1016 now = get_clock();
1017
1018 /*
1019 * Update the port information if the last stepping port change
1020 * or data port change is older than 1.6 seconds.
1021 */
1022 if (now >= etr_tolec + (1600000 << 12))
1023 eacr = etr_handle_update(&aib, eacr);
1024
1025 /*
1026 * Select ports to enable. The prefered synchronization mode is PPS.
1027 * If a port can be enabled depends on a number of things:
1028 * 1) The port needs to be online and uptodate. A port is not
1029 * disabled just because it is not uptodate, but it is only
1030 * enabled if it is uptodate.
1031 * 2) The port needs to have the same mode (pps / etr).
1032 * 3) The port needs to be usable -> etr_port_valid() == 1
1033 * 4) To enable the second port the clock needs to be in sync.
1034 * 5) If both ports are useable and are ETR ports, the network id
1035 * has to be the same.
1036 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1037 */
1038 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1039 eacr.sl = 0;
1040 eacr.e0 = 1;
1041 if (!etr_mode_is_pps(etr_eacr))
1042 eacr.es = 0;
1043 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1044 eacr.e1 = 0;
1045 // FIXME: uptodate checks ?
1046 else if (etr_port0_uptodate && etr_port1_uptodate)
1047 eacr.e1 = 1;
1048 sync_port = (etr_port0_uptodate &&
1049 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
d54853ef
MS
1050 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1051 eacr.sl = 0;
1052 eacr.e0 = 0;
1053 eacr.e1 = 1;
1054 if (!etr_mode_is_pps(etr_eacr))
1055 eacr.es = 0;
1056 sync_port = (etr_port1_uptodate &&
1057 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
d54853ef
MS
1058 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1059 eacr.sl = 1;
1060 eacr.e0 = 1;
1061 if (!etr_mode_is_etr(etr_eacr))
1062 eacr.es = 0;
1063 if (!eacr.es || !eacr.p1 ||
1064 aib.esw.psc1 != etr_lpsc_operational_alt)
1065 eacr.e1 = 0;
1066 else if (etr_port0_uptodate && etr_port1_uptodate &&
1067 etr_compare_network(&etr_port0, &etr_port1))
1068 eacr.e1 = 1;
1069 sync_port = (etr_port0_uptodate &&
1070 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
d54853ef
MS
1071 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1072 eacr.sl = 1;
1073 eacr.e0 = 0;
1074 eacr.e1 = 1;
1075 if (!etr_mode_is_etr(etr_eacr))
1076 eacr.es = 0;
1077 sync_port = (etr_port1_uptodate &&
1078 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
d54853ef
MS
1079 } else {
1080 /* Both ports not usable. */
1081 eacr.es = eacr.sl = 0;
1082 sync_port = -1;
d54853ef
MS
1083 }
1084
1085 /*
1086 * If the clock is in sync just update the eacr and return.
1087 * If there is no valid sync port wait for a port update.
1088 */
8283cb43 1089 if (check_sync_clock() || sync_port < 0) {
d54853ef
MS
1090 etr_update_eacr(eacr);
1091 etr_set_tolec_timeout(now);
0b3016b7 1092 goto out_unlock;
d54853ef
MS
1093 }
1094
1095 /*
1096 * Prepare control register for clock syncing
1097 * (reset data port bit, set sync check control.
1098 */
1099 eacr.dp = 0;
1100 eacr.es = 1;
1101
1102 /*
1103 * Update eacr and try to synchronize the clock. If the update
1104 * of eacr caused a stepping port switch (or if we have to
1105 * assume that a stepping port switch has occured) or the
1106 * clock syncing failed, reset the sync check control bit
1107 * and set up a timer to try again after 0.5 seconds
1108 */
1109 etr_update_eacr(eacr);
1110 if (now < etr_tolec + (1600000 << 12) ||
750887de 1111 etr_sync_clock_stop(&aib, sync_port) != 0) {
d54853ef
MS
1112 /* Sync failed. Try again in 1/2 second. */
1113 eacr.es = 0;
1114 etr_update_eacr(eacr);
1115 etr_set_sync_timeout();
1116 } else
1117 etr_set_tolec_timeout(now);
0b3016b7
MS
1118out_unlock:
1119 mutex_unlock(&etr_work_mutex);
d54853ef
MS
1120}
1121
1122/*
1123 * Sysfs interface functions
1124 */
1125static struct sysdev_class etr_sysclass = {
af5ca3f4 1126 .name = "etr",
d54853ef
MS
1127};
1128
1129static struct sys_device etr_port0_dev = {
1130 .id = 0,
1131 .cls = &etr_sysclass,
1132};
1133
1134static struct sys_device etr_port1_dev = {
1135 .id = 1,
1136 .cls = &etr_sysclass,
1137};
1138
1139/*
1140 * ETR class attributes
1141 */
1142static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1143{
1144 return sprintf(buf, "%i\n", etr_port0.esw.p);
1145}
1146
1147static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1148
1149static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1150{
1151 char *mode_str;
1152
1153 if (etr_mode_is_pps(etr_eacr))
1154 mode_str = "pps";
1155 else if (etr_mode_is_etr(etr_eacr))
1156 mode_str = "etr";
1157 else
1158 mode_str = "local";
1159 return sprintf(buf, "%s\n", mode_str);
1160}
1161
1162static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1163
1164/*
1165 * ETR port attributes
1166 */
1167static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1168{
1169 if (dev == &etr_port0_dev)
1170 return etr_port0_online ? &etr_port0 : NULL;
1171 else
1172 return etr_port1_online ? &etr_port1 : NULL;
1173}
1174
4a0b2b4d
AK
1175static ssize_t etr_online_show(struct sys_device *dev,
1176 struct sysdev_attribute *attr,
1177 char *buf)
d54853ef
MS
1178{
1179 unsigned int online;
1180
1181 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1182 return sprintf(buf, "%i\n", online);
1183}
1184
1185static ssize_t etr_online_store(struct sys_device *dev,
4a0b2b4d
AK
1186 struct sysdev_attribute *attr,
1187 const char *buf, size_t count)
d54853ef
MS
1188{
1189 unsigned int value;
1190
1191 value = simple_strtoul(buf, NULL, 0);
1192 if (value != 0 && value != 1)
1193 return -EINVAL;
d2fec595
MS
1194 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1195 return -EOPNOTSUPP;
8283cb43 1196 mutex_lock(&clock_sync_mutex);
d54853ef
MS
1197 if (dev == &etr_port0_dev) {
1198 if (etr_port0_online == value)
8283cb43 1199 goto out; /* Nothing to do. */
d54853ef 1200 etr_port0_online = value;
8283cb43
MS
1201 if (etr_port0_online && etr_port1_online)
1202 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1203 else
1204 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
d54853ef 1205 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
750887de 1206 queue_work(time_sync_wq, &etr_work);
d54853ef
MS
1207 } else {
1208 if (etr_port1_online == value)
8283cb43 1209 goto out; /* Nothing to do. */
d54853ef 1210 etr_port1_online = value;
8283cb43
MS
1211 if (etr_port0_online && etr_port1_online)
1212 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1213 else
1214 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
d54853ef 1215 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
750887de 1216 queue_work(time_sync_wq, &etr_work);
d54853ef 1217 }
8283cb43
MS
1218out:
1219 mutex_unlock(&clock_sync_mutex);
d54853ef
MS
1220 return count;
1221}
1222
1223static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1224
4a0b2b4d
AK
1225static ssize_t etr_stepping_control_show(struct sys_device *dev,
1226 struct sysdev_attribute *attr,
1227 char *buf)
d54853ef
MS
1228{
1229 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1230 etr_eacr.e0 : etr_eacr.e1);
1231}
1232
1233static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1234
4a0b2b4d
AK
1235static ssize_t etr_mode_code_show(struct sys_device *dev,
1236 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1237{
1238 if (!etr_port0_online && !etr_port1_online)
1239 /* Status word is not uptodate if both ports are offline. */
1240 return -ENODATA;
1241 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1242 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1243}
1244
1245static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1246
4a0b2b4d
AK
1247static ssize_t etr_untuned_show(struct sys_device *dev,
1248 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1249{
1250 struct etr_aib *aib = etr_aib_from_dev(dev);
1251
1252 if (!aib || !aib->slsw.v1)
1253 return -ENODATA;
1254 return sprintf(buf, "%i\n", aib->edf1.u);
1255}
1256
1257static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1258
4a0b2b4d
AK
1259static ssize_t etr_network_id_show(struct sys_device *dev,
1260 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1261{
1262 struct etr_aib *aib = etr_aib_from_dev(dev);
1263
1264 if (!aib || !aib->slsw.v1)
1265 return -ENODATA;
1266 return sprintf(buf, "%i\n", aib->edf1.net_id);
1267}
1268
1269static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1270
4a0b2b4d
AK
1271static ssize_t etr_id_show(struct sys_device *dev,
1272 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1273{
1274 struct etr_aib *aib = etr_aib_from_dev(dev);
1275
1276 if (!aib || !aib->slsw.v1)
1277 return -ENODATA;
1278 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1279}
1280
1281static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1282
4a0b2b4d
AK
1283static ssize_t etr_port_number_show(struct sys_device *dev,
1284 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1285{
1286 struct etr_aib *aib = etr_aib_from_dev(dev);
1287
1288 if (!aib || !aib->slsw.v1)
1289 return -ENODATA;
1290 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1291}
1292
1293static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1294
4a0b2b4d
AK
1295static ssize_t etr_coupled_show(struct sys_device *dev,
1296 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1297{
1298 struct etr_aib *aib = etr_aib_from_dev(dev);
1299
1300 if (!aib || !aib->slsw.v3)
1301 return -ENODATA;
1302 return sprintf(buf, "%i\n", aib->edf3.c);
1303}
1304
1305static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1306
4a0b2b4d
AK
1307static ssize_t etr_local_time_show(struct sys_device *dev,
1308 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1309{
1310 struct etr_aib *aib = etr_aib_from_dev(dev);
1311
1312 if (!aib || !aib->slsw.v3)
1313 return -ENODATA;
1314 return sprintf(buf, "%i\n", aib->edf3.blto);
1315}
1316
1317static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1318
4a0b2b4d
AK
1319static ssize_t etr_utc_offset_show(struct sys_device *dev,
1320 struct sysdev_attribute *attr, char *buf)
d54853ef
MS
1321{
1322 struct etr_aib *aib = etr_aib_from_dev(dev);
1323
1324 if (!aib || !aib->slsw.v3)
1325 return -ENODATA;
1326 return sprintf(buf, "%i\n", aib->edf3.buo);
1327}
1328
1329static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1330
1331static struct sysdev_attribute *etr_port_attributes[] = {
1332 &attr_online,
1333 &attr_stepping_control,
1334 &attr_state_code,
1335 &attr_untuned,
1336 &attr_network,
1337 &attr_id,
1338 &attr_port,
1339 &attr_coupled,
1340 &attr_local_time,
1341 &attr_utc_offset,
1342 NULL
1343};
1344
1345static int __init etr_register_port(struct sys_device *dev)
1346{
1347 struct sysdev_attribute **attr;
1348 int rc;
1349
1350 rc = sysdev_register(dev);
1351 if (rc)
1352 goto out;
1353 for (attr = etr_port_attributes; *attr; attr++) {
1354 rc = sysdev_create_file(dev, *attr);
1355 if (rc)
1356 goto out_unreg;
1357 }
1358 return 0;
1359out_unreg:
1360 for (; attr >= etr_port_attributes; attr--)
1361 sysdev_remove_file(dev, *attr);
1362 sysdev_unregister(dev);
1363out:
1364 return rc;
1365}
1366
1367static void __init etr_unregister_port(struct sys_device *dev)
1368{
1369 struct sysdev_attribute **attr;
1370
1371 for (attr = etr_port_attributes; *attr; attr++)
1372 sysdev_remove_file(dev, *attr);
1373 sysdev_unregister(dev);
1374}
1375
1376static int __init etr_init_sysfs(void)
1377{
1378 int rc;
1379
1380 rc = sysdev_class_register(&etr_sysclass);
1381 if (rc)
1382 goto out;
1383 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1384 if (rc)
1385 goto out_unreg_class;
1386 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1387 if (rc)
1388 goto out_remove_stepping_port;
1389 rc = etr_register_port(&etr_port0_dev);
1390 if (rc)
1391 goto out_remove_stepping_mode;
1392 rc = etr_register_port(&etr_port1_dev);
1393 if (rc)
1394 goto out_remove_port0;
1395 return 0;
1396
1397out_remove_port0:
1398 etr_unregister_port(&etr_port0_dev);
1399out_remove_stepping_mode:
1400 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1401out_remove_stepping_port:
1402 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1403out_unreg_class:
1404 sysdev_class_unregister(&etr_sysclass);
1405out:
1406 return rc;
1da177e4
LT
1407}
1408
d54853ef 1409device_initcall(etr_init_sysfs);
d2fec595
MS
1410
1411/*
1412 * Server Time Protocol (STP) code.
1413 */
1414static int stp_online;
1415static struct stp_sstpi stp_info;
1416static void *stp_page;
1417
1418static void stp_work_fn(struct work_struct *work);
0b3016b7 1419static DEFINE_MUTEX(stp_work_mutex);
d2fec595 1420static DECLARE_WORK(stp_work, stp_work_fn);
04362301 1421static struct timer_list stp_timer;
d2fec595
MS
1422
1423static int __init early_parse_stp(char *p)
1424{
1425 if (strncmp(p, "off", 3) == 0)
1426 stp_online = 0;
1427 else if (strncmp(p, "on", 2) == 0)
1428 stp_online = 1;
1429 return 0;
1430}
1431early_param("stp", early_parse_stp);
1432
1433/*
1434 * Reset STP attachment.
1435 */
8f847003 1436static void __init stp_reset(void)
d2fec595
MS
1437{
1438 int rc;
1439
d7d1104f 1440 stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
d2fec595 1441 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
4a672cfa 1442 if (rc == 0)
d2fec595
MS
1443 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1444 else if (stp_online) {
feab6501
MS
1445 pr_warning("The real or virtual hardware system does "
1446 "not provide an STP interface\n");
d7d1104f 1447 free_page((unsigned long) stp_page);
d2fec595
MS
1448 stp_page = NULL;
1449 stp_online = 0;
1450 }
1451}
1452
04362301
MS
1453static void stp_timeout(unsigned long dummy)
1454{
1455 queue_work(time_sync_wq, &stp_work);
1456}
1457
d2fec595
MS
1458static int __init stp_init(void)
1459{
750887de
HC
1460 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1461 return 0;
04362301 1462 setup_timer(&stp_timer, stp_timeout, 0UL);
750887de
HC
1463 time_init_wq();
1464 if (!stp_online)
1465 return 0;
1466 queue_work(time_sync_wq, &stp_work);
d2fec595
MS
1467 return 0;
1468}
1469
1470arch_initcall(stp_init);
1471
1472/*
1473 * STP timing alert. There are three causes:
1474 * 1) timing status change
1475 * 2) link availability change
1476 * 3) time control parameter change
1477 * In all three cases we are only interested in the clock source state.
1478 * If a STP clock source is now available use it.
1479 */
1480static void stp_timing_alert(struct stp_irq_parm *intparm)
1481{
1482 if (intparm->tsc || intparm->lac || intparm->tcpc)
750887de 1483 queue_work(time_sync_wq, &stp_work);
d2fec595
MS
1484}
1485
1486/*
1487 * STP sync check machine check. This is called when the timing state
1488 * changes from the synchronized state to the unsynchronized state.
1489 * After a STP sync check the clock is not in sync. The machine check
1490 * is broadcasted to all cpus at the same time.
1491 */
1492void stp_sync_check(void)
1493{
d2fec595 1494 disable_sync_clock(NULL);
750887de 1495 queue_work(time_sync_wq, &stp_work);
d2fec595
MS
1496}
1497
1498/*
1499 * STP island condition machine check. This is called when an attached
1500 * server attempts to communicate over an STP link and the servers
1501 * have matching CTN ids and have a valid stratum-1 configuration
1502 * but the configurations do not match.
1503 */
1504void stp_island_check(void)
1505{
d2fec595 1506 disable_sync_clock(NULL);
750887de 1507 queue_work(time_sync_wq, &stp_work);
d2fec595
MS
1508}
1509
750887de
HC
1510
1511static int stp_sync_clock(void *data)
d2fec595 1512{
750887de 1513 static int first;
d2fec595 1514 unsigned long long old_clock, delta;
750887de 1515 struct clock_sync_data *stp_sync;
d2fec595
MS
1516 int rc;
1517
750887de 1518 stp_sync = data;
d2fec595 1519
750887de
HC
1520 if (xchg(&first, 1) == 1) {
1521 /* Slave */
1522 clock_sync_cpu(stp_sync);
1523 return 0;
1524 }
d2fec595 1525
750887de
HC
1526 /* Wait until all other cpus entered the sync function. */
1527 while (atomic_read(&stp_sync->cpus) != 0)
1528 cpu_relax();
d2fec595 1529
d2fec595
MS
1530 enable_sync_clock();
1531
d2fec595
MS
1532 rc = 0;
1533 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1534 stp_info.todoff[2] || stp_info.todoff[3] ||
1535 stp_info.tmd != 2) {
1536 old_clock = get_clock();
1537 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1538 if (rc == 0) {
1539 delta = adjust_time(old_clock, get_clock(), 0);
1540 fixup_clock_comparator(delta);
1541 rc = chsc_sstpi(stp_page, &stp_info,
1542 sizeof(struct stp_sstpi));
1543 if (rc == 0 && stp_info.tmd != 2)
1544 rc = -EAGAIN;
1545 }
1546 }
1547 if (rc) {
1548 disable_sync_clock(NULL);
750887de 1549 stp_sync->in_sync = -EAGAIN;
d2fec595 1550 } else
750887de
HC
1551 stp_sync->in_sync = 1;
1552 xchg(&first, 0);
1553 return 0;
1554}
d2fec595 1555
750887de
HC
1556/*
1557 * STP work. Check for the STP state and take over the clock
1558 * synchronization if the STP clock source is usable.
1559 */
1560static void stp_work_fn(struct work_struct *work)
1561{
1562 struct clock_sync_data stp_sync;
1563 int rc;
1564
0b3016b7
MS
1565 /* prevent multiple execution. */
1566 mutex_lock(&stp_work_mutex);
1567
750887de
HC
1568 if (!stp_online) {
1569 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
04362301 1570 del_timer_sync(&stp_timer);
0b3016b7 1571 goto out_unlock;
750887de
HC
1572 }
1573
1574 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1575 if (rc)
0b3016b7 1576 goto out_unlock;
750887de
HC
1577
1578 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1579 if (rc || stp_info.c == 0)
0b3016b7 1580 goto out_unlock;
750887de 1581
8283cb43
MS
1582 /* Skip synchronization if the clock is already in sync. */
1583 if (check_sync_clock())
1584 goto out_unlock;
1585
750887de
HC
1586 memset(&stp_sync, 0, sizeof(stp_sync));
1587 get_online_cpus();
1588 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1589 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1590 put_online_cpus();
0b3016b7 1591
04362301
MS
1592 if (!check_sync_clock())
1593 /*
1594 * There is a usable clock but the synchonization failed.
1595 * Retry after a second.
1596 */
1597 mod_timer(&stp_timer, jiffies + HZ);
1598
0b3016b7
MS
1599out_unlock:
1600 mutex_unlock(&stp_work_mutex);
d2fec595
MS
1601}
1602
1603/*
1604 * STP class sysfs interface functions
1605 */
1606static struct sysdev_class stp_sysclass = {
1607 .name = "stp",
1608};
1609
1610static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1611{
1612 if (!stp_online)
1613 return -ENODATA;
1614 return sprintf(buf, "%016llx\n",
1615 *(unsigned long long *) stp_info.ctnid);
1616}
1617
1618static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1619
1620static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1621{
1622 if (!stp_online)
1623 return -ENODATA;
1624 return sprintf(buf, "%i\n", stp_info.ctn);
1625}
1626
1627static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1628
1629static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1630{
1631 if (!stp_online || !(stp_info.vbits & 0x2000))
1632 return -ENODATA;
1633 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1634}
1635
1636static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1637
1638static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1639{
1640 if (!stp_online || !(stp_info.vbits & 0x8000))
1641 return -ENODATA;
1642 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1643}
1644
1645static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1646
1647static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1648{
1649 if (!stp_online)
1650 return -ENODATA;
1651 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1652}
1653
1654static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1655
1656static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1657{
1658 if (!stp_online || !(stp_info.vbits & 0x0800))
1659 return -ENODATA;
1660 return sprintf(buf, "%i\n", (int) stp_info.tto);
1661}
1662
1663static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1664
1665static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1666{
1667 if (!stp_online || !(stp_info.vbits & 0x4000))
1668 return -ENODATA;
1669 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1670}
1671
1672static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1673 stp_time_zone_offset_show, NULL);
1674
1675static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1676{
1677 if (!stp_online)
1678 return -ENODATA;
1679 return sprintf(buf, "%i\n", stp_info.tmd);
1680}
1681
1682static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1683
1684static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1685{
1686 if (!stp_online)
1687 return -ENODATA;
1688 return sprintf(buf, "%i\n", stp_info.tst);
1689}
1690
1691static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1692
1693static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1694{
1695 return sprintf(buf, "%i\n", stp_online);
1696}
1697
1698static ssize_t stp_online_store(struct sysdev_class *class,
1699 const char *buf, size_t count)
1700{
1701 unsigned int value;
1702
1703 value = simple_strtoul(buf, NULL, 0);
1704 if (value != 0 && value != 1)
1705 return -EINVAL;
1706 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1707 return -EOPNOTSUPP;
8283cb43 1708 mutex_lock(&clock_sync_mutex);
d2fec595 1709 stp_online = value;
8283cb43
MS
1710 if (stp_online)
1711 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1712 else
1713 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
750887de 1714 queue_work(time_sync_wq, &stp_work);
8283cb43 1715 mutex_unlock(&clock_sync_mutex);
d2fec595
MS
1716 return count;
1717}
1718
1719/*
1720 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1721 * stp/online but attr_online already exists in this file ..
1722 */
1723static struct sysdev_class_attribute attr_stp_online = {
1724 .attr = { .name = "online", .mode = 0600 },
1725 .show = stp_online_show,
1726 .store = stp_online_store,
1727};
1728
1729static struct sysdev_class_attribute *stp_attributes[] = {
1730 &attr_ctn_id,
1731 &attr_ctn_type,
1732 &attr_dst_offset,
1733 &attr_leap_seconds,
1734 &attr_stp_online,
1735 &attr_stratum,
1736 &attr_time_offset,
1737 &attr_time_zone_offset,
1738 &attr_timing_mode,
1739 &attr_timing_state,
1740 NULL
1741};
1742
1743static int __init stp_init_sysfs(void)
1744{
1745 struct sysdev_class_attribute **attr;
1746 int rc;
1747
1748 rc = sysdev_class_register(&stp_sysclass);
1749 if (rc)
1750 goto out;
1751 for (attr = stp_attributes; *attr; attr++) {
1752 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1753 if (rc)
1754 goto out_unreg;
1755 }
1756 return 0;
1757out_unreg:
1758 for (; attr >= stp_attributes; attr--)
1759 sysdev_class_remove_file(&stp_sysclass, *attr);
1760 sysdev_class_unregister(&stp_sysclass);
1761out:
1762 return rc;
1763}
1764
1765device_initcall(stp_init_sysfs);
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