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KVM: s390: Add MEMOP ioctls for reading/writing guest memory
[deliverable/linux.git] / arch / s390 / kvm / priv.c
CommitLineData
453423dc 1/*
a53c8fab 2 * handling privileged instructions
453423dc 3 *
69d0d3a3 4 * Copyright IBM Corp. 2008, 2013
453423dc
CB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Carsten Otte <cotte@de.ibm.com>
11 * Christian Borntraeger <borntraeger@de.ibm.com>
12 */
13
14#include <linux/kvm.h>
5a0e3ad6 15#include <linux/gfp.h>
453423dc 16#include <linux/errno.h>
b13b5dc7 17#include <linux/compat.h>
7c959e82 18#include <asm/asm-offsets.h>
e769ece3 19#include <asm/facility.h>
453423dc
CB		 20#include <asm/current.h>
21#include <asm/debug.h>
22#include <asm/ebcdic.h>
23#include <asm/sysinfo.h>
69d0d3a3
CB		 24#include <asm/pgtable.h>
25#include <asm/pgalloc.h>
26#include <asm/io.h>
48a3e950
CH		 27#include <asm/ptrace.h>
28#include <asm/compat.h>
453423dc
CB		 29#include "gaccess.h"
30#include "kvm-s390.h"
5786fffa 31#include "trace.h"
453423dc 32
6a3f95a6
TH		 33/* Handle SCK (SET CLOCK) interception */
34static int handle_set_clock(struct kvm_vcpu *vcpu)
35{
36 struct kvm_vcpu *cpup;
37 s64 hostclk, val;
0e7a3f94 38 int i, rc;
8ae04b8f 39 ar_t ar;
6a3f95a6 40 u64 op2;
6a3f95a6
TH		 41
42 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
43 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
44
8ae04b8f 45 op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
6a3f95a6
TH		 46 if (op2 & 7) /* Operand must be on a doubleword boundary */
47 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 48 rc = read_guest(vcpu, op2, ar, &val, sizeof(val));
0e7a3f94
HC		 49 if (rc)
50 return kvm_s390_inject_prog_cond(vcpu, rc);
6a3f95a6
TH		 51
52 if (store_tod_clock(&hostclk)) {
53 kvm_s390_set_psw_cc(vcpu, 3);
54 return 0;
55 }
56 val = (val - hostclk) & ~0x3fUL;
57
58 mutex_lock(&vcpu->kvm->lock);
59 kvm_for_each_vcpu(i, cpup, vcpu->kvm)
60 cpup->arch.sie_block->epoch = val;
61 mutex_unlock(&vcpu->kvm->lock);
62
63 kvm_s390_set_psw_cc(vcpu, 0);
64 return 0;
65}
66
453423dc
CB		 67static int handle_set_prefix(struct kvm_vcpu *vcpu)
68{
453423dc 69 u64 operand2;
665170cb
HC		 70 u32 address;
71 int rc;
8ae04b8f 72 ar_t ar;
453423dc
CB		 73
74 vcpu->stat.instruction_spx++;
75
5087dfa6
TH		 76 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
77 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
78
8ae04b8f 79 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 80
81 /* must be word boundary */
db4a29cb
HC		 82 if (operand2 & 3)
83 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc
CB		 84
85 /* get the value */
8ae04b8f 86 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
665170cb
HC		 87 if (rc)
88 return kvm_s390_inject_prog_cond(vcpu, rc);
89
90 address &= 0x7fffe000u;
91
92 /*
93 * Make sure the new value is valid memory. We only need to check the
94 * first page, since address is 8k aligned and memory pieces are always
95 * at least 1MB aligned and have at least a size of 1MB.
96 */
97 if (kvm_is_error_gpa(vcpu->kvm, address))
db4a29cb 98 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
453423dc 99
8d26cf7b 100 kvm_s390_set_prefix(vcpu, address);
453423dc
CB		 101
102 VCPU_EVENT(vcpu, 5, "setting prefix to %x", address);
5786fffa 103 trace_kvm_s390_handle_prefix(vcpu, 1, address);
453423dc
CB		 104 return 0;
105}
106
107static int handle_store_prefix(struct kvm_vcpu *vcpu)
108{
453423dc
CB		 109 u64 operand2;
110 u32 address;
f748f4a7 111 int rc;
8ae04b8f 112 ar_t ar;
453423dc
CB		 113
114 vcpu->stat.instruction_stpx++;
b1c571a5 115
5087dfa6
TH		 116 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
117 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
118
8ae04b8f 119 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 120
121 /* must be word boundary */
db4a29cb
HC		 122 if (operand2 & 3)
123 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 124
fda902cb 125 address = kvm_s390_get_prefix(vcpu);
453423dc
CB		 126
127 /* get the value */
8ae04b8f 128 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
f748f4a7
HC		 129 if (rc)
130 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc
CB		 131
132 VCPU_EVENT(vcpu, 5, "storing prefix to %x", address);
5786fffa 133 trace_kvm_s390_handle_prefix(vcpu, 0, address);
453423dc
CB		 134 return 0;
135}
136
137static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
138{
8b96de0e
HC		 139 u16 vcpu_id = vcpu->vcpu_id;
140 u64 ga;
141 int rc;
8ae04b8f 142 ar_t ar;
453423dc
CB		 143
144 vcpu->stat.instruction_stap++;
b1c571a5 145
5087dfa6
TH		 146 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
147 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
148
8ae04b8f 149 ga = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 150
8b96de0e 151 if (ga & 1)
db4a29cb 152 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 153
8ae04b8f 154 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
8b96de0e
HC		 155 if (rc)
156 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 157
8b96de0e
HC		 158 VCPU_EVENT(vcpu, 5, "storing cpu address to %llx", ga);
159 trace_kvm_s390_handle_stap(vcpu, ga);
453423dc
CB		 160 return 0;
161}
162
3ac8e380 163static int __skey_check_enable(struct kvm_vcpu *vcpu)
693ffc08 164{
3ac8e380 165 int rc = 0;
693ffc08 166 if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)))
3ac8e380 167 return rc;
693ffc08 168
3ac8e380 169 rc = s390_enable_skey();
693ffc08
DD		 170 trace_kvm_s390_skey_related_inst(vcpu);
171 vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE);
3ac8e380 172 return rc;
693ffc08
DD		 173}
174
175
453423dc
CB		 176static int handle_skey(struct kvm_vcpu *vcpu)
177{
3ac8e380 178 int rc = __skey_check_enable(vcpu);
693ffc08 179
3ac8e380
DD		 180 if (rc)
181 return rc;
453423dc 182 vcpu->stat.instruction_storage_key++;
5087dfa6
TH		 183
184 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
185 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
186
04b41acd 187 kvm_s390_rewind_psw(vcpu, 4);
453423dc
CB		 188 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
189 return 0;
190}
191
8a242234
HC		 192static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
193{
8a242234 194 vcpu->stat.instruction_ipte_interlock++;
04b41acd 195 if (psw_bits(vcpu->arch.sie_block->gpsw).p)
8a242234
HC		 196 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
197 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
04b41acd 198 kvm_s390_rewind_psw(vcpu, 4);
8a242234
HC		 199 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
200 return 0;
201}
202
aca84241
TH		 203static int handle_test_block(struct kvm_vcpu *vcpu)
204{
aca84241
TH		 205 gpa_t addr;
206 int reg2;
207
208 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
209 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
210
211 kvm_s390_get_regs_rre(vcpu, NULL, &reg2);
212 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
e45efa28 213 addr = kvm_s390_logical_to_effective(vcpu, addr);
dd9e5b7b 214 if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
e45efa28 215 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
aca84241
TH		 216 addr = kvm_s390_real_to_abs(vcpu, addr);
217
ef23e779 218 if (kvm_is_error_gpa(vcpu->kvm, addr))
aca84241
TH		 219 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
220 /*
221 * We don't expect errors on modern systems, and do not care
222 * about storage keys (yet), so let's just clear the page.
223 */
ef23e779 224 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
aca84241
TH		 225 return -EFAULT;
226 kvm_s390_set_psw_cc(vcpu, 0);
227 vcpu->run->s.regs.gprs[0] = 0;
228 return 0;
229}
230
fa6b7fe9 231static int handle_tpi(struct kvm_vcpu *vcpu)
453423dc 232{
fa6b7fe9 233 struct kvm_s390_interrupt_info *inti;
4799b557
HC		 234 unsigned long len;
235 u32 tpi_data[3];
261520dc 236 int rc;
7c959e82 237 u64 addr;
8ae04b8f 238 ar_t ar;
fa6b7fe9 239
8ae04b8f 240 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
db4a29cb
HC		 241 if (addr & 3)
242 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
261520dc 243
f092669e 244 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
261520dc
DH		 245 if (!inti) {
246 kvm_s390_set_psw_cc(vcpu, 0);
247 return 0;
248 }
249
4799b557
HC		 250 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
251 tpi_data[1] = inti->io.io_int_parm;
252 tpi_data[2] = inti->io.io_int_word;
7c959e82
HC		 253 if (addr) {
254 /*
255 * Store the two-word I/O interruption code into the
256 * provided area.
257 */
4799b557 258 len = sizeof(tpi_data) - 4;
8ae04b8f 259 rc = write_guest(vcpu, addr, ar, &tpi_data, len);
261520dc
DH		 260 if (rc) {
261 rc = kvm_s390_inject_prog_cond(vcpu, rc);
262 goto reinject_interrupt;
263 }
7c959e82
HC		 264 } else {
265 /*
266 * Store the three-word I/O interruption code into
267 * the appropriate lowcore area.
268 */
4799b557 269 len = sizeof(tpi_data);
261520dc
DH		 270 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
271 /* failed writes to the low core are not recoverable */
4799b557 272 rc = -EFAULT;
261520dc
DH		 273 goto reinject_interrupt;
274 }
7c959e82 275 }
261520dc
DH		 276
277 /* irq was successfully handed to the guest */
278 kfree(inti);
279 kvm_s390_set_psw_cc(vcpu, 1);
280 return 0;
281reinject_interrupt:
2f32d4ea
CH		 282 /*
283 * If we encounter a problem storing the interruption code, the
284 * instruction is suppressed from the guest's view: reinject the
285 * interrupt.
286 */
15462e37
DH		 287 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
288 kfree(inti);
289 rc = -EFAULT;
290 }
261520dc 291 /* don't set the cc, a pgm irq was injected or we drop to user space */
4799b557 292 return rc ? -EFAULT : 0;
453423dc
CB		 293}
294
fa6b7fe9
CH		 295static int handle_tsch(struct kvm_vcpu *vcpu)
296{
297 struct kvm_s390_interrupt_info *inti;
298
299 inti = kvm_s390_get_io_int(vcpu->kvm, 0,
300 vcpu->run->s.regs.gprs[1]);
301
302 /*
303 * Prepare exit to userspace.
304 * We indicate whether we dequeued a pending I/O interrupt
305 * so that userspace can re-inject it if the instruction gets
306 * a program check. While this may re-order the pending I/O
307 * interrupts, this is no problem since the priority is kept
308 * intact.
309 */
310 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
311 vcpu->run->s390_tsch.dequeued = !!inti;
312 if (inti) {
313 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
314 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
315 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
316 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
317 }
318 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
319 kfree(inti);
320 return -EREMOTE;
321}
322
323static int handle_io_inst(struct kvm_vcpu *vcpu)
324{
325 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
326
5087dfa6
TH		 327 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
328 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
329
fa6b7fe9
CH		 330 if (vcpu->kvm->arch.css_support) {
331 /*
332 * Most I/O instructions will be handled by userspace.
333 * Exceptions are tpi and the interrupt portion of tsch.
334 */
335 if (vcpu->arch.sie_block->ipa == 0xb236)
336 return handle_tpi(vcpu);
337 if (vcpu->arch.sie_block->ipa == 0xb235)
338 return handle_tsch(vcpu);
339 /* Handle in userspace. */
340 return -EOPNOTSUPP;
341 } else {
342 /*
b4a96015 343 * Set condition code 3 to stop the guest from issuing channel
fa6b7fe9
CH		 344 * I/O instructions.
345 */
ea828ebf 346 kvm_s390_set_psw_cc(vcpu, 3);
fa6b7fe9
CH		 347 return 0;
348 }
349}
350
453423dc
CB		 351static int handle_stfl(struct kvm_vcpu *vcpu)
352{
453423dc 353 int rc;
9d8d5786 354 unsigned int fac;
453423dc
CB		 355
356 vcpu->stat.instruction_stfl++;
5087dfa6
TH		 357
358 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
359 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
360
9d8d5786
MM		 361 /*
362 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
363 * into a u32 memory representation. They will remain bits 0-31.
364 */
981467c9 365 fac = *vcpu->kvm->arch.model.fac->list >> 32;
0f9701c6 366 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list),
9d8d5786 367 &fac, sizeof(fac));
dc5008b9 368 if (rc)
0f9701c6 369 return rc;
9d8d5786
MM		 370 VCPU_EVENT(vcpu, 5, "store facility list value %x", fac);
371 trace_kvm_s390_handle_stfl(vcpu, fac);
453423dc
CB		 372 return 0;
373}
374
48a3e950
CH		 375#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
376#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
d21683ea 377#define PSW_ADDR_24 0x0000000000ffffffUL
48a3e950
CH		 378#define PSW_ADDR_31 0x000000007fffffffUL
379
a3fb577e
TH		 380int is_valid_psw(psw_t *psw)
381{
3736b874
HC		 382 if (psw->mask & PSW_MASK_UNASSIGNED)
383 return 0;
384 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
385 if (psw->addr & ~PSW_ADDR_31)
386 return 0;
387 }
388 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
389 return 0;
390 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
391 return 0;
a3fb577e
TH		 392 if (psw->addr & 1)
393 return 0;
3736b874
HC		 394 return 1;
395}
396
48a3e950
CH		 397int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
398{
3736b874 399 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
48a3e950 400 psw_compat_t new_psw;
3736b874 401 u64 addr;
2d8bcaed 402 int rc;
8ae04b8f 403 ar_t ar;
48a3e950 404
3736b874 405 if (gpsw->mask & PSW_MASK_PSTATE)
208dd756
TH		 406 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
407
8ae04b8f 408 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 409 if (addr & 7)
410 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
2d8bcaed 411
8ae04b8f 412 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 413 if (rc)
414 return kvm_s390_inject_prog_cond(vcpu, rc);
6fd0fcc9
HC		 415 if (!(new_psw.mask & PSW32_MASK_BASE))
416 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
3736b874
HC		 417 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
418 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
419 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
420 if (!is_valid_psw(gpsw))
6fd0fcc9 421 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 422 return 0;
423}
424
425static int handle_lpswe(struct kvm_vcpu *vcpu)
426{
48a3e950 427 psw_t new_psw;
3736b874 428 u64 addr;
2d8bcaed 429 int rc;
8ae04b8f 430 ar_t ar;
48a3e950 431
5087dfa6
TH		 432 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
433 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
434
8ae04b8f 435 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 436 if (addr & 7)
437 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 438 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 439 if (rc)
440 return kvm_s390_inject_prog_cond(vcpu, rc);
3736b874
HC		 441 vcpu->arch.sie_block->gpsw = new_psw;
442 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
6fd0fcc9 443 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 444 return 0;
445}
446
453423dc
CB		 447static int handle_stidp(struct kvm_vcpu *vcpu)
448{
7d777d78 449 u64 stidp_data = vcpu->arch.stidp_data;
453423dc 450 u64 operand2;
7d777d78 451 int rc;
8ae04b8f 452 ar_t ar;
453423dc
CB		 453
454 vcpu->stat.instruction_stidp++;
b1c571a5 455
5087dfa6
TH		 456 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
457 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
458
8ae04b8f 459 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 460
db4a29cb
HC		 461 if (operand2 & 7)
462 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 463
8ae04b8f 464 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
7d777d78
HC		 465 if (rc)
466 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc
CB		 467
468 VCPU_EVENT(vcpu, 5, "%s", "store cpu id");
453423dc
CB		 469 return 0;
470}
471
472static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
473{
453423dc
CB		 474 int cpus = 0;
475 int n;
476
ff520a63 477 cpus = atomic_read(&vcpu->kvm->online_vcpus);
453423dc
CB		 478
479 /* deal with other level 3 hypervisors */
caf757c6 480 if (stsi(mem, 3, 2, 2))
453423dc
CB		 481 mem->count = 0;
482 if (mem->count < 8)
483 mem->count++;
484 for (n = mem->count - 1; n > 0 ; n--)
485 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
486
b75f4c9a 487 memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
453423dc
CB		 488 mem->vm[0].cpus_total = cpus;
489 mem->vm[0].cpus_configured = cpus;
490 mem->vm[0].cpus_standby = 0;
491 mem->vm[0].cpus_reserved = 0;
492 mem->vm[0].caf = 1000;
493 memcpy(mem->vm[0].name, "KVMguest", 8);
494 ASCEBC(mem->vm[0].name, 8);
495 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
496 ASCEBC(mem->vm[0].cpi, 16);
497}
498
499static int handle_stsi(struct kvm_vcpu *vcpu)
500{
5a32c1af
CB		 501 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
502 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
503 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
c51f068c 504 unsigned long mem = 0;
453423dc 505 u64 operand2;
db4a29cb 506 int rc = 0;
8ae04b8f 507 ar_t ar;
453423dc
CB		 508
509 vcpu->stat.instruction_stsi++;
510 VCPU_EVENT(vcpu, 4, "stsi: fc: %x sel1: %x sel2: %x", fc, sel1, sel2);
511
5087dfa6
TH		 512 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
513 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
514
87d41fb4 515 if (fc > 3) {
ea828ebf 516 kvm_s390_set_psw_cc(vcpu, 3);
87d41fb4
TH		 517 return 0;
518 }
453423dc 519
87d41fb4
TH		 520 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
521 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
453423dc
CB		 522 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
523
87d41fb4 524 if (fc == 0) {
5a32c1af 525 vcpu->run->s.regs.gprs[0] = 3 << 28;
ea828ebf 526 kvm_s390_set_psw_cc(vcpu, 0);
453423dc 527 return 0;
87d41fb4
TH		 528 }
529
8ae04b8f 530 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
87d41fb4
TH		 531
532 if (operand2 & 0xfff)
533 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
534
535 switch (fc) {
453423dc
CB		 536 case 1: /* same handling for 1 and 2 */
537 case 2:
538 mem = get_zeroed_page(GFP_KERNEL);
539 if (!mem)
c51f068c 540 goto out_no_data;
caf757c6 541 if (stsi((void *) mem, fc, sel1, sel2))
c51f068c 542 goto out_no_data;
453423dc
CB		 543 break;
544 case 3:
545 if (sel1 != 2 || sel2 != 2)
c51f068c 546 goto out_no_data;
453423dc
CB		 547 mem = get_zeroed_page(GFP_KERNEL);
548 if (!mem)
c51f068c 549 goto out_no_data;
453423dc
CB		 550 handle_stsi_3_2_2(vcpu, (void *) mem);
551 break;
453423dc
CB		 552 }
553
8ae04b8f 554 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
645c5bc1
HC		 555 if (rc) {
556 rc = kvm_s390_inject_prog_cond(vcpu, rc);
557 goto out;
453423dc 558 }
5786fffa 559 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
453423dc 560 free_page(mem);
ea828ebf 561 kvm_s390_set_psw_cc(vcpu, 0);
5a32c1af 562 vcpu->run->s.regs.gprs[0] = 0;
453423dc 563 return 0;
c51f068c 564out_no_data:
ea828ebf 565 kvm_s390_set_psw_cc(vcpu, 3);
645c5bc1 566out:
c51f068c 567 free_page(mem);
db4a29cb 568 return rc;
453423dc
CB		 569}
570
f379aae5 571static const intercept_handler_t b2_handlers[256] = {
453423dc 572 [0x02] = handle_stidp,
6a3f95a6 573 [0x04] = handle_set_clock,
453423dc
CB		 574 [0x10] = handle_set_prefix,
575 [0x11] = handle_store_prefix,
576 [0x12] = handle_store_cpu_address,
8a242234 577 [0x21] = handle_ipte_interlock,
453423dc
CB		 578 [0x29] = handle_skey,
579 [0x2a] = handle_skey,
580 [0x2b] = handle_skey,
aca84241 581 [0x2c] = handle_test_block,
f379aae5
CH		 582 [0x30] = handle_io_inst,
583 [0x31] = handle_io_inst,
584 [0x32] = handle_io_inst,
585 [0x33] = handle_io_inst,
586 [0x34] = handle_io_inst,
587 [0x35] = handle_io_inst,
588 [0x36] = handle_io_inst,
589 [0x37] = handle_io_inst,
590 [0x38] = handle_io_inst,
591 [0x39] = handle_io_inst,
592 [0x3a] = handle_io_inst,
593 [0x3b] = handle_io_inst,
594 [0x3c] = handle_io_inst,
8a242234 595 [0x50] = handle_ipte_interlock,
f379aae5
CH		 596 [0x5f] = handle_io_inst,
597 [0x74] = handle_io_inst,
598 [0x76] = handle_io_inst,
453423dc
CB		 599 [0x7d] = handle_stsi,
600 [0xb1] = handle_stfl,
48a3e950 601 [0xb2] = handle_lpswe,
453423dc
CB		 602};
603
70455a36 604int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
453423dc
CB		 605{
606 intercept_handler_t handler;
607
70455a36 608 /*
5087dfa6
TH		 609 * A lot of B2 instructions are priviledged. Here we check for
610 * the privileged ones, that we can handle in the kernel.
611 * Anything else goes to userspace.
612 */
f379aae5 613 handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 614 if (handler)
615 return handler(vcpu);
616
b8e660b8 617 return -EOPNOTSUPP;
453423dc 618}
bb25b9ba 619
48a3e950
CH		 620static int handle_epsw(struct kvm_vcpu *vcpu)
621{
622 int reg1, reg2;
623
aeb87c3c 624 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
48a3e950
CH		 625
626 /* This basically extracts the mask half of the psw. */
843200e7 627 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
48a3e950
CH		 628 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
629 if (reg2) {
843200e7 630 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
48a3e950 631 vcpu->run->s.regs.gprs[reg2] |=
843200e7 632 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
48a3e950
CH		 633 }
634 return 0;
635}
636
69d0d3a3
CB		 637#define PFMF_RESERVED 0xfffc0101UL
638#define PFMF_SK 0x00020000UL
639#define PFMF_CF 0x00010000UL
640#define PFMF_UI 0x00008000UL
641#define PFMF_FSC 0x00007000UL
642#define PFMF_NQ 0x00000800UL
643#define PFMF_MR 0x00000400UL
644#define PFMF_MC 0x00000200UL
645#define PFMF_KEY 0x000000feUL
646
647static int handle_pfmf(struct kvm_vcpu *vcpu)
648{
649 int reg1, reg2;
650 unsigned long start, end;
651
652 vcpu->stat.instruction_pfmf++;
653
654 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
655
656 if (!MACHINE_HAS_PFMF)
657 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
658
659 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 660 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
69d0d3a3
CB		 661
662 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
663 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
664
665 /* Only provide non-quiescing support if the host supports it */
e769ece3 666 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && !test_facility(14))
69d0d3a3
CB		 667 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
668
669 /* No support for conditional-SSKE */
670 if (vcpu->run->s.regs.gprs[reg1] & (PFMF_MR | PFMF_MC))
671 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
672
673 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
a02689fe 674 start = kvm_s390_logical_to_effective(vcpu, start);
fb34c603 675
69d0d3a3
CB		 676 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
677 case 0x00000000:
678 end = (start + (1UL << 12)) & ~((1UL << 12) - 1);
679 break;
680 case 0x00001000:
681 end = (start + (1UL << 20)) & ~((1UL << 20) - 1);
682 break;
683 /* We dont support EDAT2
684 case 0x00002000:
685 end = (start + (1UL << 31)) & ~((1UL << 31) - 1);
686 break;*/
687 default:
688 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
689 }
a02689fe
TH		 690
691 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
dd9e5b7b 692 if (kvm_s390_check_low_addr_prot_real(vcpu, start))
a02689fe
TH		 693 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
694 }
695
69d0d3a3 696 while (start < end) {
fb34c603
TH		 697 unsigned long useraddr, abs_addr;
698
699 /* Translate guest address to host address */
700 if ((vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) == 0)
701 abs_addr = kvm_s390_real_to_abs(vcpu, start);
702 else
703 abs_addr = start;
704 useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(abs_addr));
705 if (kvm_is_error_hva(useraddr))
69d0d3a3
CB		 706 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
707
708 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
709 if (clear_user((void __user *)useraddr, PAGE_SIZE))
710 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
711 }
712
713 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
3ac8e380
DD		 714 int rc = __skey_check_enable(vcpu);
715
716 if (rc)
717 return rc;
69d0d3a3
CB		 718 if (set_guest_storage_key(current->mm, useraddr,
719 vcpu->run->s.regs.gprs[reg1] & PFMF_KEY,
720 vcpu->run->s.regs.gprs[reg1] & PFMF_NQ))
721 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
722 }
723
724 start += PAGE_SIZE;
725 }
726 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC)
727 vcpu->run->s.regs.gprs[reg2] = end;
728 return 0;
729}
730
b31288fa
KW		 731static int handle_essa(struct kvm_vcpu *vcpu)
732{
733 /* entries expected to be 1FF */
734 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
735 unsigned long *cbrlo, cbrle;
736 struct gmap *gmap;
737 int i;
738
739 VCPU_EVENT(vcpu, 5, "cmma release %d pages", entries);
740 gmap = vcpu->arch.gmap;
741 vcpu->stat.instruction_essa++;
b31605c1 742 if (!kvm_s390_cmma_enabled(vcpu->kvm))
b31288fa
KW		 743 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
744
745 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
746 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
747
748 if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6)
749 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
750
751 /* Rewind PSW to repeat the ESSA instruction */
04b41acd 752 kvm_s390_rewind_psw(vcpu, 4);
b31288fa
KW		 753 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
754 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
755 down_read(&gmap->mm->mmap_sem);
756 for (i = 0; i < entries; ++i) {
757 cbrle = cbrlo[i];
758 if (unlikely(cbrle & ~PAGE_MASK || cbrle < 2 * PAGE_SIZE))
759 /* invalid entry */
760 break;
761 /* try to free backing */
6e0a0431 762 __gmap_zap(gmap, cbrle);
b31288fa
KW		 763 }
764 up_read(&gmap->mm->mmap_sem);
765 if (i < entries)
766 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
767 return 0;
768}
769
48a3e950 770static const intercept_handler_t b9_handlers[256] = {
8a242234 771 [0x8a] = handle_ipte_interlock,
48a3e950 772 [0x8d] = handle_epsw,
8a242234
HC		 773 [0x8e] = handle_ipte_interlock,
774 [0x8f] = handle_ipte_interlock,
b31288fa 775 [0xab] = handle_essa,
69d0d3a3 776 [0xaf] = handle_pfmf,
48a3e950
CH		 777};
778
779int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
780{
781 intercept_handler_t handler;
782
783 /* This is handled just as for the B2 instructions. */
784 handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 785 if (handler)
786 return handler(vcpu);
787
48a3e950
CH		 788 return -EOPNOTSUPP;
789}
790
953ed88d
TH		 791int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
792{
793 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
794 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 795 int reg, rc, nr_regs;
796 u32 ctl_array[16];
f987a3ee 797 u64 ga;
8ae04b8f 798 ar_t ar;
953ed88d
TH		 799
800 vcpu->stat.instruction_lctl++;
801
802 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
803 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
804
8ae04b8f 805 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
953ed88d 806
f987a3ee 807 if (ga & 3)
953ed88d
TH		 808 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
809
f987a3ee
HC		 810 VCPU_EVENT(vcpu, 5, "lctl r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
811 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
953ed88d 812
fc56eb66 813 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 814 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66
HC		 815 if (rc)
816 return kvm_s390_inject_prog_cond(vcpu, rc);
953ed88d 817 reg = reg1;
fc56eb66 818 nr_regs = 0;
953ed88d 819 do {
953ed88d 820 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
fc56eb66 821 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
953ed88d
TH		 822 if (reg == reg3)
823 break;
824 reg = (reg + 1) % 16;
825 } while (1);
2dca485f 826 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 827 return 0;
828}
829
aba07508
DH		 830int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
831{
832 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
833 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 834 int reg, rc, nr_regs;
835 u32 ctl_array[16];
aba07508 836 u64 ga;
8ae04b8f 837 ar_t ar;
aba07508
DH		 838
839 vcpu->stat.instruction_stctl++;
840
841 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
842 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
843
8ae04b8f 844 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
aba07508
DH		 845
846 if (ga & 3)
847 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
848
849 VCPU_EVENT(vcpu, 5, "stctl r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
850 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
851
852 reg = reg1;
fc56eb66 853 nr_regs = 0;
aba07508 854 do {
fc56eb66 855 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 856 if (reg == reg3)
857 break;
858 reg = (reg + 1) % 16;
859 } while (1);
8ae04b8f 860 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66 861 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 862}
863
953ed88d
TH		 864static int handle_lctlg(struct kvm_vcpu *vcpu)
865{
866 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
867 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 868 int reg, rc, nr_regs;
869 u64 ctl_array[16];
870 u64 ga;
8ae04b8f 871 ar_t ar;
953ed88d
TH		 872
873 vcpu->stat.instruction_lctlg++;
874
875 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
876 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
877
8ae04b8f 878 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
953ed88d 879
f987a3ee 880 if (ga & 7)
953ed88d
TH		 881 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
882
f987a3ee
HC		 883 VCPU_EVENT(vcpu, 5, "lctlg r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
884 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
953ed88d 885
fc56eb66 886 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 887 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66
HC		 888 if (rc)
889 return kvm_s390_inject_prog_cond(vcpu, rc);
890 reg = reg1;
891 nr_regs = 0;
953ed88d 892 do {
fc56eb66 893 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
953ed88d
TH		 894 if (reg == reg3)
895 break;
896 reg = (reg + 1) % 16;
897 } while (1);
2dca485f 898 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 899 return 0;
900}
901
aba07508
DH		 902static int handle_stctg(struct kvm_vcpu *vcpu)
903{
904 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
905 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 906 int reg, rc, nr_regs;
907 u64 ctl_array[16];
908 u64 ga;
8ae04b8f 909 ar_t ar;
aba07508
DH		 910
911 vcpu->stat.instruction_stctg++;
912
913 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
914 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
915
8ae04b8f 916 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
aba07508
DH		 917
918 if (ga & 7)
919 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
920
aba07508
DH		 921 VCPU_EVENT(vcpu, 5, "stctg r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
922 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
923
fc56eb66
HC		 924 reg = reg1;
925 nr_regs = 0;
aba07508 926 do {
fc56eb66 927 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 928 if (reg == reg3)
929 break;
930 reg = (reg + 1) % 16;
931 } while (1);
8ae04b8f 932 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66 933 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 934}
935
f379aae5 936static const intercept_handler_t eb_handlers[256] = {
953ed88d 937 [0x2f] = handle_lctlg,
aba07508 938 [0x25] = handle_stctg,
f379aae5
CH		 939};
940
953ed88d 941int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
f379aae5
CH		 942{
943 intercept_handler_t handler;
944
f379aae5
CH		 945 handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
946 if (handler)
947 return handler(vcpu);
948 return -EOPNOTSUPP;
949}
950
bb25b9ba
CB		 951static int handle_tprot(struct kvm_vcpu *vcpu)
952{
b1c571a5 953 u64 address1, address2;
a0465f9a
TH		 954 unsigned long hva, gpa;
955 int ret = 0, cc = 0;
956 bool writable;
8ae04b8f 957 ar_t ar;
bb25b9ba
CB		 958
959 vcpu->stat.instruction_tprot++;
960
f9f6bbc6
TH		 961 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
962 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
963
8ae04b8f 964 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
b1c571a5 965
bb25b9ba
CB		 966 /* we only handle the Linux memory detection case:
967 * access key == 0
bb25b9ba
CB		 968 * everything else goes to userspace. */
969 if (address2 & 0xf0)
970 return -EOPNOTSUPP;
971 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
a0465f9a 972 ipte_lock(vcpu);
8ae04b8f 973 ret = guest_translate_address(vcpu, address1, ar, &gpa, 1);
a0465f9a
TH		 974 if (ret == PGM_PROTECTION) {
975 /* Write protected? Try again with read-only... */
976 cc = 1;
8ae04b8f 977 ret = guest_translate_address(vcpu, address1, ar, &gpa, 0);
a0465f9a
TH		 978 }
979 if (ret) {
980 if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
981 ret = kvm_s390_inject_program_int(vcpu, ret);
982 } else if (ret > 0) {
983 /* Translation not available */
984 kvm_s390_set_psw_cc(vcpu, 3);
985 ret = 0;
986 }
987 goto out_unlock;
988 }
59a1fa2d 989
a0465f9a
TH		 990 hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
991 if (kvm_is_error_hva(hva)) {
992 ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
993 } else {
994 if (!writable)
995 cc = 1; /* Write not permitted ==> read-only */
996 kvm_s390_set_psw_cc(vcpu, cc);
997 /* Note: CC2 only occurs for storage keys (not supported yet) */
998 }
999out_unlock:
1000 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1001 ipte_unlock(vcpu);
1002 return ret;
bb25b9ba
CB		 1003}
1004
1005int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
1006{
1007 /* For e5xx... instructions we only handle TPROT */
1008 if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
1009 return handle_tprot(vcpu);
1010 return -EOPNOTSUPP;
1011}
1012
8c3f61e2
CH		 1013static int handle_sckpf(struct kvm_vcpu *vcpu)
1014{
1015 u32 value;
1016
1017 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 1018 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
8c3f61e2
CH		 1019
1020 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
1021 return kvm_s390_inject_program_int(vcpu,
1022 PGM_SPECIFICATION);
1023
1024 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
1025 vcpu->arch.sie_block->todpr = value;
1026
1027 return 0;
1028}
1029
77975357 1030static const intercept_handler_t x01_handlers[256] = {
8c3f61e2
CH		 1031 [0x07] = handle_sckpf,
1032};
1033
1034int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
1035{
1036 intercept_handler_t handler;
1037
1038 handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
1039 if (handler)
1040 return handler(vcpu);
1041 return -EOPNOTSUPP;
1042}
Linux kernel - Deliverables
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