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KVM: s390: make EDAT1 depend on host support
[deliverable/linux.git] / arch / s390 / kvm / priv.c
CommitLineData
453423dc 1/*
a53c8fab 2 * handling privileged instructions
453423dc 3 *
69d0d3a3 4 * Copyright IBM Corp. 2008, 2013
453423dc
CB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Carsten Otte <cotte@de.ibm.com>
11 * Christian Borntraeger <borntraeger@de.ibm.com>
12 */
13
14#include <linux/kvm.h>
5a0e3ad6 15#include <linux/gfp.h>
453423dc 16#include <linux/errno.h>
b13b5dc7 17#include <linux/compat.h>
7c959e82 18#include <asm/asm-offsets.h>
e769ece3 19#include <asm/facility.h>
453423dc
CB		 20#include <asm/current.h>
21#include <asm/debug.h>
22#include <asm/ebcdic.h>
23#include <asm/sysinfo.h>
69d0d3a3
CB		 24#include <asm/pgtable.h>
25#include <asm/pgalloc.h>
26#include <asm/io.h>
48a3e950
CH		 27#include <asm/ptrace.h>
28#include <asm/compat.h>
453423dc
CB		 29#include "gaccess.h"
30#include "kvm-s390.h"
5786fffa 31#include "trace.h"
453423dc 32
6a3f95a6
TH		 33/* Handle SCK (SET CLOCK) interception */
34static int handle_set_clock(struct kvm_vcpu *vcpu)
35{
36 struct kvm_vcpu *cpup;
37 s64 hostclk, val;
0e7a3f94 38 int i, rc;
8ae04b8f 39 ar_t ar;
6a3f95a6 40 u64 op2;
6a3f95a6
TH		 41
42 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
43 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
44
8ae04b8f 45 op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
6a3f95a6
TH		 46 if (op2 & 7) /* Operand must be on a doubleword boundary */
47 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 48 rc = read_guest(vcpu, op2, ar, &val, sizeof(val));
0e7a3f94
HC		 49 if (rc)
50 return kvm_s390_inject_prog_cond(vcpu, rc);
6a3f95a6
TH		 51
52 if (store_tod_clock(&hostclk)) {
53 kvm_s390_set_psw_cc(vcpu, 3);
54 return 0;
55 }
56 val = (val - hostclk) & ~0x3fUL;
57
58 mutex_lock(&vcpu->kvm->lock);
59 kvm_for_each_vcpu(i, cpup, vcpu->kvm)
60 cpup->arch.sie_block->epoch = val;
61 mutex_unlock(&vcpu->kvm->lock);
62
63 kvm_s390_set_psw_cc(vcpu, 0);
64 return 0;
65}
66
453423dc
CB		 67static int handle_set_prefix(struct kvm_vcpu *vcpu)
68{
453423dc 69 u64 operand2;
665170cb
HC		 70 u32 address;
71 int rc;
8ae04b8f 72 ar_t ar;
453423dc
CB		 73
74 vcpu->stat.instruction_spx++;
75
5087dfa6
TH		 76 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
77 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
78
8ae04b8f 79 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 80
81 /* must be word boundary */
db4a29cb
HC		 82 if (operand2 & 3)
83 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc
CB		 84
85 /* get the value */
8ae04b8f 86 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
665170cb
HC		 87 if (rc)
88 return kvm_s390_inject_prog_cond(vcpu, rc);
89
90 address &= 0x7fffe000u;
91
92 /*
93 * Make sure the new value is valid memory. We only need to check the
94 * first page, since address is 8k aligned and memory pieces are always
95 * at least 1MB aligned and have at least a size of 1MB.
96 */
97 if (kvm_is_error_gpa(vcpu->kvm, address))
db4a29cb 98 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
453423dc 99
8d26cf7b 100 kvm_s390_set_prefix(vcpu, address);
453423dc
CB		 101
102 VCPU_EVENT(vcpu, 5, "setting prefix to %x", address);
5786fffa 103 trace_kvm_s390_handle_prefix(vcpu, 1, address);
453423dc
CB		 104 return 0;
105}
106
107static int handle_store_prefix(struct kvm_vcpu *vcpu)
108{
453423dc
CB		 109 u64 operand2;
110 u32 address;
f748f4a7 111 int rc;
8ae04b8f 112 ar_t ar;
453423dc
CB		 113
114 vcpu->stat.instruction_stpx++;
b1c571a5 115
5087dfa6
TH		 116 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
117 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
118
8ae04b8f 119 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 120
121 /* must be word boundary */
db4a29cb
HC		 122 if (operand2 & 3)
123 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 124
fda902cb 125 address = kvm_s390_get_prefix(vcpu);
453423dc
CB		 126
127 /* get the value */
8ae04b8f 128 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
f748f4a7
HC		 129 if (rc)
130 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc
CB		 131
132 VCPU_EVENT(vcpu, 5, "storing prefix to %x", address);
5786fffa 133 trace_kvm_s390_handle_prefix(vcpu, 0, address);
453423dc
CB		 134 return 0;
135}
136
137static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
138{
8b96de0e
HC		 139 u16 vcpu_id = vcpu->vcpu_id;
140 u64 ga;
141 int rc;
8ae04b8f 142 ar_t ar;
453423dc
CB		 143
144 vcpu->stat.instruction_stap++;
b1c571a5 145
5087dfa6
TH		 146 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
147 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
148
8ae04b8f 149 ga = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 150
8b96de0e 151 if (ga & 1)
db4a29cb 152 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 153
8ae04b8f 154 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
8b96de0e
HC		 155 if (rc)
156 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 157
8b96de0e
HC		 158 VCPU_EVENT(vcpu, 5, "storing cpu address to %llx", ga);
159 trace_kvm_s390_handle_stap(vcpu, ga);
453423dc
CB		 160 return 0;
161}
162
3ac8e380 163static int __skey_check_enable(struct kvm_vcpu *vcpu)
693ffc08 164{
3ac8e380 165 int rc = 0;
693ffc08 166 if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)))
3ac8e380 167 return rc;
693ffc08 168
3ac8e380 169 rc = s390_enable_skey();
693ffc08
DD		 170 trace_kvm_s390_skey_related_inst(vcpu);
171 vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE);
3ac8e380 172 return rc;
693ffc08
DD		 173}
174
175
453423dc
CB		 176static int handle_skey(struct kvm_vcpu *vcpu)
177{
3ac8e380 178 int rc = __skey_check_enable(vcpu);
693ffc08 179
3ac8e380
DD		 180 if (rc)
181 return rc;
453423dc 182 vcpu->stat.instruction_storage_key++;
5087dfa6
TH		 183
184 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
185 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
186
04b41acd 187 kvm_s390_rewind_psw(vcpu, 4);
453423dc
CB		 188 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
189 return 0;
190}
191
8a242234
HC		 192static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
193{
8a242234 194 vcpu->stat.instruction_ipte_interlock++;
04b41acd 195 if (psw_bits(vcpu->arch.sie_block->gpsw).p)
8a242234
HC		 196 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
197 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
04b41acd 198 kvm_s390_rewind_psw(vcpu, 4);
8a242234
HC		 199 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
200 return 0;
201}
202
aca84241
TH		 203static int handle_test_block(struct kvm_vcpu *vcpu)
204{
aca84241
TH		 205 gpa_t addr;
206 int reg2;
207
208 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
209 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
210
211 kvm_s390_get_regs_rre(vcpu, NULL, &reg2);
212 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
e45efa28 213 addr = kvm_s390_logical_to_effective(vcpu, addr);
dd9e5b7b 214 if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
e45efa28 215 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
aca84241
TH		 216 addr = kvm_s390_real_to_abs(vcpu, addr);
217
ef23e779 218 if (kvm_is_error_gpa(vcpu->kvm, addr))
aca84241
TH		 219 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
220 /*
221 * We don't expect errors on modern systems, and do not care
222 * about storage keys (yet), so let's just clear the page.
223 */
ef23e779 224 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
aca84241
TH		 225 return -EFAULT;
226 kvm_s390_set_psw_cc(vcpu, 0);
227 vcpu->run->s.regs.gprs[0] = 0;
228 return 0;
229}
230
fa6b7fe9 231static int handle_tpi(struct kvm_vcpu *vcpu)
453423dc 232{
fa6b7fe9 233 struct kvm_s390_interrupt_info *inti;
4799b557
HC		 234 unsigned long len;
235 u32 tpi_data[3];
261520dc 236 int rc;
7c959e82 237 u64 addr;
8ae04b8f 238 ar_t ar;
fa6b7fe9 239
8ae04b8f 240 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
db4a29cb
HC		 241 if (addr & 3)
242 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
261520dc 243
f092669e 244 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
261520dc
DH		 245 if (!inti) {
246 kvm_s390_set_psw_cc(vcpu, 0);
247 return 0;
248 }
249
4799b557
HC		 250 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
251 tpi_data[1] = inti->io.io_int_parm;
252 tpi_data[2] = inti->io.io_int_word;
7c959e82
HC		 253 if (addr) {
254 /*
255 * Store the two-word I/O interruption code into the
256 * provided area.
257 */
4799b557 258 len = sizeof(tpi_data) - 4;
8ae04b8f 259 rc = write_guest(vcpu, addr, ar, &tpi_data, len);
261520dc
DH		 260 if (rc) {
261 rc = kvm_s390_inject_prog_cond(vcpu, rc);
262 goto reinject_interrupt;
263 }
7c959e82
HC		 264 } else {
265 /*
266 * Store the three-word I/O interruption code into
267 * the appropriate lowcore area.
268 */
4799b557 269 len = sizeof(tpi_data);
261520dc
DH		 270 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
271 /* failed writes to the low core are not recoverable */
4799b557 272 rc = -EFAULT;
261520dc
DH		 273 goto reinject_interrupt;
274 }
7c959e82 275 }
261520dc
DH		 276
277 /* irq was successfully handed to the guest */
278 kfree(inti);
279 kvm_s390_set_psw_cc(vcpu, 1);
280 return 0;
281reinject_interrupt:
2f32d4ea
CH		 282 /*
283 * If we encounter a problem storing the interruption code, the
284 * instruction is suppressed from the guest's view: reinject the
285 * interrupt.
286 */
15462e37
DH		 287 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
288 kfree(inti);
289 rc = -EFAULT;
290 }
261520dc 291 /* don't set the cc, a pgm irq was injected or we drop to user space */
4799b557 292 return rc ? -EFAULT : 0;
453423dc
CB		 293}
294
fa6b7fe9
CH		 295static int handle_tsch(struct kvm_vcpu *vcpu)
296{
6d3da241
JF		 297 struct kvm_s390_interrupt_info *inti = NULL;
298 const u64 isc_mask = 0xffUL << 24; /* all iscs set */
fa6b7fe9 299
6d3da241
JF		 300 /* a valid schid has at least one bit set */
301 if (vcpu->run->s.regs.gprs[1])
302 inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
303 vcpu->run->s.regs.gprs[1]);
fa6b7fe9
CH		 304
305 /*
306 * Prepare exit to userspace.
307 * We indicate whether we dequeued a pending I/O interrupt
308 * so that userspace can re-inject it if the instruction gets
309 * a program check. While this may re-order the pending I/O
310 * interrupts, this is no problem since the priority is kept
311 * intact.
312 */
313 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
314 vcpu->run->s390_tsch.dequeued = !!inti;
315 if (inti) {
316 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
317 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
318 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
319 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
320 }
321 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
322 kfree(inti);
323 return -EREMOTE;
324}
325
326static int handle_io_inst(struct kvm_vcpu *vcpu)
327{
328 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
329
5087dfa6
TH		 330 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
331 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
332
fa6b7fe9
CH		 333 if (vcpu->kvm->arch.css_support) {
334 /*
335 * Most I/O instructions will be handled by userspace.
336 * Exceptions are tpi and the interrupt portion of tsch.
337 */
338 if (vcpu->arch.sie_block->ipa == 0xb236)
339 return handle_tpi(vcpu);
340 if (vcpu->arch.sie_block->ipa == 0xb235)
341 return handle_tsch(vcpu);
342 /* Handle in userspace. */
343 return -EOPNOTSUPP;
344 } else {
345 /*
b4a96015 346 * Set condition code 3 to stop the guest from issuing channel
fa6b7fe9
CH		 347 * I/O instructions.
348 */
ea828ebf 349 kvm_s390_set_psw_cc(vcpu, 3);
fa6b7fe9
CH		 350 return 0;
351 }
352}
353
453423dc
CB		 354static int handle_stfl(struct kvm_vcpu *vcpu)
355{
453423dc 356 int rc;
9d8d5786 357 unsigned int fac;
453423dc
CB		 358
359 vcpu->stat.instruction_stfl++;
5087dfa6
TH		 360
361 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
362 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
363
9d8d5786
MM		 364 /*
365 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
366 * into a u32 memory representation. They will remain bits 0-31.
367 */
981467c9 368 fac = *vcpu->kvm->arch.model.fac->list >> 32;
0f9701c6 369 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list),
9d8d5786 370 &fac, sizeof(fac));
dc5008b9 371 if (rc)
0f9701c6 372 return rc;
9d8d5786
MM		 373 VCPU_EVENT(vcpu, 5, "store facility list value %x", fac);
374 trace_kvm_s390_handle_stfl(vcpu, fac);
453423dc
CB		 375 return 0;
376}
377
48a3e950
CH		 378#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
379#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
d21683ea 380#define PSW_ADDR_24 0x0000000000ffffffUL
48a3e950
CH		 381#define PSW_ADDR_31 0x000000007fffffffUL
382
a3fb577e
TH		 383int is_valid_psw(psw_t *psw)
384{
3736b874
HC		 385 if (psw->mask & PSW_MASK_UNASSIGNED)
386 return 0;
387 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
388 if (psw->addr & ~PSW_ADDR_31)
389 return 0;
390 }
391 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
392 return 0;
393 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
394 return 0;
a3fb577e
TH		 395 if (psw->addr & 1)
396 return 0;
3736b874
HC		 397 return 1;
398}
399
48a3e950
CH		 400int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
401{
3736b874 402 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
48a3e950 403 psw_compat_t new_psw;
3736b874 404 u64 addr;
2d8bcaed 405 int rc;
8ae04b8f 406 ar_t ar;
48a3e950 407
3736b874 408 if (gpsw->mask & PSW_MASK_PSTATE)
208dd756
TH		 409 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
410
8ae04b8f 411 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 412 if (addr & 7)
413 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
2d8bcaed 414
8ae04b8f 415 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 416 if (rc)
417 return kvm_s390_inject_prog_cond(vcpu, rc);
6fd0fcc9
HC		 418 if (!(new_psw.mask & PSW32_MASK_BASE))
419 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
3736b874
HC		 420 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
421 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
422 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
423 if (!is_valid_psw(gpsw))
6fd0fcc9 424 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 425 return 0;
426}
427
428static int handle_lpswe(struct kvm_vcpu *vcpu)
429{
48a3e950 430 psw_t new_psw;
3736b874 431 u64 addr;
2d8bcaed 432 int rc;
8ae04b8f 433 ar_t ar;
48a3e950 434
5087dfa6
TH		 435 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
436 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
437
8ae04b8f 438 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 439 if (addr & 7)
440 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 441 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 442 if (rc)
443 return kvm_s390_inject_prog_cond(vcpu, rc);
3736b874
HC		 444 vcpu->arch.sie_block->gpsw = new_psw;
445 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
6fd0fcc9 446 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 447 return 0;
448}
449
453423dc
CB		 450static int handle_stidp(struct kvm_vcpu *vcpu)
451{
7d777d78 452 u64 stidp_data = vcpu->arch.stidp_data;
453423dc 453 u64 operand2;
7d777d78 454 int rc;
8ae04b8f 455 ar_t ar;
453423dc
CB		 456
457 vcpu->stat.instruction_stidp++;
b1c571a5 458
5087dfa6
TH		 459 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
460 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
461
8ae04b8f 462 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 463
db4a29cb
HC		 464 if (operand2 & 7)
465 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 466
8ae04b8f 467 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
7d777d78
HC		 468 if (rc)
469 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc
CB		 470
471 VCPU_EVENT(vcpu, 5, "%s", "store cpu id");
453423dc
CB		 472 return 0;
473}
474
475static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
476{
453423dc
CB		 477 int cpus = 0;
478 int n;
479
ff520a63 480 cpus = atomic_read(&vcpu->kvm->online_vcpus);
453423dc
CB		 481
482 /* deal with other level 3 hypervisors */
caf757c6 483 if (stsi(mem, 3, 2, 2))
453423dc
CB		 484 mem->count = 0;
485 if (mem->count < 8)
486 mem->count++;
487 for (n = mem->count - 1; n > 0 ; n--)
488 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
489
b75f4c9a 490 memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
453423dc
CB		 491 mem->vm[0].cpus_total = cpus;
492 mem->vm[0].cpus_configured = cpus;
493 mem->vm[0].cpus_standby = 0;
494 mem->vm[0].cpus_reserved = 0;
495 mem->vm[0].caf = 1000;
496 memcpy(mem->vm[0].name, "KVMguest", 8);
497 ASCEBC(mem->vm[0].name, 8);
498 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
499 ASCEBC(mem->vm[0].cpi, 16);
500}
501
e44fc8c9
ET		 502static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, ar_t ar,
503 u8 fc, u8 sel1, u16 sel2)
504{
505 vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
506 vcpu->run->s390_stsi.addr = addr;
507 vcpu->run->s390_stsi.ar = ar;
508 vcpu->run->s390_stsi.fc = fc;
509 vcpu->run->s390_stsi.sel1 = sel1;
510 vcpu->run->s390_stsi.sel2 = sel2;
511}
512
453423dc
CB		 513static int handle_stsi(struct kvm_vcpu *vcpu)
514{
5a32c1af
CB		 515 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
516 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
517 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
c51f068c 518 unsigned long mem = 0;
453423dc 519 u64 operand2;
db4a29cb 520 int rc = 0;
8ae04b8f 521 ar_t ar;
453423dc
CB		 522
523 vcpu->stat.instruction_stsi++;
524 VCPU_EVENT(vcpu, 4, "stsi: fc: %x sel1: %x sel2: %x", fc, sel1, sel2);
525
5087dfa6
TH		 526 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
527 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
528
87d41fb4 529 if (fc > 3) {
ea828ebf 530 kvm_s390_set_psw_cc(vcpu, 3);
87d41fb4
TH		 531 return 0;
532 }
453423dc 533
87d41fb4
TH		 534 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
535 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
453423dc
CB		 536 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
537
87d41fb4 538 if (fc == 0) {
5a32c1af 539 vcpu->run->s.regs.gprs[0] = 3 << 28;
ea828ebf 540 kvm_s390_set_psw_cc(vcpu, 0);
453423dc 541 return 0;
87d41fb4
TH		 542 }
543
8ae04b8f 544 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
87d41fb4
TH		 545
546 if (operand2 & 0xfff)
547 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
548
549 switch (fc) {
453423dc
CB		 550 case 1: /* same handling for 1 and 2 */
551 case 2:
552 mem = get_zeroed_page(GFP_KERNEL);
553 if (!mem)
c51f068c 554 goto out_no_data;
caf757c6 555 if (stsi((void *) mem, fc, sel1, sel2))
c51f068c 556 goto out_no_data;
453423dc
CB		 557 break;
558 case 3:
559 if (sel1 != 2 || sel2 != 2)
c51f068c 560 goto out_no_data;
453423dc
CB		 561 mem = get_zeroed_page(GFP_KERNEL);
562 if (!mem)
c51f068c 563 goto out_no_data;
453423dc
CB		 564 handle_stsi_3_2_2(vcpu, (void *) mem);
565 break;
453423dc
CB		 566 }
567
8ae04b8f 568 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
645c5bc1
HC		 569 if (rc) {
570 rc = kvm_s390_inject_prog_cond(vcpu, rc);
571 goto out;
453423dc 572 }
e44fc8c9
ET		 573 if (vcpu->kvm->arch.user_stsi) {
574 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
575 rc = -EREMOTE;
576 }
5786fffa 577 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
453423dc 578 free_page(mem);
ea828ebf 579 kvm_s390_set_psw_cc(vcpu, 0);
5a32c1af 580 vcpu->run->s.regs.gprs[0] = 0;
e44fc8c9 581 return rc;
c51f068c 582out_no_data:
ea828ebf 583 kvm_s390_set_psw_cc(vcpu, 3);
645c5bc1 584out:
c51f068c 585 free_page(mem);
db4a29cb 586 return rc;
453423dc
CB		 587}
588
f379aae5 589static const intercept_handler_t b2_handlers[256] = {
453423dc 590 [0x02] = handle_stidp,
6a3f95a6 591 [0x04] = handle_set_clock,
453423dc
CB		 592 [0x10] = handle_set_prefix,
593 [0x11] = handle_store_prefix,
594 [0x12] = handle_store_cpu_address,
8a242234 595 [0x21] = handle_ipte_interlock,
453423dc
CB		 596 [0x29] = handle_skey,
597 [0x2a] = handle_skey,
598 [0x2b] = handle_skey,
aca84241 599 [0x2c] = handle_test_block,
f379aae5
CH		 600 [0x30] = handle_io_inst,
601 [0x31] = handle_io_inst,
602 [0x32] = handle_io_inst,
603 [0x33] = handle_io_inst,
604 [0x34] = handle_io_inst,
605 [0x35] = handle_io_inst,
606 [0x36] = handle_io_inst,
607 [0x37] = handle_io_inst,
608 [0x38] = handle_io_inst,
609 [0x39] = handle_io_inst,
610 [0x3a] = handle_io_inst,
611 [0x3b] = handle_io_inst,
612 [0x3c] = handle_io_inst,
8a242234 613 [0x50] = handle_ipte_interlock,
f379aae5
CH		 614 [0x5f] = handle_io_inst,
615 [0x74] = handle_io_inst,
616 [0x76] = handle_io_inst,
453423dc
CB		 617 [0x7d] = handle_stsi,
618 [0xb1] = handle_stfl,
48a3e950 619 [0xb2] = handle_lpswe,
453423dc
CB		 620};
621
70455a36 622int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
453423dc
CB		 623{
624 intercept_handler_t handler;
625
70455a36 626 /*
5087dfa6
TH		 627 * A lot of B2 instructions are priviledged. Here we check for
628 * the privileged ones, that we can handle in the kernel.
629 * Anything else goes to userspace.
630 */
f379aae5 631 handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 632 if (handler)
633 return handler(vcpu);
634
b8e660b8 635 return -EOPNOTSUPP;
453423dc 636}
bb25b9ba 637
48a3e950
CH		 638static int handle_epsw(struct kvm_vcpu *vcpu)
639{
640 int reg1, reg2;
641
aeb87c3c 642 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
48a3e950
CH		 643
644 /* This basically extracts the mask half of the psw. */
843200e7 645 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
48a3e950
CH		 646 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
647 if (reg2) {
843200e7 648 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
48a3e950 649 vcpu->run->s.regs.gprs[reg2] |=
843200e7 650 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
48a3e950
CH		 651 }
652 return 0;
653}
654
69d0d3a3
CB		 655#define PFMF_RESERVED 0xfffc0101UL
656#define PFMF_SK 0x00020000UL
657#define PFMF_CF 0x00010000UL
658#define PFMF_UI 0x00008000UL
659#define PFMF_FSC 0x00007000UL
660#define PFMF_NQ 0x00000800UL
661#define PFMF_MR 0x00000400UL
662#define PFMF_MC 0x00000200UL
663#define PFMF_KEY 0x000000feUL
664
665static int handle_pfmf(struct kvm_vcpu *vcpu)
666{
667 int reg1, reg2;
668 unsigned long start, end;
669
670 vcpu->stat.instruction_pfmf++;
671
672 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
673
674 if (!MACHINE_HAS_PFMF)
675 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
676
677 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 678 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
69d0d3a3
CB		 679
680 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
681 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
682
683 /* Only provide non-quiescing support if the host supports it */
e769ece3 684 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && !test_facility(14))
69d0d3a3
CB		 685 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
686
687 /* No support for conditional-SSKE */
688 if (vcpu->run->s.regs.gprs[reg1] & (PFMF_MR | PFMF_MC))
689 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
690
691 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
a02689fe 692 start = kvm_s390_logical_to_effective(vcpu, start);
fb34c603 693
69d0d3a3
CB		 694 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
695 case 0x00000000:
696 end = (start + (1UL << 12)) & ~((1UL << 12) - 1);
697 break;
698 case 0x00001000:
699 end = (start + (1UL << 20)) & ~((1UL << 20) - 1);
700 break;
701 /* We dont support EDAT2
702 case 0x00002000:
703 end = (start + (1UL << 31)) & ~((1UL << 31) - 1);
704 break;*/
705 default:
706 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
707 }
a02689fe
TH		 708
709 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
dd9e5b7b 710 if (kvm_s390_check_low_addr_prot_real(vcpu, start))
a02689fe
TH		 711 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
712 }
713
69d0d3a3 714 while (start < end) {
fb34c603
TH		 715 unsigned long useraddr, abs_addr;
716
717 /* Translate guest address to host address */
718 if ((vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) == 0)
719 abs_addr = kvm_s390_real_to_abs(vcpu, start);
720 else
721 abs_addr = start;
722 useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(abs_addr));
723 if (kvm_is_error_hva(useraddr))
69d0d3a3
CB		 724 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
725
726 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
727 if (clear_user((void __user *)useraddr, PAGE_SIZE))
728 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
729 }
730
731 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
3ac8e380
DD		 732 int rc = __skey_check_enable(vcpu);
733
734 if (rc)
735 return rc;
69d0d3a3
CB		 736 if (set_guest_storage_key(current->mm, useraddr,
737 vcpu->run->s.regs.gprs[reg1] & PFMF_KEY,
738 vcpu->run->s.regs.gprs[reg1] & PFMF_NQ))
739 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
740 }
741
742 start += PAGE_SIZE;
743 }
744 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC)
745 vcpu->run->s.regs.gprs[reg2] = end;
746 return 0;
747}
748
b31288fa
KW		 749static int handle_essa(struct kvm_vcpu *vcpu)
750{
751 /* entries expected to be 1FF */
752 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
753 unsigned long *cbrlo, cbrle;
754 struct gmap *gmap;
755 int i;
756
757 VCPU_EVENT(vcpu, 5, "cmma release %d pages", entries);
758 gmap = vcpu->arch.gmap;
759 vcpu->stat.instruction_essa++;
b31605c1 760 if (!kvm_s390_cmma_enabled(vcpu->kvm))
b31288fa
KW		 761 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
762
763 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
764 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
765
766 if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6)
767 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
768
769 /* Rewind PSW to repeat the ESSA instruction */
04b41acd 770 kvm_s390_rewind_psw(vcpu, 4);
b31288fa
KW		 771 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
772 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
773 down_read(&gmap->mm->mmap_sem);
774 for (i = 0; i < entries; ++i) {
775 cbrle = cbrlo[i];
776 if (unlikely(cbrle & ~PAGE_MASK || cbrle < 2 * PAGE_SIZE))
777 /* invalid entry */
778 break;
779 /* try to free backing */
6e0a0431 780 __gmap_zap(gmap, cbrle);
b31288fa
KW		 781 }
782 up_read(&gmap->mm->mmap_sem);
783 if (i < entries)
784 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
785 return 0;
786}
787
48a3e950 788static const intercept_handler_t b9_handlers[256] = {
8a242234 789 [0x8a] = handle_ipte_interlock,
48a3e950 790 [0x8d] = handle_epsw,
8a242234
HC		 791 [0x8e] = handle_ipte_interlock,
792 [0x8f] = handle_ipte_interlock,
b31288fa 793 [0xab] = handle_essa,
69d0d3a3 794 [0xaf] = handle_pfmf,
48a3e950
CH		 795};
796
797int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
798{
799 intercept_handler_t handler;
800
801 /* This is handled just as for the B2 instructions. */
802 handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 803 if (handler)
804 return handler(vcpu);
805
48a3e950
CH		 806 return -EOPNOTSUPP;
807}
808
953ed88d
TH		 809int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
810{
811 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
812 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 813 int reg, rc, nr_regs;
814 u32 ctl_array[16];
f987a3ee 815 u64 ga;
8ae04b8f 816 ar_t ar;
953ed88d
TH		 817
818 vcpu->stat.instruction_lctl++;
819
820 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
821 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
822
8ae04b8f 823 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
953ed88d 824
f987a3ee 825 if (ga & 3)
953ed88d
TH		 826 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
827
f987a3ee
HC		 828 VCPU_EVENT(vcpu, 5, "lctl r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
829 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
953ed88d 830
fc56eb66 831 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 832 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66
HC		 833 if (rc)
834 return kvm_s390_inject_prog_cond(vcpu, rc);
953ed88d 835 reg = reg1;
fc56eb66 836 nr_regs = 0;
953ed88d 837 do {
953ed88d 838 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
fc56eb66 839 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
953ed88d
TH		 840 if (reg == reg3)
841 break;
842 reg = (reg + 1) % 16;
843 } while (1);
2dca485f 844 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 845 return 0;
846}
847
aba07508
DH		 848int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
849{
850 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
851 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 852 int reg, rc, nr_regs;
853 u32 ctl_array[16];
aba07508 854 u64 ga;
8ae04b8f 855 ar_t ar;
aba07508
DH		 856
857 vcpu->stat.instruction_stctl++;
858
859 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
860 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
861
8ae04b8f 862 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
aba07508
DH		 863
864 if (ga & 3)
865 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
866
867 VCPU_EVENT(vcpu, 5, "stctl r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
868 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
869
870 reg = reg1;
fc56eb66 871 nr_regs = 0;
aba07508 872 do {
fc56eb66 873 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 874 if (reg == reg3)
875 break;
876 reg = (reg + 1) % 16;
877 } while (1);
8ae04b8f 878 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66 879 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 880}
881
953ed88d
TH		 882static int handle_lctlg(struct kvm_vcpu *vcpu)
883{
884 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
885 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 886 int reg, rc, nr_regs;
887 u64 ctl_array[16];
888 u64 ga;
8ae04b8f 889 ar_t ar;
953ed88d
TH		 890
891 vcpu->stat.instruction_lctlg++;
892
893 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
894 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
895
8ae04b8f 896 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
953ed88d 897
f987a3ee 898 if (ga & 7)
953ed88d
TH		 899 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
900
f987a3ee
HC		 901 VCPU_EVENT(vcpu, 5, "lctlg r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
902 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
953ed88d 903
fc56eb66 904 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 905 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66
HC		 906 if (rc)
907 return kvm_s390_inject_prog_cond(vcpu, rc);
908 reg = reg1;
909 nr_regs = 0;
953ed88d 910 do {
fc56eb66 911 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
953ed88d
TH		 912 if (reg == reg3)
913 break;
914 reg = (reg + 1) % 16;
915 } while (1);
2dca485f 916 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 917 return 0;
918}
919
aba07508
DH		 920static int handle_stctg(struct kvm_vcpu *vcpu)
921{
922 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
923 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 924 int reg, rc, nr_regs;
925 u64 ctl_array[16];
926 u64 ga;
8ae04b8f 927 ar_t ar;
aba07508
DH		 928
929 vcpu->stat.instruction_stctg++;
930
931 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
932 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
933
8ae04b8f 934 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
aba07508
DH		 935
936 if (ga & 7)
937 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
938
aba07508
DH		 939 VCPU_EVENT(vcpu, 5, "stctg r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
940 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
941
fc56eb66
HC		 942 reg = reg1;
943 nr_regs = 0;
aba07508 944 do {
fc56eb66 945 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 946 if (reg == reg3)
947 break;
948 reg = (reg + 1) % 16;
949 } while (1);
8ae04b8f 950 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66 951 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 952}
953
f379aae5 954static const intercept_handler_t eb_handlers[256] = {
953ed88d 955 [0x2f] = handle_lctlg,
aba07508 956 [0x25] = handle_stctg,
f379aae5
CH		 957};
958
953ed88d 959int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
f379aae5
CH		 960{
961 intercept_handler_t handler;
962
f379aae5
CH		 963 handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
964 if (handler)
965 return handler(vcpu);
966 return -EOPNOTSUPP;
967}
968
bb25b9ba
CB		 969static int handle_tprot(struct kvm_vcpu *vcpu)
970{
b1c571a5 971 u64 address1, address2;
a0465f9a
TH		 972 unsigned long hva, gpa;
973 int ret = 0, cc = 0;
974 bool writable;
8ae04b8f 975 ar_t ar;
bb25b9ba
CB		 976
977 vcpu->stat.instruction_tprot++;
978
f9f6bbc6
TH		 979 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
980 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
981
8ae04b8f 982 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
b1c571a5 983
bb25b9ba
CB		 984 /* we only handle the Linux memory detection case:
985 * access key == 0
bb25b9ba
CB		 986 * everything else goes to userspace. */
987 if (address2 & 0xf0)
988 return -EOPNOTSUPP;
989 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
a0465f9a 990 ipte_lock(vcpu);
8ae04b8f 991 ret = guest_translate_address(vcpu, address1, ar, &gpa, 1);
a0465f9a
TH		 992 if (ret == PGM_PROTECTION) {
993 /* Write protected? Try again with read-only... */
994 cc = 1;
8ae04b8f 995 ret = guest_translate_address(vcpu, address1, ar, &gpa, 0);
a0465f9a
TH		 996 }
997 if (ret) {
998 if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
999 ret = kvm_s390_inject_program_int(vcpu, ret);
1000 } else if (ret > 0) {
1001 /* Translation not available */
1002 kvm_s390_set_psw_cc(vcpu, 3);
1003 ret = 0;
1004 }
1005 goto out_unlock;
1006 }
59a1fa2d 1007
a0465f9a
TH		 1008 hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
1009 if (kvm_is_error_hva(hva)) {
1010 ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1011 } else {
1012 if (!writable)
1013 cc = 1; /* Write not permitted ==> read-only */
1014 kvm_s390_set_psw_cc(vcpu, cc);
1015 /* Note: CC2 only occurs for storage keys (not supported yet) */
1016 }
1017out_unlock:
1018 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1019 ipte_unlock(vcpu);
1020 return ret;
bb25b9ba
CB		 1021}
1022
1023int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
1024{
1025 /* For e5xx... instructions we only handle TPROT */
1026 if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
1027 return handle_tprot(vcpu);
1028 return -EOPNOTSUPP;
1029}
1030
8c3f61e2
CH		 1031static int handle_sckpf(struct kvm_vcpu *vcpu)
1032{
1033 u32 value;
1034
1035 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 1036 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
8c3f61e2
CH		 1037
1038 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
1039 return kvm_s390_inject_program_int(vcpu,
1040 PGM_SPECIFICATION);
1041
1042 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
1043 vcpu->arch.sie_block->todpr = value;
1044
1045 return 0;
1046}
1047
77975357 1048static const intercept_handler_t x01_handlers[256] = {
8c3f61e2
CH		 1049 [0x07] = handle_sckpf,
1050};
1051
1052int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
1053{
1054 intercept_handler_t handler;
1055
1056 handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
1057 if (handler)
1058 return handler(vcpu);
1059 return -EOPNOTSUPP;
1060}
Linux kernel - Deliverables
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