KVM: s390: convert handle lctl[g]()
[deliverable/linux.git] / arch / s390 / kvm / priv.c
CommitLineData
453423dc 1/*
a53c8fab 2 * handling privileged instructions
453423dc 3 *
69d0d3a3 4 * Copyright IBM Corp. 2008, 2013
453423dc
CB
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Carsten Otte <cotte@de.ibm.com>
11 * Christian Borntraeger <borntraeger@de.ibm.com>
12 */
13
14#include <linux/kvm.h>
5a0e3ad6 15#include <linux/gfp.h>
453423dc 16#include <linux/errno.h>
b13b5dc7 17#include <linux/compat.h>
7c959e82 18#include <asm/asm-offsets.h>
e769ece3 19#include <asm/facility.h>
453423dc
CB
20#include <asm/current.h>
21#include <asm/debug.h>
22#include <asm/ebcdic.h>
23#include <asm/sysinfo.h>
69d0d3a3
CB
24#include <asm/pgtable.h>
25#include <asm/pgalloc.h>
26#include <asm/io.h>
48a3e950
CH
27#include <asm/ptrace.h>
28#include <asm/compat.h>
453423dc
CB
29#include "gaccess.h"
30#include "kvm-s390.h"
5786fffa 31#include "trace.h"
453423dc 32
6a3f95a6
TH
33/* Handle SCK (SET CLOCK) interception */
34static int handle_set_clock(struct kvm_vcpu *vcpu)
35{
36 struct kvm_vcpu *cpup;
37 s64 hostclk, val;
0e7a3f94 38 int i, rc;
6a3f95a6 39 u64 op2;
6a3f95a6
TH
40
41 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
42 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
43
44 op2 = kvm_s390_get_base_disp_s(vcpu);
45 if (op2 & 7) /* Operand must be on a doubleword boundary */
46 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
0e7a3f94
HC
47 rc = read_guest(vcpu, op2, &val, sizeof(val));
48 if (rc)
49 return kvm_s390_inject_prog_cond(vcpu, rc);
6a3f95a6
TH
50
51 if (store_tod_clock(&hostclk)) {
52 kvm_s390_set_psw_cc(vcpu, 3);
53 return 0;
54 }
55 val = (val - hostclk) & ~0x3fUL;
56
57 mutex_lock(&vcpu->kvm->lock);
58 kvm_for_each_vcpu(i, cpup, vcpu->kvm)
59 cpup->arch.sie_block->epoch = val;
60 mutex_unlock(&vcpu->kvm->lock);
61
62 kvm_s390_set_psw_cc(vcpu, 0);
63 return 0;
64}
65
453423dc
CB
66static int handle_set_prefix(struct kvm_vcpu *vcpu)
67{
453423dc 68 u64 operand2;
665170cb
HC
69 u32 address;
70 int rc;
453423dc
CB
71
72 vcpu->stat.instruction_spx++;
73
5087dfa6
TH
74 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
75 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
76
b1c571a5 77 operand2 = kvm_s390_get_base_disp_s(vcpu);
453423dc
CB
78
79 /* must be word boundary */
db4a29cb
HC
80 if (operand2 & 3)
81 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc
CB
82
83 /* get the value */
665170cb
HC
84 rc = read_guest(vcpu, operand2, &address, sizeof(address));
85 if (rc)
86 return kvm_s390_inject_prog_cond(vcpu, rc);
87
88 address &= 0x7fffe000u;
89
90 /*
91 * Make sure the new value is valid memory. We only need to check the
92 * first page, since address is 8k aligned and memory pieces are always
93 * at least 1MB aligned and have at least a size of 1MB.
94 */
95 if (kvm_is_error_gpa(vcpu->kvm, address))
db4a29cb 96 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
453423dc 97
8d26cf7b 98 kvm_s390_set_prefix(vcpu, address);
453423dc
CB
99
100 VCPU_EVENT(vcpu, 5, "setting prefix to %x", address);
5786fffa 101 trace_kvm_s390_handle_prefix(vcpu, 1, address);
453423dc
CB
102 return 0;
103}
104
105static int handle_store_prefix(struct kvm_vcpu *vcpu)
106{
453423dc
CB
107 u64 operand2;
108 u32 address;
f748f4a7 109 int rc;
453423dc
CB
110
111 vcpu->stat.instruction_stpx++;
b1c571a5 112
5087dfa6
TH
113 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
114 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
115
b1c571a5 116 operand2 = kvm_s390_get_base_disp_s(vcpu);
453423dc
CB
117
118 /* must be word boundary */
db4a29cb
HC
119 if (operand2 & 3)
120 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc
CB
121
122 address = vcpu->arch.sie_block->prefix;
123 address = address & 0x7fffe000u;
124
125 /* get the value */
f748f4a7
HC
126 rc = write_guest(vcpu, operand2, &address, sizeof(address));
127 if (rc)
128 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc
CB
129
130 VCPU_EVENT(vcpu, 5, "storing prefix to %x", address);
5786fffa 131 trace_kvm_s390_handle_prefix(vcpu, 0, address);
453423dc
CB
132 return 0;
133}
134
135static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
136{
8b96de0e
HC
137 u16 vcpu_id = vcpu->vcpu_id;
138 u64 ga;
139 int rc;
453423dc
CB
140
141 vcpu->stat.instruction_stap++;
b1c571a5 142
5087dfa6
TH
143 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
144 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
145
8b96de0e 146 ga = kvm_s390_get_base_disp_s(vcpu);
453423dc 147
8b96de0e 148 if (ga & 1)
db4a29cb 149 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 150
8b96de0e
HC
151 rc = write_guest(vcpu, ga, &vcpu_id, sizeof(vcpu_id));
152 if (rc)
153 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 154
8b96de0e
HC
155 VCPU_EVENT(vcpu, 5, "storing cpu address to %llx", ga);
156 trace_kvm_s390_handle_stap(vcpu, ga);
453423dc
CB
157 return 0;
158}
159
693ffc08
DD
160static void __skey_check_enable(struct kvm_vcpu *vcpu)
161{
162 if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)))
163 return;
164
165 s390_enable_skey();
166 trace_kvm_s390_skey_related_inst(vcpu);
167 vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE);
168}
169
170
453423dc
CB
171static int handle_skey(struct kvm_vcpu *vcpu)
172{
693ffc08
DD
173 __skey_check_enable(vcpu);
174
453423dc 175 vcpu->stat.instruction_storage_key++;
5087dfa6
TH
176
177 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
178 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
179
dfcf7dc6
MS
180 vcpu->arch.sie_block->gpsw.addr =
181 __rewind_psw(vcpu->arch.sie_block->gpsw, 4);
453423dc
CB
182 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
183 return 0;
184}
185
8a242234
HC
186static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
187{
188 psw_t *psw = &vcpu->arch.sie_block->gpsw;
189
190 vcpu->stat.instruction_ipte_interlock++;
191 if (psw_bits(*psw).p)
192 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
193 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
194 psw->addr = __rewind_psw(*psw, 4);
195 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
196 return 0;
197}
198
aca84241
TH
199static int handle_test_block(struct kvm_vcpu *vcpu)
200{
aca84241
TH
201 gpa_t addr;
202 int reg2;
203
204 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
205 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
206
207 kvm_s390_get_regs_rre(vcpu, NULL, &reg2);
208 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
209 addr = kvm_s390_real_to_abs(vcpu, addr);
210
ef23e779 211 if (kvm_is_error_gpa(vcpu->kvm, addr))
aca84241
TH
212 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
213 /*
214 * We don't expect errors on modern systems, and do not care
215 * about storage keys (yet), so let's just clear the page.
216 */
ef23e779 217 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
aca84241
TH
218 return -EFAULT;
219 kvm_s390_set_psw_cc(vcpu, 0);
220 vcpu->run->s.regs.gprs[0] = 0;
221 return 0;
222}
223
fa6b7fe9 224static int handle_tpi(struct kvm_vcpu *vcpu)
453423dc 225{
fa6b7fe9 226 struct kvm_s390_interrupt_info *inti;
4799b557
HC
227 unsigned long len;
228 u32 tpi_data[3];
229 int cc, rc;
7c959e82 230 u64 addr;
fa6b7fe9 231
4799b557 232 rc = 0;
fa6b7fe9 233 addr = kvm_s390_get_base_disp_s(vcpu);
db4a29cb
HC
234 if (addr & 3)
235 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
7c959e82 236 cc = 0;
f092669e 237 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
7c959e82
HC
238 if (!inti)
239 goto no_interrupt;
240 cc = 1;
4799b557
HC
241 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
242 tpi_data[1] = inti->io.io_int_parm;
243 tpi_data[2] = inti->io.io_int_word;
7c959e82
HC
244 if (addr) {
245 /*
246 * Store the two-word I/O interruption code into the
247 * provided area.
248 */
4799b557
HC
249 len = sizeof(tpi_data) - 4;
250 rc = write_guest(vcpu, addr, &tpi_data, len);
251 if (rc)
252 return kvm_s390_inject_prog_cond(vcpu, rc);
7c959e82
HC
253 } else {
254 /*
255 * Store the three-word I/O interruption code into
256 * the appropriate lowcore area.
257 */
4799b557
HC
258 len = sizeof(tpi_data);
259 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len))
260 rc = -EFAULT;
7c959e82 261 }
2f32d4ea
CH
262 /*
263 * If we encounter a problem storing the interruption code, the
264 * instruction is suppressed from the guest's view: reinject the
265 * interrupt.
266 */
267 if (!rc)
268 kfree(inti);
269 else
270 kvm_s390_reinject_io_int(vcpu->kvm, inti);
7c959e82 271no_interrupt:
fa6b7fe9 272 /* Set condition code and we're done. */
4799b557
HC
273 if (!rc)
274 kvm_s390_set_psw_cc(vcpu, cc);
275 return rc ? -EFAULT : 0;
453423dc
CB
276}
277
fa6b7fe9
CH
278static int handle_tsch(struct kvm_vcpu *vcpu)
279{
280 struct kvm_s390_interrupt_info *inti;
281
282 inti = kvm_s390_get_io_int(vcpu->kvm, 0,
283 vcpu->run->s.regs.gprs[1]);
284
285 /*
286 * Prepare exit to userspace.
287 * We indicate whether we dequeued a pending I/O interrupt
288 * so that userspace can re-inject it if the instruction gets
289 * a program check. While this may re-order the pending I/O
290 * interrupts, this is no problem since the priority is kept
291 * intact.
292 */
293 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
294 vcpu->run->s390_tsch.dequeued = !!inti;
295 if (inti) {
296 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
297 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
298 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
299 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
300 }
301 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
302 kfree(inti);
303 return -EREMOTE;
304}
305
306static int handle_io_inst(struct kvm_vcpu *vcpu)
307{
308 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
309
5087dfa6
TH
310 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
311 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
312
fa6b7fe9
CH
313 if (vcpu->kvm->arch.css_support) {
314 /*
315 * Most I/O instructions will be handled by userspace.
316 * Exceptions are tpi and the interrupt portion of tsch.
317 */
318 if (vcpu->arch.sie_block->ipa == 0xb236)
319 return handle_tpi(vcpu);
320 if (vcpu->arch.sie_block->ipa == 0xb235)
321 return handle_tsch(vcpu);
322 /* Handle in userspace. */
323 return -EOPNOTSUPP;
324 } else {
325 /*
b4a96015 326 * Set condition code 3 to stop the guest from issuing channel
fa6b7fe9
CH
327 * I/O instructions.
328 */
ea828ebf 329 kvm_s390_set_psw_cc(vcpu, 3);
fa6b7fe9
CH
330 return 0;
331 }
332}
333
453423dc
CB
334static int handle_stfl(struct kvm_vcpu *vcpu)
335{
453423dc
CB
336 int rc;
337
338 vcpu->stat.instruction_stfl++;
5087dfa6
TH
339
340 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
341 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
342
0f9701c6
HC
343 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list),
344 vfacilities, 4);
dc5008b9 345 if (rc)
0f9701c6 346 return rc;
78c4b59f
MM
347 VCPU_EVENT(vcpu, 5, "store facility list value %x",
348 *(unsigned int *) vfacilities);
349 trace_kvm_s390_handle_stfl(vcpu, *(unsigned int *) vfacilities);
453423dc
CB
350 return 0;
351}
352
48a3e950
CH
353static void handle_new_psw(struct kvm_vcpu *vcpu)
354{
355 /* Check whether the new psw is enabled for machine checks. */
356 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_MCHECK)
357 kvm_s390_deliver_pending_machine_checks(vcpu);
358}
359
360#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
361#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
d21683ea 362#define PSW_ADDR_24 0x0000000000ffffffUL
48a3e950
CH
363#define PSW_ADDR_31 0x000000007fffffffUL
364
3736b874
HC
365static int is_valid_psw(psw_t *psw) {
366 if (psw->mask & PSW_MASK_UNASSIGNED)
367 return 0;
368 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
369 if (psw->addr & ~PSW_ADDR_31)
370 return 0;
371 }
372 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
373 return 0;
374 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
375 return 0;
376 return 1;
377}
378
48a3e950
CH
379int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
380{
3736b874 381 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
48a3e950 382 psw_compat_t new_psw;
3736b874 383 u64 addr;
2d8bcaed 384 int rc;
48a3e950 385
3736b874 386 if (gpsw->mask & PSW_MASK_PSTATE)
208dd756
TH
387 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
388
48a3e950 389 addr = kvm_s390_get_base_disp_s(vcpu);
6fd0fcc9
HC
390 if (addr & 7)
391 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
2d8bcaed
HC
392
393 rc = read_guest(vcpu, addr, &new_psw, sizeof(new_psw));
394 if (rc)
395 return kvm_s390_inject_prog_cond(vcpu, rc);
6fd0fcc9
HC
396 if (!(new_psw.mask & PSW32_MASK_BASE))
397 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
3736b874
HC
398 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
399 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
400 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
401 if (!is_valid_psw(gpsw))
6fd0fcc9 402 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950 403 handle_new_psw(vcpu);
48a3e950
CH
404 return 0;
405}
406
407static int handle_lpswe(struct kvm_vcpu *vcpu)
408{
48a3e950 409 psw_t new_psw;
3736b874 410 u64 addr;
2d8bcaed 411 int rc;
48a3e950 412
5087dfa6
TH
413 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
414 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
415
48a3e950 416 addr = kvm_s390_get_base_disp_s(vcpu);
6fd0fcc9
HC
417 if (addr & 7)
418 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
2d8bcaed
HC
419 rc = read_guest(vcpu, addr, &new_psw, sizeof(new_psw));
420 if (rc)
421 return kvm_s390_inject_prog_cond(vcpu, rc);
3736b874
HC
422 vcpu->arch.sie_block->gpsw = new_psw;
423 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
6fd0fcc9 424 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950 425 handle_new_psw(vcpu);
48a3e950
CH
426 return 0;
427}
428
453423dc
CB
429static int handle_stidp(struct kvm_vcpu *vcpu)
430{
7d777d78 431 u64 stidp_data = vcpu->arch.stidp_data;
453423dc 432 u64 operand2;
7d777d78 433 int rc;
453423dc
CB
434
435 vcpu->stat.instruction_stidp++;
b1c571a5 436
5087dfa6
TH
437 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
438 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
439
b1c571a5 440 operand2 = kvm_s390_get_base_disp_s(vcpu);
453423dc 441
db4a29cb
HC
442 if (operand2 & 7)
443 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 444
7d777d78
HC
445 rc = write_guest(vcpu, operand2, &stidp_data, sizeof(stidp_data));
446 if (rc)
447 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc
CB
448
449 VCPU_EVENT(vcpu, 5, "%s", "store cpu id");
453423dc
CB
450 return 0;
451}
452
453static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
454{
453423dc
CB
455 int cpus = 0;
456 int n;
457
ff520a63 458 cpus = atomic_read(&vcpu->kvm->online_vcpus);
453423dc
CB
459
460 /* deal with other level 3 hypervisors */
caf757c6 461 if (stsi(mem, 3, 2, 2))
453423dc
CB
462 mem->count = 0;
463 if (mem->count < 8)
464 mem->count++;
465 for (n = mem->count - 1; n > 0 ; n--)
466 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
467
468 mem->vm[0].cpus_total = cpus;
469 mem->vm[0].cpus_configured = cpus;
470 mem->vm[0].cpus_standby = 0;
471 mem->vm[0].cpus_reserved = 0;
472 mem->vm[0].caf = 1000;
473 memcpy(mem->vm[0].name, "KVMguest", 8);
474 ASCEBC(mem->vm[0].name, 8);
475 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
476 ASCEBC(mem->vm[0].cpi, 16);
477}
478
479static int handle_stsi(struct kvm_vcpu *vcpu)
480{
5a32c1af
CB
481 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
482 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
483 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
c51f068c 484 unsigned long mem = 0;
453423dc 485 u64 operand2;
db4a29cb 486 int rc = 0;
453423dc
CB
487
488 vcpu->stat.instruction_stsi++;
489 VCPU_EVENT(vcpu, 4, "stsi: fc: %x sel1: %x sel2: %x", fc, sel1, sel2);
490
5087dfa6
TH
491 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
492 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
493
87d41fb4 494 if (fc > 3) {
ea828ebf 495 kvm_s390_set_psw_cc(vcpu, 3);
87d41fb4
TH
496 return 0;
497 }
453423dc 498
87d41fb4
TH
499 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
500 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
453423dc
CB
501 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
502
87d41fb4 503 if (fc == 0) {
5a32c1af 504 vcpu->run->s.regs.gprs[0] = 3 << 28;
ea828ebf 505 kvm_s390_set_psw_cc(vcpu, 0);
453423dc 506 return 0;
87d41fb4
TH
507 }
508
509 operand2 = kvm_s390_get_base_disp_s(vcpu);
510
511 if (operand2 & 0xfff)
512 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
513
514 switch (fc) {
453423dc
CB
515 case 1: /* same handling for 1 and 2 */
516 case 2:
517 mem = get_zeroed_page(GFP_KERNEL);
518 if (!mem)
c51f068c 519 goto out_no_data;
caf757c6 520 if (stsi((void *) mem, fc, sel1, sel2))
c51f068c 521 goto out_no_data;
453423dc
CB
522 break;
523 case 3:
524 if (sel1 != 2 || sel2 != 2)
c51f068c 525 goto out_no_data;
453423dc
CB
526 mem = get_zeroed_page(GFP_KERNEL);
527 if (!mem)
c51f068c 528 goto out_no_data;
453423dc
CB
529 handle_stsi_3_2_2(vcpu, (void *) mem);
530 break;
453423dc
CB
531 }
532
533 if (copy_to_guest_absolute(vcpu, operand2, (void *) mem, PAGE_SIZE)) {
db4a29cb 534 rc = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
c51f068c 535 goto out_exception;
453423dc 536 }
5786fffa 537 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
453423dc 538 free_page(mem);
ea828ebf 539 kvm_s390_set_psw_cc(vcpu, 0);
5a32c1af 540 vcpu->run->s.regs.gprs[0] = 0;
453423dc 541 return 0;
c51f068c 542out_no_data:
ea828ebf 543 kvm_s390_set_psw_cc(vcpu, 3);
c51f068c
HC
544out_exception:
545 free_page(mem);
db4a29cb 546 return rc;
453423dc
CB
547}
548
f379aae5 549static const intercept_handler_t b2_handlers[256] = {
453423dc 550 [0x02] = handle_stidp,
6a3f95a6 551 [0x04] = handle_set_clock,
453423dc
CB
552 [0x10] = handle_set_prefix,
553 [0x11] = handle_store_prefix,
554 [0x12] = handle_store_cpu_address,
8a242234 555 [0x21] = handle_ipte_interlock,
453423dc
CB
556 [0x29] = handle_skey,
557 [0x2a] = handle_skey,
558 [0x2b] = handle_skey,
aca84241 559 [0x2c] = handle_test_block,
f379aae5
CH
560 [0x30] = handle_io_inst,
561 [0x31] = handle_io_inst,
562 [0x32] = handle_io_inst,
563 [0x33] = handle_io_inst,
564 [0x34] = handle_io_inst,
565 [0x35] = handle_io_inst,
566 [0x36] = handle_io_inst,
567 [0x37] = handle_io_inst,
568 [0x38] = handle_io_inst,
569 [0x39] = handle_io_inst,
570 [0x3a] = handle_io_inst,
571 [0x3b] = handle_io_inst,
572 [0x3c] = handle_io_inst,
8a242234 573 [0x50] = handle_ipte_interlock,
f379aae5
CH
574 [0x5f] = handle_io_inst,
575 [0x74] = handle_io_inst,
576 [0x76] = handle_io_inst,
453423dc
CB
577 [0x7d] = handle_stsi,
578 [0xb1] = handle_stfl,
48a3e950 579 [0xb2] = handle_lpswe,
453423dc
CB
580};
581
70455a36 582int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
453423dc
CB
583{
584 intercept_handler_t handler;
585
70455a36 586 /*
5087dfa6
TH
587 * A lot of B2 instructions are priviledged. Here we check for
588 * the privileged ones, that we can handle in the kernel.
589 * Anything else goes to userspace.
590 */
f379aae5 591 handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH
592 if (handler)
593 return handler(vcpu);
594
b8e660b8 595 return -EOPNOTSUPP;
453423dc 596}
bb25b9ba 597
48a3e950
CH
598static int handle_epsw(struct kvm_vcpu *vcpu)
599{
600 int reg1, reg2;
601
aeb87c3c 602 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
48a3e950
CH
603
604 /* This basically extracts the mask half of the psw. */
843200e7 605 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
48a3e950
CH
606 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
607 if (reg2) {
843200e7 608 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
48a3e950 609 vcpu->run->s.regs.gprs[reg2] |=
843200e7 610 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
48a3e950
CH
611 }
612 return 0;
613}
614
69d0d3a3
CB
615#define PFMF_RESERVED 0xfffc0101UL
616#define PFMF_SK 0x00020000UL
617#define PFMF_CF 0x00010000UL
618#define PFMF_UI 0x00008000UL
619#define PFMF_FSC 0x00007000UL
620#define PFMF_NQ 0x00000800UL
621#define PFMF_MR 0x00000400UL
622#define PFMF_MC 0x00000200UL
623#define PFMF_KEY 0x000000feUL
624
625static int handle_pfmf(struct kvm_vcpu *vcpu)
626{
627 int reg1, reg2;
628 unsigned long start, end;
629
630 vcpu->stat.instruction_pfmf++;
631
632 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
633
634 if (!MACHINE_HAS_PFMF)
635 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
636
637 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 638 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
69d0d3a3
CB
639
640 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
641 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
642
643 /* Only provide non-quiescing support if the host supports it */
e769ece3 644 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && !test_facility(14))
69d0d3a3
CB
645 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
646
647 /* No support for conditional-SSKE */
648 if (vcpu->run->s.regs.gprs[reg1] & (PFMF_MR | PFMF_MC))
649 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
650
651 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
652 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
653 case 0x00000000:
654 end = (start + (1UL << 12)) & ~((1UL << 12) - 1);
655 break;
656 case 0x00001000:
657 end = (start + (1UL << 20)) & ~((1UL << 20) - 1);
658 break;
659 /* We dont support EDAT2
660 case 0x00002000:
661 end = (start + (1UL << 31)) & ~((1UL << 31) - 1);
662 break;*/
663 default:
664 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
665 }
666 while (start < end) {
667 unsigned long useraddr;
668
669 useraddr = gmap_translate(start, vcpu->arch.gmap);
670 if (IS_ERR((void *)useraddr))
671 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
672
673 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
674 if (clear_user((void __user *)useraddr, PAGE_SIZE))
675 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
676 }
677
678 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
693ffc08 679 __skey_check_enable(vcpu);
69d0d3a3
CB
680 if (set_guest_storage_key(current->mm, useraddr,
681 vcpu->run->s.regs.gprs[reg1] & PFMF_KEY,
682 vcpu->run->s.regs.gprs[reg1] & PFMF_NQ))
683 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
684 }
685
686 start += PAGE_SIZE;
687 }
688 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC)
689 vcpu->run->s.regs.gprs[reg2] = end;
690 return 0;
691}
692
b31288fa
KW
693static int handle_essa(struct kvm_vcpu *vcpu)
694{
695 /* entries expected to be 1FF */
696 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
697 unsigned long *cbrlo, cbrle;
698 struct gmap *gmap;
699 int i;
700
701 VCPU_EVENT(vcpu, 5, "cmma release %d pages", entries);
702 gmap = vcpu->arch.gmap;
703 vcpu->stat.instruction_essa++;
b31605c1 704 if (!kvm_s390_cmma_enabled(vcpu->kvm))
b31288fa
KW
705 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
706
707 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
708 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
709
710 if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6)
711 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
712
713 /* Rewind PSW to repeat the ESSA instruction */
714 vcpu->arch.sie_block->gpsw.addr =
715 __rewind_psw(vcpu->arch.sie_block->gpsw, 4);
716 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
717 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
718 down_read(&gmap->mm->mmap_sem);
719 for (i = 0; i < entries; ++i) {
720 cbrle = cbrlo[i];
721 if (unlikely(cbrle & ~PAGE_MASK || cbrle < 2 * PAGE_SIZE))
722 /* invalid entry */
723 break;
724 /* try to free backing */
725 __gmap_zap(cbrle, gmap);
726 }
727 up_read(&gmap->mm->mmap_sem);
728 if (i < entries)
729 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
730 return 0;
731}
732
48a3e950 733static const intercept_handler_t b9_handlers[256] = {
8a242234 734 [0x8a] = handle_ipte_interlock,
48a3e950 735 [0x8d] = handle_epsw,
8a242234
HC
736 [0x8e] = handle_ipte_interlock,
737 [0x8f] = handle_ipte_interlock,
b31288fa 738 [0xab] = handle_essa,
69d0d3a3 739 [0xaf] = handle_pfmf,
48a3e950
CH
740};
741
742int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
743{
744 intercept_handler_t handler;
745
746 /* This is handled just as for the B2 instructions. */
747 handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH
748 if (handler)
749 return handler(vcpu);
750
48a3e950
CH
751 return -EOPNOTSUPP;
752}
753
953ed88d
TH
754int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
755{
756 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
757 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
953ed88d
TH
758 u32 val = 0;
759 int reg, rc;
f987a3ee 760 u64 ga;
953ed88d
TH
761
762 vcpu->stat.instruction_lctl++;
763
764 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
765 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
766
f987a3ee 767 ga = kvm_s390_get_base_disp_rs(vcpu);
953ed88d 768
f987a3ee 769 if (ga & 3)
953ed88d
TH
770 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
771
f987a3ee
HC
772 VCPU_EVENT(vcpu, 5, "lctl r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
773 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
953ed88d
TH
774
775 reg = reg1;
776 do {
f987a3ee 777 rc = read_guest(vcpu, ga, &val, sizeof(val));
953ed88d 778 if (rc)
f987a3ee 779 return kvm_s390_inject_prog_cond(vcpu, rc);
953ed88d
TH
780 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
781 vcpu->arch.sie_block->gcr[reg] |= val;
f987a3ee 782 ga += 4;
953ed88d
TH
783 if (reg == reg3)
784 break;
785 reg = (reg + 1) % 16;
786 } while (1);
787
788 return 0;
789}
790
791static int handle_lctlg(struct kvm_vcpu *vcpu)
792{
793 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
794 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
f987a3ee 795 u64 ga, val;
953ed88d
TH
796 int reg, rc;
797
798 vcpu->stat.instruction_lctlg++;
799
800 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
801 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
802
f987a3ee 803 ga = kvm_s390_get_base_disp_rsy(vcpu);
953ed88d 804
f987a3ee 805 if (ga & 7)
953ed88d
TH
806 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
807
808 reg = reg1;
809
f987a3ee
HC
810 VCPU_EVENT(vcpu, 5, "lctlg r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
811 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
953ed88d
TH
812
813 do {
f987a3ee 814 rc = read_guest(vcpu, ga, &val, sizeof(val));
953ed88d 815 if (rc)
f987a3ee
HC
816 return kvm_s390_inject_prog_cond(vcpu, rc);
817 vcpu->arch.sie_block->gcr[reg] = val;
818 ga += 8;
953ed88d
TH
819 if (reg == reg3)
820 break;
821 reg = (reg + 1) % 16;
822 } while (1);
823
824 return 0;
825}
826
f379aae5 827static const intercept_handler_t eb_handlers[256] = {
953ed88d 828 [0x2f] = handle_lctlg,
f379aae5
CH
829};
830
953ed88d 831int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
f379aae5
CH
832{
833 intercept_handler_t handler;
834
f379aae5
CH
835 handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
836 if (handler)
837 return handler(vcpu);
838 return -EOPNOTSUPP;
839}
840
bb25b9ba
CB
841static int handle_tprot(struct kvm_vcpu *vcpu)
842{
b1c571a5 843 u64 address1, address2;
bb25b9ba 844 struct vm_area_struct *vma;
1eddb85f 845 unsigned long user_address;
bb25b9ba
CB
846
847 vcpu->stat.instruction_tprot++;
848
f9f6bbc6
TH
849 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
850 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
851
b1c571a5
CH
852 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2);
853
bb25b9ba
CB
854 /* we only handle the Linux memory detection case:
855 * access key == 0
856 * guest DAT == off
857 * everything else goes to userspace. */
858 if (address2 & 0xf0)
859 return -EOPNOTSUPP;
860 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
861 return -EOPNOTSUPP;
862
bb25b9ba 863 down_read(&current->mm->mmap_sem);
59a1fa2d
HC
864 user_address = __gmap_translate(address1, vcpu->arch.gmap);
865 if (IS_ERR_VALUE(user_address))
866 goto out_inject;
1eddb85f 867 vma = find_vma(current->mm, user_address);
59a1fa2d
HC
868 if (!vma)
869 goto out_inject;
bb25b9ba
CB
870 vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
871 if (!(vma->vm_flags & VM_WRITE) && (vma->vm_flags & VM_READ))
872 vcpu->arch.sie_block->gpsw.mask |= (1ul << 44);
873 if (!(vma->vm_flags & VM_WRITE) && !(vma->vm_flags & VM_READ))
874 vcpu->arch.sie_block->gpsw.mask |= (2ul << 44);
875
876 up_read(&current->mm->mmap_sem);
877 return 0;
59a1fa2d
HC
878
879out_inject:
880 up_read(&current->mm->mmap_sem);
881 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
bb25b9ba
CB
882}
883
884int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
885{
886 /* For e5xx... instructions we only handle TPROT */
887 if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
888 return handle_tprot(vcpu);
889 return -EOPNOTSUPP;
890}
891
8c3f61e2
CH
892static int handle_sckpf(struct kvm_vcpu *vcpu)
893{
894 u32 value;
895
896 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 897 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
8c3f61e2
CH
898
899 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
900 return kvm_s390_inject_program_int(vcpu,
901 PGM_SPECIFICATION);
902
903 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
904 vcpu->arch.sie_block->todpr = value;
905
906 return 0;
907}
908
77975357 909static const intercept_handler_t x01_handlers[256] = {
8c3f61e2
CH
910 [0x07] = handle_sckpf,
911};
912
913int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
914{
915 intercept_handler_t handler;
916
917 handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
918 if (handler)
919 return handler(vcpu);
920 return -EOPNOTSUPP;
921}
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