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KVM: s390: improve debug feature usage
[deliverable/linux.git] / arch / s390 / kvm / sigp.c
CommitLineData
5288fbf0 1/*
a53c8fab 2 * handling interprocessor communication
5288fbf0 3 *
b13d3580 4 * Copyright IBM Corp. 2008, 2013
5288fbf0
CB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Carsten Otte <cotte@de.ibm.com>
11 * Christian Borntraeger <borntraeger@de.ibm.com>
9ace903d 12 * Christian Ehrhardt <ehrhardt@de.ibm.com>
5288fbf0
CB		 13 */
14
15#include <linux/kvm.h>
16#include <linux/kvm_host.h>
5a0e3ad6 17#include <linux/slab.h>
a9ae32c3 18#include <asm/sigp.h>
5288fbf0
CB		 19#include "gaccess.h"
20#include "kvm-s390.h"
5786fffa 21#include "trace.h"
5288fbf0 22
3d95c7d2 23static int __sigp_sense(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu,
5a32c1af 24 u64 *reg)
5288fbf0 25{
1ee0bc55 26 struct kvm_s390_local_interrupt *li;
1ee0bc55 27 int cpuflags;
5288fbf0 28 int rc;
ea5f4969 29 int ext_call_pending;
5288fbf0 30
1ee0bc55
JF		 31 li = &dst_vcpu->arch.local_int;
32
33 cpuflags = atomic_read(li->cpuflags);
ea5f4969
DH		 34 ext_call_pending = kvm_s390_ext_call_pending(dst_vcpu);
35 if (!(cpuflags & CPUSTAT_STOPPED) && !ext_call_pending)
21b26c08
CH		 36 rc = SIGP_CC_ORDER_CODE_ACCEPTED;
37 else {
5288fbf0 38 *reg &= 0xffffffff00000000UL;
ea5f4969 39 if (ext_call_pending)
21b26c08 40 *reg |= SIGP_STATUS_EXT_CALL_PENDING;
1ee0bc55 41 if (cpuflags & CPUSTAT_STOPPED)
21b26c08 42 *reg |= SIGP_STATUS_STOPPED;
ea1918dd 43 rc = SIGP_CC_STATUS_STORED;
5288fbf0 44 }
5288fbf0 45
3d95c7d2
DH		 46 VCPU_EVENT(vcpu, 4, "sensed status of cpu %x rc %x", dst_vcpu->vcpu_id,
47 rc);
5288fbf0
CB		 48 return rc;
49}
50
07b03035
DH		 51static int __inject_sigp_emergency(struct kvm_vcpu *vcpu,
52 struct kvm_vcpu *dst_vcpu)
5288fbf0 53{
383d0b05 54 struct kvm_s390_irq irq = {
22ff4a33 55 .type = KVM_S390_INT_EMERGENCY,
383d0b05 56 .u.emerg.code = vcpu->vcpu_id,
22ff4a33 57 };
22ff4a33 58 int rc = 0;
5288fbf0 59
383d0b05 60 rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
22ff4a33 61 if (!rc)
3d95c7d2
DH		 62 VCPU_EVENT(vcpu, 4, "sent sigp emerg to cpu %x",
63 dst_vcpu->vcpu_id);
5288fbf0 64
22ff4a33 65 return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
7697e71f
CE		 66}
67
07b03035
DH		 68static int __sigp_emergency(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu)
69{
70 return __inject_sigp_emergency(vcpu, dst_vcpu);
71}
72
3d95c7d2
DH		 73static int __sigp_conditional_emergency(struct kvm_vcpu *vcpu,
74 struct kvm_vcpu *dst_vcpu,
b13d3580
TH		 75 u16 asn, u64 *reg)
76{
b13d3580
TH		 77 const u64 psw_int_mask = PSW_MASK_IO | PSW_MASK_EXT;
78 u16 p_asn, s_asn;
79 psw_t *psw;
80 u32 flags;
81
b13d3580
TH		 82 flags = atomic_read(&dst_vcpu->arch.sie_block->cpuflags);
83 psw = &dst_vcpu->arch.sie_block->gpsw;
84 p_asn = dst_vcpu->arch.sie_block->gcr[4] & 0xffff; /* Primary ASN */
85 s_asn = dst_vcpu->arch.sie_block->gcr[3] & 0xffff; /* Secondary ASN */
86
07b03035 87 /* Inject the emergency signal? */
b13d3580
TH		 88 if (!(flags & CPUSTAT_STOPPED)
89 || (psw->mask & psw_int_mask) != psw_int_mask
90 || ((flags & CPUSTAT_WAIT) && psw->addr != 0)
91 || (!(flags & CPUSTAT_WAIT) && (asn == p_asn || asn == s_asn))) {
07b03035 92 return __inject_sigp_emergency(vcpu, dst_vcpu);
b13d3580
TH		 93 } else {
94 *reg &= 0xffffffff00000000UL;
95 *reg |= SIGP_STATUS_INCORRECT_STATE;
96 return SIGP_CC_STATUS_STORED;
97 }
98}
99
3d95c7d2 100static int __sigp_external_call(struct kvm_vcpu *vcpu,
ea5f4969 101 struct kvm_vcpu *dst_vcpu, u64 *reg)
7697e71f 102{
383d0b05 103 struct kvm_s390_irq irq = {
22ff4a33 104 .type = KVM_S390_INT_EXTERNAL_CALL,
383d0b05 105 .u.extcall.code = vcpu->vcpu_id,
22ff4a33 106 };
22ff4a33 107 int rc;
7697e71f 108
383d0b05 109 rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
ea5f4969
DH		 110 if (rc == -EBUSY) {
111 *reg &= 0xffffffff00000000UL;
112 *reg |= SIGP_STATUS_EXT_CALL_PENDING;
113 return SIGP_CC_STATUS_STORED;
114 } else if (rc == 0) {
3d95c7d2
DH		 115 VCPU_EVENT(vcpu, 4, "sent sigp ext call to cpu %x",
116 dst_vcpu->vcpu_id);
ea5f4969 117 }
7697e71f 118
22ff4a33 119 return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
5288fbf0
CB		 120}
121
a6cc3108 122static int __sigp_stop(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu)
9ace903d 123{
6cddd432
DH		 124 struct kvm_s390_irq irq = {
125 .type = KVM_S390_SIGP_STOP,
126 };
9ace903d
CE		 127 int rc;
128
6cddd432
DH		 129 rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
130 if (rc == -EBUSY)
131 rc = SIGP_CC_BUSY;
132 else if (rc == 0)
133 VCPU_EVENT(vcpu, 4, "sent sigp stop to cpu %x",
134 dst_vcpu->vcpu_id);
e879892c 135
a6cc3108
DH		 136 return rc;
137}
138
139static int __sigp_stop_and_store_status(struct kvm_vcpu *vcpu,
140 struct kvm_vcpu *dst_vcpu, u64 *reg)
141{
6cddd432
DH		 142 struct kvm_s390_irq irq = {
143 .type = KVM_S390_SIGP_STOP,
144 .u.stop.flags = KVM_S390_STOP_FLAG_STORE_STATUS,
145 };
a6cc3108
DH		 146 int rc;
147
6cddd432
DH		 148 rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
149 if (rc == -EBUSY)
150 rc = SIGP_CC_BUSY;
151 else if (rc == 0)
152 VCPU_EVENT(vcpu, 4, "sent sigp stop and store status to cpu %x",
153 dst_vcpu->vcpu_id);
e879892c 154
5288fbf0
CB		 155 return rc;
156}
157
158static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter)
159{
160 int rc;
3c038e6b
DD		 161 unsigned int i;
162 struct kvm_vcpu *v;
5288fbf0
CB		 163
164 switch (parameter & 0xff) {
165 case 0:
ea1918dd 166 rc = SIGP_CC_NOT_OPERATIONAL;
5288fbf0
CB		 167 break;
168 case 1:
169 case 2:
3c038e6b
DD		 170 kvm_for_each_vcpu(i, v, vcpu->kvm) {
171 v->arch.pfault_token = KVM_S390_PFAULT_TOKEN_INVALID;
172 kvm_clear_async_pf_completion_queue(v);
173 }
174
ea1918dd 175 rc = SIGP_CC_ORDER_CODE_ACCEPTED;
5288fbf0
CB		 176 break;
177 default:
b8e660b8 178 rc = -EOPNOTSUPP;
5288fbf0
CB		 179 }
180 return rc;
181}
182
3d95c7d2
DH		 183static int __sigp_set_prefix(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu,
184 u32 address, u64 *reg)
5288fbf0 185{
a3a9c59a
DH		 186 struct kvm_s390_irq irq = {
187 .type = KVM_S390_SIGP_SET_PREFIX,
188 .u.prefix.address = address & 0x7fffe000u,
189 };
5288fbf0 190 int rc;
5288fbf0 191
665170cb
HC		 192 /*
193 * Make sure the new value is valid memory. We only need to check the
194 * first page, since address is 8k aligned and memory pieces are always
195 * at least 1MB aligned and have at least a size of 1MB.
196 */
a3a9c59a 197 if (kvm_is_error_gpa(vcpu->kvm, irq.u.prefix.address)) {
0744426e 198 *reg &= 0xffffffff00000000UL;
a9ae32c3 199 *reg |= SIGP_STATUS_INVALID_PARAMETER;
ea1918dd 200 return SIGP_CC_STATUS_STORED;
5288fbf0
CB		 201 }
202
a3a9c59a
DH		 203 rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
204 if (rc == -EBUSY) {
0744426e
HC		 205 *reg &= 0xffffffff00000000UL;
206 *reg |= SIGP_STATUS_INCORRECT_STATE;
a3a9c59a 207 return SIGP_CC_STATUS_STORED;
5288fbf0
CB		 208 }
209
5288fbf0
CB		 210 return rc;
211}
212
3d95c7d2
DH		 213static int __sigp_store_status_at_addr(struct kvm_vcpu *vcpu,
214 struct kvm_vcpu *dst_vcpu,
215 u32 addr, u64 *reg)
00e9e435 216{
00e9e435
TH		 217 int flags;
218 int rc;
219
00e9e435 220 flags = atomic_read(dst_vcpu->arch.local_int.cpuflags);
00e9e435
TH		 221 if (!(flags & CPUSTAT_STOPPED)) {
222 *reg &= 0xffffffff00000000UL;
223 *reg |= SIGP_STATUS_INCORRECT_STATE;
224 return SIGP_CC_STATUS_STORED;
225 }
226
227 addr &= 0x7ffffe00;
228 rc = kvm_s390_store_status_unloaded(dst_vcpu, addr);
229 if (rc == -EFAULT) {
230 *reg &= 0xffffffff00000000UL;
231 *reg |= SIGP_STATUS_INVALID_PARAMETER;
232 rc = SIGP_CC_STATUS_STORED;
233 }
234 return rc;
235}
236
3d95c7d2
DH		 237static int __sigp_sense_running(struct kvm_vcpu *vcpu,
238 struct kvm_vcpu *dst_vcpu, u64 *reg)
bd59d3a4 239{
1ee0bc55 240 struct kvm_s390_local_interrupt *li;
bd59d3a4 241 int rc;
bd59d3a4 242
1ee0bc55
JF		 243 li = &dst_vcpu->arch.local_int;
244 if (atomic_read(li->cpuflags) & CPUSTAT_RUNNING) {
245 /* running */
246 rc = SIGP_CC_ORDER_CODE_ACCEPTED;
247 } else {
248 /* not running */
249 *reg &= 0xffffffff00000000UL;
250 *reg |= SIGP_STATUS_NOT_RUNNING;
251 rc = SIGP_CC_STATUS_STORED;
bd59d3a4 252 }
bd59d3a4 253
3d95c7d2
DH		 254 VCPU_EVENT(vcpu, 4, "sensed running status of cpu %x rc %x",
255 dst_vcpu->vcpu_id, rc);
bd59d3a4
CH		 256
257 return rc;
258}
259
b8983830
DH		 260static int __prepare_sigp_re_start(struct kvm_vcpu *vcpu,
261 struct kvm_vcpu *dst_vcpu, u8 order_code)
151104a7 262{
3d95c7d2 263 struct kvm_s390_local_interrupt *li = &dst_vcpu->arch.local_int;
b8983830
DH		 264 /* handle (RE)START in user space */
265 int rc = -EOPNOTSUPP;
151104a7 266
6cddd432 267 /* make sure we don't race with STOP irq injection */
4ae3c081 268 spin_lock(&li->lock);
6cddd432 269 if (kvm_s390_is_stop_irq_pending(dst_vcpu))
ea1918dd 270 rc = SIGP_CC_BUSY;
4ae3c081 271 spin_unlock(&li->lock);
1ee0bc55 272
151104a7
JF		 273 return rc;
274}
275
b8983830
DH		 276static int __prepare_sigp_cpu_reset(struct kvm_vcpu *vcpu,
277 struct kvm_vcpu *dst_vcpu, u8 order_code)
278{
279 /* handle (INITIAL) CPU RESET in user space */
280 return -EOPNOTSUPP;
281}
282
283static int __prepare_sigp_unknown(struct kvm_vcpu *vcpu,
284 struct kvm_vcpu *dst_vcpu)
285{
286 /* handle unknown orders in user space */
287 return -EOPNOTSUPP;
288}
289
3526a66b
DH		 290static int handle_sigp_dst(struct kvm_vcpu *vcpu, u8 order_code,
291 u16 cpu_addr, u32 parameter, u64 *status_reg)
5288fbf0 292{
5288fbf0 293 int rc;
3d95c7d2
DH		 294 struct kvm_vcpu *dst_vcpu;
295
296 if (cpu_addr >= KVM_MAX_VCPUS)
297 return SIGP_CC_NOT_OPERATIONAL;
298
299 dst_vcpu = kvm_get_vcpu(vcpu->kvm, cpu_addr);
300 if (!dst_vcpu)
301 return SIGP_CC_NOT_OPERATIONAL;
5288fbf0 302
5288fbf0
CB		 303 switch (order_code) {
304 case SIGP_SENSE:
305 vcpu->stat.instruction_sigp_sense++;
3d95c7d2 306 rc = __sigp_sense(vcpu, dst_vcpu, status_reg);
5288fbf0 307 break;
7697e71f
CE		 308 case SIGP_EXTERNAL_CALL:
309 vcpu->stat.instruction_sigp_external_call++;
ea5f4969 310 rc = __sigp_external_call(vcpu, dst_vcpu, status_reg);
7697e71f 311 break;
a9ae32c3 312 case SIGP_EMERGENCY_SIGNAL:
5288fbf0 313 vcpu->stat.instruction_sigp_emergency++;
3d95c7d2 314 rc = __sigp_emergency(vcpu, dst_vcpu);
5288fbf0
CB		 315 break;
316 case SIGP_STOP:
317 vcpu->stat.instruction_sigp_stop++;
a6cc3108 318 rc = __sigp_stop(vcpu, dst_vcpu);
5288fbf0 319 break;
a9ae32c3 320 case SIGP_STOP_AND_STORE_STATUS:
42cb0c9f 321 vcpu->stat.instruction_sigp_stop_store_status++;
a6cc3108 322 rc = __sigp_stop_and_store_status(vcpu, dst_vcpu, status_reg);
5288fbf0 323 break;
00e9e435 324 case SIGP_STORE_STATUS_AT_ADDRESS:
42cb0c9f 325 vcpu->stat.instruction_sigp_store_status++;
3d95c7d2 326 rc = __sigp_store_status_at_addr(vcpu, dst_vcpu, parameter,
3526a66b 327 status_reg);
5288fbf0
CB		 328 break;
329 case SIGP_SET_PREFIX:
330 vcpu->stat.instruction_sigp_prefix++;
3d95c7d2 331 rc = __sigp_set_prefix(vcpu, dst_vcpu, parameter, status_reg);
5288fbf0 332 break;
b13d3580 333 case SIGP_COND_EMERGENCY_SIGNAL:
42cb0c9f 334 vcpu->stat.instruction_sigp_cond_emergency++;
3d95c7d2 335 rc = __sigp_conditional_emergency(vcpu, dst_vcpu, parameter,
3526a66b 336 status_reg);
b13d3580 337 break;
bd59d3a4
CH		 338 case SIGP_SENSE_RUNNING:
339 vcpu->stat.instruction_sigp_sense_running++;
3d95c7d2 340 rc = __sigp_sense_running(vcpu, dst_vcpu, status_reg);
bd59d3a4 341 break;
58bc33b2 342 case SIGP_START:
42cb0c9f 343 vcpu->stat.instruction_sigp_start++;
b8983830 344 rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
58bc33b2 345 break;
5288fbf0
CB		 346 case SIGP_RESTART:
347 vcpu->stat.instruction_sigp_restart++;
b8983830
DH		 348 rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
349 break;
350 case SIGP_INITIAL_CPU_RESET:
42cb0c9f 351 vcpu->stat.instruction_sigp_init_cpu_reset++;
b8983830
DH		 352 rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
353 break;
354 case SIGP_CPU_RESET:
42cb0c9f 355 vcpu->stat.instruction_sigp_cpu_reset++;
b8983830 356 rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
cc92d6de 357 break;
5288fbf0 358 default:
42cb0c9f 359 vcpu->stat.instruction_sigp_unknown++;
b8983830 360 rc = __prepare_sigp_unknown(vcpu, dst_vcpu);
3526a66b
DH		 361 }
362
b8983830
DH		 363 if (rc == -EOPNOTSUPP)
364 VCPU_EVENT(vcpu, 4,
365 "sigp order %u -> cpu %x: handled in user space",
366 order_code, dst_vcpu->vcpu_id);
367
3526a66b
DH		 368 return rc;
369}
370
2444b352
DH		 371static int handle_sigp_order_in_user_space(struct kvm_vcpu *vcpu, u8 order_code)
372{
373 if (!vcpu->kvm->arch.user_sigp)
374 return 0;
375
376 switch (order_code) {
377 case SIGP_SENSE:
378 case SIGP_EXTERNAL_CALL:
379 case SIGP_EMERGENCY_SIGNAL:
380 case SIGP_COND_EMERGENCY_SIGNAL:
381 case SIGP_SENSE_RUNNING:
382 return 0;
383 /* update counters as we're directly dropping to user space */
384 case SIGP_STOP:
385 vcpu->stat.instruction_sigp_stop++;
386 break;
387 case SIGP_STOP_AND_STORE_STATUS:
388 vcpu->stat.instruction_sigp_stop_store_status++;
389 break;
390 case SIGP_STORE_STATUS_AT_ADDRESS:
391 vcpu->stat.instruction_sigp_store_status++;
392 break;
cd7b4b61
EF		 393 case SIGP_STORE_ADDITIONAL_STATUS:
394 vcpu->stat.instruction_sigp_store_adtl_status++;
395 break;
2444b352
DH		 396 case SIGP_SET_PREFIX:
397 vcpu->stat.instruction_sigp_prefix++;
398 break;
399 case SIGP_START:
400 vcpu->stat.instruction_sigp_start++;
401 break;
402 case SIGP_RESTART:
403 vcpu->stat.instruction_sigp_restart++;
404 break;
405 case SIGP_INITIAL_CPU_RESET:
406 vcpu->stat.instruction_sigp_init_cpu_reset++;
407 break;
408 case SIGP_CPU_RESET:
409 vcpu->stat.instruction_sigp_cpu_reset++;
410 break;
411 default:
412 vcpu->stat.instruction_sigp_unknown++;
413 }
414
415 VCPU_EVENT(vcpu, 4, "sigp order %u: completely handled in user space",
416 order_code);
417
418 return 1;
419}
420
3526a66b
DH		 421int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
422{
423 int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
424 int r3 = vcpu->arch.sie_block->ipa & 0x000f;
425 u32 parameter;
426 u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
427 u8 order_code;
428 int rc;
429
430 /* sigp in userspace can exit */
431 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
432 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
433
8ae04b8f 434 order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
2444b352
DH		 435 if (handle_sigp_order_in_user_space(vcpu, order_code))
436 return -EOPNOTSUPP;
3526a66b
DH		 437
438 if (r1 % 2)
439 parameter = vcpu->run->s.regs.gprs[r1];
440 else
441 parameter = vcpu->run->s.regs.gprs[r1 + 1];
442
443 trace_kvm_s390_handle_sigp(vcpu, order_code, cpu_addr, parameter);
444 switch (order_code) {
445 case SIGP_SET_ARCHITECTURE:
446 vcpu->stat.instruction_sigp_arch++;
447 rc = __sigp_set_arch(vcpu, parameter);
448 break;
449 default:
450 rc = handle_sigp_dst(vcpu, order_code, cpu_addr,
451 parameter,
452 &vcpu->run->s.regs.gprs[r1]);
5288fbf0
CB		 453 }
454
455 if (rc < 0)
456 return rc;
457
949c007a 458 kvm_s390_set_psw_cc(vcpu, rc);
5288fbf0
CB		 459 return 0;
460}
4953919f
DH		 461
462/*
463 * Handle SIGP partial execution interception.
464 *
465 * This interception will occur at the source cpu when a source cpu sends an
466 * external call to a target cpu and the target cpu has the WAIT bit set in
467 * its cpuflags. Interception will occurr after the interrupt indicator bits at
468 * the target cpu have been set. All error cases will lead to instruction
469 * interception, therefore nothing is to be checked or prepared.
470 */
471int kvm_s390_handle_sigp_pei(struct kvm_vcpu *vcpu)
472{
473 int r3 = vcpu->arch.sie_block->ipa & 0x000f;
474 u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
475 struct kvm_vcpu *dest_vcpu;
8ae04b8f 476 u8 order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
4953919f
DH		 477
478 trace_kvm_s390_handle_sigp_pei(vcpu, order_code, cpu_addr);
479
480 if (order_code == SIGP_EXTERNAL_CALL) {
481 dest_vcpu = kvm_get_vcpu(vcpu->kvm, cpu_addr);
482 BUG_ON(dest_vcpu == NULL);
483
0e9c85a5 484 kvm_s390_vcpu_wakeup(dest_vcpu);
4953919f
DH		 485 kvm_s390_set_psw_cc(vcpu, SIGP_CC_ORDER_CODE_ACCEPTED);
486 return 0;
487 }
488
489 return -EOPNOTSUPP;
490}
Linux kernel - Deliverables
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