[deliverable/linux.git] / arch / s390 / mm / pageattr.c

/*
 * Copyright IBM Corp. 2011
 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
 */
#include <linux/hugetlb.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <asm/cacheflush.h>
#include <asm/facility.h>
#include <asm/pgtable.h>
#include <asm/page.h>

#if PAGE_DEFAULT_KEY
static inline unsigned long sske_frame(unsigned long addr, unsigned char skey)
{
	asm volatile(".insn rrf,0xb22b0000,%[skey],%[addr],9,0"
		     : [addr] "+a" (addr) : [skey] "d" (skey));
	return addr;
}

void __storage_key_init_range(unsigned long start, unsigned long end)
{
	unsigned long boundary, size;

	while (start < end) {
		if (MACHINE_HAS_EDAT1) {
			/* set storage keys for a 1MB frame */
			size = 1UL << 20;
			boundary = (start + size) & ~(size - 1);
			if (boundary <= end) {
				do {
					start = sske_frame(start, PAGE_DEFAULT_KEY);
				} while (start < boundary);
				continue;
			}
		}
		page_set_storage_key(start, PAGE_DEFAULT_KEY, 0);
		start += PAGE_SIZE;
	}
}
#endif

static pte_t *walk_page_table(unsigned long addr)
{
	pgd_t *pgdp;
	pud_t *pudp;
	pmd_t *pmdp;
	pte_t *ptep;

	pgdp = pgd_offset_k(addr);
	if (pgd_none(*pgdp))
		return NULL;
	pudp = pud_offset(pgdp, addr);
	if (pud_none(*pudp) || pud_large(*pudp))
		return NULL;
	pmdp = pmd_offset(pudp, addr);
	if (pmd_none(*pmdp) || pmd_large(*pmdp))
		return NULL;
	ptep = pte_offset_kernel(pmdp, addr);
	if (pte_none(*ptep))
		return NULL;
	return ptep;
}

static void change_page_attr(unsigned long addr, int numpages,
			     pte_t (*set) (pte_t))
{
	pte_t *ptep;
	int i;

	for (i = 0; i < numpages; i++) {
		ptep = walk_page_table(addr);
		if (WARN_ON_ONCE(!ptep))
			break;
		*ptep = set(*ptep);
		addr += PAGE_SIZE;
	}
	__tlb_flush_kernel();
}

int set_memory_ro(unsigned long addr, int numpages)
{
	change_page_attr(addr, numpages, pte_wrprotect);
	return 0;
}

int set_memory_rw(unsigned long addr, int numpages)
{
	change_page_attr(addr, numpages, pte_mkwrite);
	return 0;
}

/* not possible */
int set_memory_nx(unsigned long addr, int numpages)
{
	return 0;
}

int set_memory_x(unsigned long addr, int numpages)
{
	return 0;
}

#ifdef CONFIG_DEBUG_PAGEALLOC

static void ipte_range(pte_t *pte, unsigned long address, int nr)
{
	int i;

	if (test_facility(13)) {
		__ptep_ipte_range(address, nr - 1, pte);
		return;
	}
	for (i = 0; i < nr; i++) {
		__ptep_ipte(address, pte);
		address += PAGE_SIZE;
		pte++;
	}
}

void __kernel_map_pages(struct page *page, int numpages, int enable)
{
	unsigned long address;
	int nr, i, j;
	pgd_t *pgd;
	pud_t *pud;
	pmd_t *pmd;
	pte_t *pte;

	for (i = 0; i < numpages;) {
		address = page_to_phys(page + i);
		pgd = pgd_offset_k(address);
		pud = pud_offset(pgd, address);
		pmd = pmd_offset(pud, address);
		pte = pte_offset_kernel(pmd, address);
		nr = (unsigned long)pte >> ilog2(sizeof(long));
		nr = PTRS_PER_PTE - (nr & (PTRS_PER_PTE - 1));
		nr = min(numpages - i, nr);
		if (enable) {
			for (j = 0; j < nr; j++) {
				pte_val(*pte) = __pa(address);
				address += PAGE_SIZE;
				pte++;
			}
		} else {
			ipte_range(pte, address, nr);
		}
		i += nr;
	}
}

#ifdef CONFIG_HIBERNATION
bool kernel_page_present(struct page *page)
{
	unsigned long addr;
	int cc;

	addr = page_to_phys(page);
	asm volatile(
		"	lra	%1,0(%1)\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (cc), "+a" (addr) : : "cc");
	return cc == 0;
}
#endif /* CONFIG_HIBERNATION */

#endif /* CONFIG_DEBUG_PAGEALLOC */
Commit	Line	Data
305b1523 JG	1	/*
	2	* Copyright IBM Corp. 2011
	3	* Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
	4	*/
6b70a920	5	#include <linux/hugetlb.h>
305b1523 JG	6	#include <linux/module.h>
305b1523 JG	7	#include <linux/mm.h>
638ad34a	8	#include <asm/cacheflush.h>
cfb0b241	9	#include <asm/facility.h>
305b1523	10	#include <asm/pgtable.h>
6b70a920 HC	11	#include <asm/page.h>
6b70a920 HC	12
127c1fef	13	#if PAGE_DEFAULT_KEY
f7f8d7e5 HC	14	static inline unsigned long sske_frame(unsigned long addr, unsigned char skey)
	15	{
	16	asm volatile(".insn rrf,0xb22b0000,%[skey],%[addr],9,0"
	17	: [addr] "+a" (addr) : [skey] "d" (skey));
	18	return addr;
	19	}
	20
127c1fef	21	void __storage_key_init_range(unsigned long start, unsigned long end)
6b70a920	22	{
f7f8d7e5	23	unsigned long boundary, size;
6b70a920 HC	24
6b70a920 HC	25	while (start < end) {
6b70a920 HC	26	if (MACHINE_HAS_EDAT1) {
6b70a920 HC	27	/* set storage keys for a 1MB frame */
6b70a920 HC	28	size = 1UL << 20;
	29	boundary = (start + size) & ~(size - 1);
	30	if (boundary <= end) {
	31	do {
f7f8d7e5	32	start = sske_frame(start, PAGE_DEFAULT_KEY);
6b70a920 HC	33	} while (start < boundary);
	34	continue;
	35	}
	36	}
	37	page_set_storage_key(start, PAGE_DEFAULT_KEY, 0);
	38	start += PAGE_SIZE;
	39	}
	40	}
127c1fef	41	#endif
305b1523	42
5b1ba9e3 HC	43	static pte_t *walk_page_table(unsigned long addr)
	44	{
	45	pgd_t *pgdp;
	46	pud_t *pudp;
	47	pmd_t *pmdp;
	48	pte_t *ptep;
	49
	50	pgdp = pgd_offset_k(addr);
	51	if (pgd_none(*pgdp))
	52	return NULL;
	53	pudp = pud_offset(pgdp, addr);
18da2369	54	if (pud_none(pudp) \|\| pud_large(pudp))
5b1ba9e3 HC	55	return NULL;
	56	pmdp = pmd_offset(pudp, addr);
	57	if (pmd_none(pmdp) \|\| pmd_large(pmdp))
	58	return NULL;
	59	ptep = pte_offset_kernel(pmdp, addr);
	60	if (pte_none(*ptep))
	61	return NULL;
	62	return ptep;
	63	}
	64
305b1523 JG	65	static void change_page_attr(unsigned long addr, int numpages,
	66	pte_t (*set) (pte_t))
	67	{
007ccec5	68	pte_t *ptep;
305b1523 JG	69	int i;
	70
	71	for (i = 0; i < numpages; i++) {
5b1ba9e3 HC	72	ptep = walk_page_table(addr);
	73	if (WARN_ON_ONCE(!ptep))
	74	break;
007ccec5	75	ptep = set(ptep);
e4c031b4	76	addr += PAGE_SIZE;
305b1523	77	}
007ccec5	78	__tlb_flush_kernel();
305b1523 JG	79	}
	80
	81	int set_memory_ro(unsigned long addr, int numpages)
	82	{
	83	change_page_attr(addr, numpages, pte_wrprotect);
	84	return 0;
	85	}
305b1523 JG	86
	87	int set_memory_rw(unsigned long addr, int numpages)
	88	{
	89	change_page_attr(addr, numpages, pte_mkwrite);
	90	return 0;
	91	}
305b1523 JG	92
	93	/* not possible */
	94	int set_memory_nx(unsigned long addr, int numpages)
	95	{
	96	return 0;
	97	}
448694a1 JG	98
	99	int set_memory_x(unsigned long addr, int numpages)
	100	{
	101	return 0;
	102	}
0a4ccc99 HC	103
0a4ccc99 HC	104	#ifdef CONFIG_DEBUG_PAGEALLOC
cfb0b241 HC	105
	106	static void ipte_range(pte_t *pte, unsigned long address, int nr)
	107	{
	108	int i;
	109
5a79859a	110	if (test_facility(13)) {
cfb0b241 HC	111	__ptep_ipte_range(address, nr - 1, pte);
	112	return;
	113	}
	114	for (i = 0; i < nr; i++) {
	115	__ptep_ipte(address, pte);
	116	address += PAGE_SIZE;
	117	pte++;
	118	}
	119	}
	120
031bc574	121	void __kernel_map_pages(struct page *page, int numpages, int enable)
0a4ccc99 HC	122	{
0a4ccc99 HC	123	unsigned long address;
cfb0b241	124	int nr, i, j;
0a4ccc99 HC	125	pgd_t *pgd;
	126	pud_t *pud;
	127	pmd_t *pmd;
	128	pte_t *pte;
0a4ccc99	129
cfb0b241	130	for (i = 0; i < numpages;) {
0a4ccc99 HC	131	address = page_to_phys(page + i);
	132	pgd = pgd_offset_k(address);
	133	pud = pud_offset(pgd, address);
	134	pmd = pmd_offset(pud, address);
	135	pte = pte_offset_kernel(pmd, address);
cfb0b241 HC	136	nr = (unsigned long)pte >> ilog2(sizeof(long));
	137	nr = PTRS_PER_PTE - (nr & (PTRS_PER_PTE - 1));
	138	nr = min(numpages - i, nr);
	139	if (enable) {
	140	for (j = 0; j < nr; j++) {
	141	pte_val(*pte) = __pa(address);
	142	address += PAGE_SIZE;
	143	pte++;
	144	}
	145	} else {
	146	ipte_range(pte, address, nr);
0a4ccc99	147	}
cfb0b241	148	i += nr;
0a4ccc99 HC	149	}
	150	}
	151
	152	#ifdef CONFIG_HIBERNATION
	153	bool kernel_page_present(struct page *page)
	154	{
	155	unsigned long addr;
	156	int cc;
	157
	158	addr = page_to_phys(page);
	159	asm volatile(
	160	" lra %1,0(%1)\n"
	161	" ipm %0\n"
	162	" srl %0,28"
	163	: "=d" (cc), "+a" (addr) : : "cc");
	164	return cc == 0;
	165	}
	166	#endif /* CONFIG_HIBERNATION */
	167
	168	#endif /* CONFIG_DEBUG_PAGEALLOC */