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s390/bpf: increase BPF_SIZE_MAX
[deliverable/linux.git] / arch / s390 / net / bpf_jit_comp.c
CommitLineData
c10302ef
MS		 1/*
2 * BPF Jit compiler for s390.
3 *
05462310
MH		 4 * Minimum build requirements:
5 *
6 * - HAVE_MARCH_Z196_FEATURES: laal, laalg
7 * - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj
8 * - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf
9 * - PACK_STACK
10 * - 64BIT
11 *
12 * Copyright IBM Corp. 2012,2015
c10302ef
MS		 13 *
14 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
05462310 15 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
c10302ef 16 */
05462310
MH		 17
18#define KMSG_COMPONENT "bpf_jit"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
c10302ef
MS		 21#include <linux/netdevice.h>
22#include <linux/filter.h>
c9a7afa3 23#include <linux/init.h>
6651ee07 24#include <linux/bpf.h>
c10302ef 25#include <asm/cacheflush.h>
0f20822a 26#include <asm/dis.h>
05462310 27#include "bpf_jit.h"
c10302ef 28
c10302ef
MS		 29int bpf_jit_enable __read_mostly;
30
05462310
MH		 31struct bpf_jit {
32 u32 seen; /* Flags to remember seen eBPF instructions */
33 u32 seen_reg[16]; /* Array to remember which registers are used */
34 u32 *addrs; /* Array with relative instruction addresses */
35 u8 *prg_buf; /* Start of program */
36 int size; /* Size of program and literal pool */
37 int size_prg; /* Size of program */
38 int prg; /* Current position in program */
39 int lit_start; /* Start of literal pool */
40 int lit; /* Current position in literal pool */
41 int base_ip; /* Base address for literal pool */
42 int ret0_ip; /* Address of return 0 */
43 int exit_ip; /* Address of exit */
6651ee07
MH		 44 int tail_call_start; /* Tail call start offset */
45 int labels[1]; /* Labels for local jumps */
05462310
MH		 46};
47
ce2b6ad9 48#define BPF_SIZE_MAX 0x7ffff /* Max size for program (20 bit signed displ) */
05462310
MH		 49
50#define SEEN_SKB 1 /* skb access */
51#define SEEN_MEM 2 /* use mem[] for temporary storage */
52#define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */
53#define SEEN_LITERAL 8 /* code uses literals */
54#define SEEN_FUNC 16 /* calls C functions */
6651ee07 55#define SEEN_TAIL_CALL 32 /* code uses tail calls */
05462310
MH		 56#define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB)
57
c10302ef 58/*
05462310 59 * s390 registers
c10302ef 60 */
05462310
MH		 61#define REG_W0 (__MAX_BPF_REG+0) /* Work register 1 (even) */
62#define REG_W1 (__MAX_BPF_REG+1) /* Work register 2 (odd) */
63#define REG_SKB_DATA (__MAX_BPF_REG+2) /* SKB data register */
64#define REG_L (__MAX_BPF_REG+3) /* Literal pool register */
65#define REG_15 (__MAX_BPF_REG+4) /* Register 15 */
66#define REG_0 REG_W0 /* Register 0 */
6651ee07 67#define REG_1 REG_W1 /* Register 1 */
05462310
MH		 68#define REG_2 BPF_REG_1 /* Register 2 */
69#define REG_14 BPF_REG_0 /* Register 14 */
c10302ef 70
05462310
MH		 71/*
72 * Mapping of BPF registers to s390 registers
73 */
74static const int reg2hex[] = {
75 /* Return code */
76 [BPF_REG_0] = 14,
77 /* Function parameters */
78 [BPF_REG_1] = 2,
79 [BPF_REG_2] = 3,
80 [BPF_REG_3] = 4,
81 [BPF_REG_4] = 5,
82 [BPF_REG_5] = 6,
83 /* Call saved registers */
84 [BPF_REG_6] = 7,
85 [BPF_REG_7] = 8,
86 [BPF_REG_8] = 9,
87 [BPF_REG_9] = 10,
88 /* BPF stack pointer */
89 [BPF_REG_FP] = 13,
90 /* SKB data pointer */
91 [REG_SKB_DATA] = 12,
92 /* Work registers for s390x backend */
93 [REG_W0] = 0,
94 [REG_W1] = 1,
95 [REG_L] = 11,
96 [REG_15] = 15,
c10302ef
MS		 97};
98
05462310
MH		 99static inline u32 reg(u32 dst_reg, u32 src_reg)
100{
101 return reg2hex[dst_reg] << 4 | reg2hex[src_reg];
102}
103
104static inline u32 reg_high(u32 reg)
105{
106 return reg2hex[reg] << 4;
107}
108
109static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
110{
111 u32 r1 = reg2hex[b1];
112
113 if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15)
114 jit->seen_reg[r1] = 1;
115}
116
117#define REG_SET_SEEN(b1) \
118({ \
119 reg_set_seen(jit, b1); \
120})
121
122#define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]]
123
124/*
125 * EMIT macros for code generation
126 */
127
128#define _EMIT2(op) \
129({ \
130 if (jit->prg_buf) \
131 *(u16 *) (jit->prg_buf + jit->prg) = op; \
132 jit->prg += 2; \
133})
c10302ef 134
05462310
MH		 135#define EMIT2(op, b1, b2) \
136({ \
137 _EMIT2(op | reg(b1, b2)); \
138 REG_SET_SEEN(b1); \
139 REG_SET_SEEN(b2); \
c10302ef
MS		 140})
141
05462310
MH		 142#define _EMIT4(op) \
143({ \
144 if (jit->prg_buf) \
145 *(u32 *) (jit->prg_buf + jit->prg) = op; \
146 jit->prg += 4; \
c10302ef
MS		 147})
148
05462310
MH		 149#define EMIT4(op, b1, b2) \
150({ \
151 _EMIT4(op | reg(b1, b2)); \
152 REG_SET_SEEN(b1); \
153 REG_SET_SEEN(b2); \
c10302ef
MS		 154})
155
05462310
MH		 156#define EMIT4_RRF(op, b1, b2, b3) \
157({ \
158 _EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \
159 REG_SET_SEEN(b1); \
160 REG_SET_SEEN(b2); \
161 REG_SET_SEEN(b3); \
c10302ef
MS		 162})
163
05462310
MH		 164#define _EMIT4_DISP(op, disp) \
165({ \
166 unsigned int __disp = (disp) & 0xfff; \
167 _EMIT4(op | __disp); \
c10302ef
MS		 168})
169
05462310
MH		 170#define EMIT4_DISP(op, b1, b2, disp) \
171({ \
172 _EMIT4_DISP(op | reg_high(b1) << 16 | \
173 reg_high(b2) << 8, disp); \
174 REG_SET_SEEN(b1); \
175 REG_SET_SEEN(b2); \
c10302ef
MS		 176})
177
05462310
MH		 178#define EMIT4_IMM(op, b1, imm) \
179({ \
180 unsigned int __imm = (imm) & 0xffff; \
181 _EMIT4(op | reg_high(b1) << 16 | __imm); \
182 REG_SET_SEEN(b1); \
c10302ef
MS		 183})
184
05462310
MH		 185#define EMIT4_PCREL(op, pcrel) \
186({ \
187 long __pcrel = ((pcrel) >> 1) & 0xffff; \
188 _EMIT4(op | __pcrel); \
68d9884d
HC		 189})
190
05462310
MH		 191#define _EMIT6(op1, op2) \
192({ \
193 if (jit->prg_buf) { \
194 *(u32 *) (jit->prg_buf + jit->prg) = op1; \
195 *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \
196 } \
197 jit->prg += 6; \
c10302ef
MS		 198})
199
05462310
MH		 200#define _EMIT6_DISP(op1, op2, disp) \
201({ \
202 unsigned int __disp = (disp) & 0xfff; \
203 _EMIT6(op1 | __disp, op2); \
c10302ef
MS		 204})
205
05462310
MH		 206#define _EMIT6_DISP_LH(op1, op2, disp) \
207({ \
1df03ffd
MH		 208 u32 _disp = (u32) disp; \
209 unsigned int __disp_h = _disp & 0xff000; \
210 unsigned int __disp_l = _disp & 0x00fff; \
05462310
MH		 211 _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \
212})
213
214#define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \
215({ \
216 _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \
217 reg_high(b3) << 8, op2, disp); \
218 REG_SET_SEEN(b1); \
219 REG_SET_SEEN(b2); \
220 REG_SET_SEEN(b3); \
221})
222
6651ee07
MH		 223#define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask) \
224({ \
225 int rel = (jit->labels[label] - jit->prg) >> 1; \
226 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), \
227 op2 | mask << 12); \
228 REG_SET_SEEN(b1); \
229 REG_SET_SEEN(b2); \
230})
231
232#define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \
233({ \
234 int rel = (jit->labels[label] - jit->prg) >> 1; \
235 _EMIT6(op1 | (reg_high(b1) | mask) << 16 | \
236 (rel & 0xffff), op2 | (imm & 0xff) << 8); \
237 REG_SET_SEEN(b1); \
238 BUILD_BUG_ON(((unsigned long) imm) > 0xff); \
239})
240
05462310
MH		 241#define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \
242({ \
243 /* Branch instruction needs 6 bytes */ \
244 int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\
b035b60d 245 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask); \
05462310
MH		 246 REG_SET_SEEN(b1); \
247 REG_SET_SEEN(b2); \
248})
249
250#define _EMIT6_IMM(op, imm) \
251({ \
252 unsigned int __imm = (imm); \
253 _EMIT6(op | (__imm >> 16), __imm & 0xffff); \
254})
255
256#define EMIT6_IMM(op, b1, imm) \
257({ \
258 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \
259 REG_SET_SEEN(b1); \
260})
261
262#define EMIT_CONST_U32(val) \
263({ \
264 unsigned int ret; \
265 ret = jit->lit - jit->base_ip; \
266 jit->seen |= SEEN_LITERAL; \
267 if (jit->prg_buf) \
268 *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \
269 jit->lit += 4; \
270 ret; \
271})
272
273#define EMIT_CONST_U64(val) \
274({ \
275 unsigned int ret; \
276 ret = jit->lit - jit->base_ip; \
277 jit->seen |= SEEN_LITERAL; \
278 if (jit->prg_buf) \
279 *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \
280 jit->lit += 8; \
281 ret; \
282})
283
284#define EMIT_ZERO(b1) \
285({ \
286 /* llgfr %dst,%dst (zero extend to 64 bit) */ \
287 EMIT4(0xb9160000, b1, b1); \
288 REG_SET_SEEN(b1); \
289})
290
291/*
292 * Fill whole space with illegal instructions
293 */
294static void jit_fill_hole(void *area, unsigned int size)
738cbe72 295{
738cbe72
DB		 296 memset(area, 0, size);
297}
298
05462310
MH		 299/*
300 * Save registers from "rs" (register start) to "re" (register end) on stack
301 */
302static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)
303{
6651ee07 304 u32 off = STK_OFF_R6 + (rs - 6) * 8;
05462310
MH		 305
306 if (rs == re)
307 /* stg %rs,off(%r15) */
308 _EMIT6(0xe300f000 | rs << 20 | off, 0x0024);
309 else
310 /* stmg %rs,%re,off(%r15) */
311 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off);
312}
313
314/*
315 * Restore registers from "rs" (register start) to "re" (register end) on stack
316 */
317static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re)
c10302ef 318{
6651ee07 319 u32 off = STK_OFF_R6 + (rs - 6) * 8;
05462310
MH		 320
321 if (jit->seen & SEEN_STACK)
322 off += STK_OFF;
323
324 if (rs == re)
325 /* lg %rs,off(%r15) */
326 _EMIT6(0xe300f000 | rs << 20 | off, 0x0004);
327 else
328 /* lmg %rs,%re,off(%r15) */
329 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off);
330}
c10302ef 331
05462310
MH		 332/*
333 * Return first seen register (from start)
334 */
335static int get_start(struct bpf_jit *jit, int start)
336{
337 int i;
338
339 for (i = start; i <= 15; i++) {
340 if (jit->seen_reg[i])
341 return i;
342 }
343 return 0;
344}
345
346/*
347 * Return last seen register (from start) (gap >= 2)
348 */
349static int get_end(struct bpf_jit *jit, int start)
350{
351 int i;
352
353 for (i = start; i < 15; i++) {
354 if (!jit->seen_reg[i] && !jit->seen_reg[i + 1])
355 return i - 1;
356 }
357 return jit->seen_reg[15] ? 15 : 14;
358}
359
360#define REGS_SAVE 1
361#define REGS_RESTORE 0
362/*
363 * Save and restore clobbered registers (6-15) on stack.
364 * We save/restore registers in chunks with gap >= 2 registers.
365 */
366static void save_restore_regs(struct bpf_jit *jit, int op)
367{
368
369 int re = 6, rs;
370
371 do {
372 rs = get_start(jit, re);
373 if (!rs)
374 break;
375 re = get_end(jit, rs + 1);
376 if (op == REGS_SAVE)
377 save_regs(jit, rs, re);
378 else
379 restore_regs(jit, rs, re);
380 re++;
381 } while (re <= 15);
382}
383
384/*
385 * Emit function prologue
386 *
387 * Save registers and create stack frame if necessary.
388 * See stack frame layout desription in "bpf_jit.h"!
389 */
390static void bpf_jit_prologue(struct bpf_jit *jit)
391{
6651ee07
MH		 392 if (jit->seen & SEEN_TAIL_CALL) {
393 /* xc STK_OFF_TCCNT(4,%r15),STK_OFF_TCCNT(%r15) */
394 _EMIT6(0xd703f000 | STK_OFF_TCCNT, 0xf000 | STK_OFF_TCCNT);
395 } else {
396 /* j tail_call_start: NOP if no tail calls are used */
397 EMIT4_PCREL(0xa7f40000, 6);
398 _EMIT2(0);
399 }
400 /* Tail calls have to skip above initialization */
401 jit->tail_call_start = jit->prg;
05462310
MH		 402 /* Save registers */
403 save_restore_regs(jit, REGS_SAVE);
c10302ef
MS		 404 /* Setup literal pool */
405 if (jit->seen & SEEN_LITERAL) {
406 /* basr %r13,0 */
05462310 407 EMIT2(0x0d00, REG_L, REG_0);
c10302ef
MS		 408 jit->base_ip = jit->prg;
409 }
05462310
MH		 410 /* Setup stack and backchain */
411 if (jit->seen & SEEN_STACK) {
88aeca15
MH		 412 if (jit->seen & SEEN_FUNC)
413 /* lgr %w1,%r15 (backchain) */
414 EMIT4(0xb9040000, REG_W1, REG_15);
415 /* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */
416 EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED);
05462310
MH		 417 /* aghi %r15,-STK_OFF */
418 EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF);
419 if (jit->seen & SEEN_FUNC)
88aeca15
MH		 420 /* stg %w1,152(%r15) (backchain) */
421 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,
05462310
MH		 422 REG_15, 152);
423 }
424 /*
425 * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S"
426 * we store the SKB header length on the stack and the SKB data
427 * pointer in REG_SKB_DATA.
428 */
429 if (jit->seen & SEEN_SKB) {
430 /* Header length: llgf %w1,<len>(%b1) */
431 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1,
432 offsetof(struct sk_buff, len));
433 /* s %w1,<data_len>(%b1) */
434 EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1,
435 offsetof(struct sk_buff, data_len));
436 /* stg %w1,ST_OFF_HLEN(%r0,%r15) */
437 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15,
438 STK_OFF_HLEN);
439 /* lg %skb_data,data_off(%b1) */
440 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
441 BPF_REG_1, offsetof(struct sk_buff, data));
c10302ef 442 }
f75298f5
MH		 443 /* BPF compatibility: clear A (%b0) and X (%b7) registers */
444 if (REG_SEEN(BPF_REG_A))
445 /* lghi %ba,0 */
446 EMIT4_IMM(0xa7090000, BPF_REG_A, 0);
447 if (REG_SEEN(BPF_REG_X))
448 /* lghi %bx,0 */
449 EMIT4_IMM(0xa7090000, BPF_REG_X, 0);
c10302ef
MS		 450}
451
05462310
MH		 452/*
453 * Function epilogue
454 */
c10302ef
MS		 455static void bpf_jit_epilogue(struct bpf_jit *jit)
456{
457 /* Return 0 */
458 if (jit->seen & SEEN_RET0) {
459 jit->ret0_ip = jit->prg;
05462310
MH		 460 /* lghi %b0,0 */
461 EMIT4_IMM(0xa7090000, BPF_REG_0, 0);
c10302ef
MS		 462 }
463 jit->exit_ip = jit->prg;
05462310
MH		 464 /* Load exit code: lgr %r2,%b0 */
465 EMIT4(0xb9040000, REG_2, BPF_REG_0);
c10302ef 466 /* Restore registers */
05462310 467 save_restore_regs(jit, REGS_RESTORE);
c10302ef 468 /* br %r14 */
05462310 469 _EMIT2(0x07fe);
c10302ef
MS		 470}
471
472/*
05462310 473 * Compile one eBPF instruction into s390x code
b9b4b1ce
MH		 474 *
475 * NOTE: Use noinline because for gcov (-fprofile-arcs) gcc allocates a lot of
476 * stack space for the large switch statement.
c10302ef 477 */
b9b4b1ce 478static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
c10302ef 479{
05462310
MH		 480 struct bpf_insn *insn = &fp->insnsi[i];
481 int jmp_off, last, insn_count = 1;
482 unsigned int func_addr, mask;
483 u32 dst_reg = insn->dst_reg;
484 u32 src_reg = insn->src_reg;
485 u32 *addrs = jit->addrs;
486 s32 imm = insn->imm;
487 s16 off = insn->off;
c10302ef 488
05462310
MH		 489 switch (insn->code) {
490 /*
491 * BPF_MOV
492 */
493 case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */
494 /* llgfr %dst,%src */
495 EMIT4(0xb9160000, dst_reg, src_reg);
496 break;
497 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
498 /* lgr %dst,%src */
499 EMIT4(0xb9040000, dst_reg, src_reg);
500 break;
501 case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */
502 /* llilf %dst,imm */
503 EMIT6_IMM(0xc00f0000, dst_reg, imm);
504 break;
505 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */
506 /* lgfi %dst,imm */
507 EMIT6_IMM(0xc0010000, dst_reg, imm);
508 break;
509 /*
510 * BPF_LD 64
511 */
512 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
513 {
514 /* 16 byte instruction that uses two 'struct bpf_insn' */
515 u64 imm64;
516
517 imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32;
518 /* lg %dst,<d(imm)>(%l) */
519 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L,
520 EMIT_CONST_U64(imm64));
521 insn_count = 2;
522 break;
523 }
524 /*
525 * BPF_ADD
526 */
527 case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */
528 /* ar %dst,%src */
529 EMIT2(0x1a00, dst_reg, src_reg);
530 EMIT_ZERO(dst_reg);
531 break;
532 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */
533 /* agr %dst,%src */
534 EMIT4(0xb9080000, dst_reg, src_reg);
535 break;
536 case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */
537 if (!imm)
c10302ef 538 break;
05462310
MH		 539 /* alfi %dst,imm */
540 EMIT6_IMM(0xc20b0000, dst_reg, imm);
541 EMIT_ZERO(dst_reg);
542 break;
543 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */
544 if (!imm)
545 break;
546 /* agfi %dst,imm */
547 EMIT6_IMM(0xc2080000, dst_reg, imm);
548 break;
549 /*
550 * BPF_SUB
551 */
552 case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */
553 /* sr %dst,%src */
554 EMIT2(0x1b00, dst_reg, src_reg);
555 EMIT_ZERO(dst_reg);
c10302ef 556 break;
05462310
MH		 557 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */
558 /* sgr %dst,%src */
559 EMIT4(0xb9090000, dst_reg, src_reg);
c10302ef 560 break;
05462310
MH		 561 case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */
562 if (!imm)
c10302ef 563 break;
05462310
MH		 564 /* alfi %dst,-imm */
565 EMIT6_IMM(0xc20b0000, dst_reg, -imm);
566 EMIT_ZERO(dst_reg);
c10302ef 567 break;
05462310
MH		 568 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */
569 if (!imm)
570 break;
571 /* agfi %dst,-imm */
572 EMIT6_IMM(0xc2080000, dst_reg, -imm);
573 break;
574 /*
575 * BPF_MUL
576 */
577 case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */
578 /* msr %dst,%src */
579 EMIT4(0xb2520000, dst_reg, src_reg);
580 EMIT_ZERO(dst_reg);
581 break;
582 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */
583 /* msgr %dst,%src */
584 EMIT4(0xb90c0000, dst_reg, src_reg);
585 break;
586 case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */
587 if (imm == 1)
588 break;
589 /* msfi %r5,imm */
590 EMIT6_IMM(0xc2010000, dst_reg, imm);
591 EMIT_ZERO(dst_reg);
592 break;
593 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */
594 if (imm == 1)
aee636c4 595 break;
05462310
MH		 596 /* msgfi %dst,imm */
597 EMIT6_IMM(0xc2000000, dst_reg, imm);
598 break;
599 /*
600 * BPF_DIV / BPF_MOD
601 */
602 case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */
603 case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */
604 {
605 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
606
607 jit->seen |= SEEN_RET0;
608 /* ltr %src,%src (if src == 0 goto fail) */
609 EMIT2(0x1200, src_reg, src_reg);
610 /* jz <ret0> */
611 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
612 /* lhi %w0,0 */
613 EMIT4_IMM(0xa7080000, REG_W0, 0);
614 /* lr %w1,%dst */
615 EMIT2(0x1800, REG_W1, dst_reg);
616 /* dlr %w0,%src */
617 EMIT4(0xb9970000, REG_W0, src_reg);
618 /* llgfr %dst,%rc */
619 EMIT4(0xb9160000, dst_reg, rc_reg);
620 break;
621 }
771aada9
MH		 622 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / src */
623 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % src */
05462310
MH		 624 {
625 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
626
627 jit->seen |= SEEN_RET0;
628 /* ltgr %src,%src (if src == 0 goto fail) */
629 EMIT4(0xb9020000, src_reg, src_reg);
32472745 630 /* jz <ret0> */
05462310
MH		 631 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
632 /* lghi %w0,0 */
633 EMIT4_IMM(0xa7090000, REG_W0, 0);
634 /* lgr %w1,%dst */
635 EMIT4(0xb9040000, REG_W1, dst_reg);
05462310 636 /* dlgr %w0,%dst */
771aada9 637 EMIT4(0xb9870000, REG_W0, src_reg);
05462310
MH		 638 /* lgr %dst,%rc */
639 EMIT4(0xb9040000, dst_reg, rc_reg);
640 break;
641 }
642 case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */
643 case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */
644 {
645 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
646
647 if (imm == 1) {
648 if (BPF_OP(insn->code) == BPF_MOD)
649 /* lhgi %dst,0 */
650 EMIT4_IMM(0xa7090000, dst_reg, 0);
aee636c4
ED		 651 break;
652 }
05462310
MH		 653 /* lhi %w0,0 */
654 EMIT4_IMM(0xa7080000, REG_W0, 0);
655 /* lr %w1,%dst */
656 EMIT2(0x1800, REG_W1, dst_reg);
657 /* dl %w0,<d(imm)>(%l) */
658 EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L,
659 EMIT_CONST_U32(imm));
660 /* llgfr %dst,%rc */
661 EMIT4(0xb9160000, dst_reg, rc_reg);
662 break;
663 }
771aada9
MH		 664 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / imm */
665 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % imm */
05462310
MH		 666 {
667 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
668
669 if (imm == 1) {
670 if (BPF_OP(insn->code) == BPF_MOD)
671 /* lhgi %dst,0 */
672 EMIT4_IMM(0xa7090000, dst_reg, 0);
673 break;
674 }
675 /* lghi %w0,0 */
676 EMIT4_IMM(0xa7090000, REG_W0, 0);
677 /* lgr %w1,%dst */
678 EMIT4(0xb9040000, REG_W1, dst_reg);
679 /* dlg %w0,<d(imm)>(%l) */
680 EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,
771aada9 681 EMIT_CONST_U64(imm));
05462310
MH		 682 /* lgr %dst,%rc */
683 EMIT4(0xb9040000, dst_reg, rc_reg);
684 break;
685 }
686 /*
687 * BPF_AND
688 */
689 case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */
690 /* nr %dst,%src */
691 EMIT2(0x1400, dst_reg, src_reg);
692 EMIT_ZERO(dst_reg);
693 break;
694 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
695 /* ngr %dst,%src */
696 EMIT4(0xb9800000, dst_reg, src_reg);
697 break;
698 case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */
699 /* nilf %dst,imm */
700 EMIT6_IMM(0xc00b0000, dst_reg, imm);
701 EMIT_ZERO(dst_reg);
c10302ef 702 break;
05462310
MH		 703 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
704 /* ng %dst,<d(imm)>(%l) */
705 EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L,
706 EMIT_CONST_U64(imm));
c59eed11 707 break;
05462310
MH		 708 /*
709 * BPF_OR
710 */
711 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
712 /* or %dst,%src */
713 EMIT2(0x1600, dst_reg, src_reg);
714 EMIT_ZERO(dst_reg);
715 break;
716 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
717 /* ogr %dst,%src */
718 EMIT4(0xb9810000, dst_reg, src_reg);
719 break;
720 case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */
721 /* oilf %dst,imm */
722 EMIT6_IMM(0xc00d0000, dst_reg, imm);
723 EMIT_ZERO(dst_reg);
724 break;
725 case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */
726 /* og %dst,<d(imm)>(%l) */
727 EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L,
728 EMIT_CONST_U64(imm));
729 break;
730 /*
731 * BPF_XOR
732 */
733 case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */
734 /* xr %dst,%src */
735 EMIT2(0x1700, dst_reg, src_reg);
736 EMIT_ZERO(dst_reg);
737 break;
738 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */
739 /* xgr %dst,%src */
740 EMIT4(0xb9820000, dst_reg, src_reg);
741 break;
742 case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */
743 if (!imm)
916908df 744 break;
05462310
MH		 745 /* xilf %dst,imm */
746 EMIT6_IMM(0xc0070000, dst_reg, imm);
747 EMIT_ZERO(dst_reg);
748 break;
749 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */
750 /* xg %dst,<d(imm)>(%l) */
751 EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L,
752 EMIT_CONST_U64(imm));
753 break;
754 /*
755 * BPF_LSH
756 */
757 case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */
758 /* sll %dst,0(%src) */
759 EMIT4_DISP(0x89000000, dst_reg, src_reg, 0);
760 EMIT_ZERO(dst_reg);
916908df 761 break;
05462310
MH		 762 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */
763 /* sllg %dst,%dst,0(%src) */
764 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0);
c10302ef 765 break;
05462310
MH		 766 case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */
767 if (imm == 0)
c10302ef 768 break;
05462310
MH		 769 /* sll %dst,imm(%r0) */
770 EMIT4_DISP(0x89000000, dst_reg, REG_0, imm);
771 EMIT_ZERO(dst_reg);
c10302ef 772 break;
05462310
MH		 773 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */
774 if (imm == 0)
775 break;
776 /* sllg %dst,%dst,imm(%r0) */
777 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm);
778 break;
779 /*
780 * BPF_RSH
781 */
782 case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */
783 /* srl %dst,0(%src) */
784 EMIT4_DISP(0x88000000, dst_reg, src_reg, 0);
785 EMIT_ZERO(dst_reg);
c10302ef 786 break;
05462310
MH		 787 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */
788 /* srlg %dst,%dst,0(%src) */
789 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0);
790 break;
791 case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */
792 if (imm == 0)
c10302ef 793 break;
05462310
MH		 794 /* srl %dst,imm(%r0) */
795 EMIT4_DISP(0x88000000, dst_reg, REG_0, imm);
796 EMIT_ZERO(dst_reg);
797 break;
798 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */
799 if (imm == 0)
c10302ef 800 break;
05462310
MH		 801 /* srlg %dst,%dst,imm(%r0) */
802 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm);
c10302ef 803 break;
05462310
MH		 804 /*
805 * BPF_ARSH
806 */
807 case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */
808 /* srag %dst,%dst,0(%src) */
809 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0);
810 break;
811 case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */
812 if (imm == 0)
813 break;
814 /* srag %dst,%dst,imm(%r0) */
815 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm);
816 break;
817 /*
818 * BPF_NEG
819 */
820 case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */
821 /* lcr %dst,%dst */
822 EMIT2(0x1300, dst_reg, dst_reg);
823 EMIT_ZERO(dst_reg);
824 break;
825 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
826 /* lcgr %dst,%dst */
827 EMIT4(0xb9130000, dst_reg, dst_reg);
828 break;
829 /*
830 * BPF_FROM_BE/LE
831 */
832 case BPF_ALU | BPF_END | BPF_FROM_BE:
833 /* s390 is big endian, therefore only clear high order bytes */
834 switch (imm) {
835 case 16: /* dst = (u16) cpu_to_be16(dst) */
836 /* llghr %dst,%dst */
837 EMIT4(0xb9850000, dst_reg, dst_reg);
838 break;
839 case 32: /* dst = (u32) cpu_to_be32(dst) */
840 /* llgfr %dst,%dst */
841 EMIT4(0xb9160000, dst_reg, dst_reg);
842 break;
843 case 64: /* dst = (u64) cpu_to_be64(dst) */
844 break;
c10302ef 845 }
c10302ef 846 break;
05462310
MH		 847 case BPF_ALU | BPF_END | BPF_FROM_LE:
848 switch (imm) {
849 case 16: /* dst = (u16) cpu_to_le16(dst) */
850 /* lrvr %dst,%dst */
851 EMIT4(0xb91f0000, dst_reg, dst_reg);
852 /* srl %dst,16(%r0) */
853 EMIT4_DISP(0x88000000, dst_reg, REG_0, 16);
854 /* llghr %dst,%dst */
855 EMIT4(0xb9850000, dst_reg, dst_reg);
856 break;
857 case 32: /* dst = (u32) cpu_to_le32(dst) */
858 /* lrvr %dst,%dst */
859 EMIT4(0xb91f0000, dst_reg, dst_reg);
860 /* llgfr %dst,%dst */
861 EMIT4(0xb9160000, dst_reg, dst_reg);
862 break;
863 case 64: /* dst = (u64) cpu_to_le64(dst) */
864 /* lrvgr %dst,%dst */
865 EMIT4(0xb90f0000, dst_reg, dst_reg);
c10302ef
MS		 866 break;
867 }
c10302ef 868 break;
05462310
MH		 869 /*
870 * BPF_ST(X)
871 */
872 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */
873 /* stcy %src,off(%dst) */
874 EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off);
875 jit->seen |= SEEN_MEM;
876 break;
877 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
878 /* sthy %src,off(%dst) */
879 EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off);
880 jit->seen |= SEEN_MEM;
881 break;
882 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
883 /* sty %src,off(%dst) */
884 EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off);
885 jit->seen |= SEEN_MEM;
886 break;
887 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
888 /* stg %src,off(%dst) */
889 EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off);
890 jit->seen |= SEEN_MEM;
891 break;
892 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
893 /* lhi %w0,imm */
894 EMIT4_IMM(0xa7080000, REG_W0, (u8) imm);
895 /* stcy %w0,off(dst) */
896 EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off);
897 jit->seen |= SEEN_MEM;
898 break;
899 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
900 /* lhi %w0,imm */
901 EMIT4_IMM(0xa7080000, REG_W0, (u16) imm);
902 /* sthy %w0,off(dst) */
903 EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off);
c10302ef 904 jit->seen |= SEEN_MEM;
c10302ef 905 break;
05462310
MH		 906 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
907 /* llilf %w0,imm */
908 EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm);
909 /* sty %w0,off(%dst) */
910 EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off);
911 jit->seen |= SEEN_MEM;
912 break;
913 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
914 /* lgfi %w0,imm */
915 EMIT6_IMM(0xc0010000, REG_W0, imm);
916 /* stg %w0,off(%dst) */
917 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off);
918 jit->seen |= SEEN_MEM;
919 break;
920 /*
921 * BPF_STX XADD (atomic_add)
922 */
923 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */
924 /* laal %w0,%src,off(%dst) */
925 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg,
926 dst_reg, off);
927 jit->seen |= SEEN_MEM;
928 break;
929 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */
930 /* laalg %w0,%src,off(%dst) */
931 EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg,
932 dst_reg, off);
933 jit->seen |= SEEN_MEM;
934 break;
935 /*
936 * BPF_LDX
937 */
938 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */
939 /* llgc %dst,0(off,%src) */
940 EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off);
941 jit->seen |= SEEN_MEM;
942 break;
943 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */
944 /* llgh %dst,0(off,%src) */
945 EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off);
946 jit->seen |= SEEN_MEM;
947 break;
948 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */
949 /* llgf %dst,off(%src) */
950 jit->seen |= SEEN_MEM;
951 EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off);
952 break;
953 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */
954 /* lg %dst,0(off,%src) */
955 jit->seen |= SEEN_MEM;
956 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off);
957 break;
958 /*
959 * BPF_JMP / CALL
960 */
961 case BPF_JMP | BPF_CALL:
962 {
963 /*
964 * b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5)
965 */
966 const u64 func = (u64)__bpf_call_base + imm;
967
4e10df9a
AS		 968 if (bpf_helper_changes_skb_data((void *)func))
969 /* TODO reload skb->data, hlen */
970 return -1;
971
05462310
MH		 972 REG_SET_SEEN(BPF_REG_5);
973 jit->seen |= SEEN_FUNC;
974 /* lg %w1,<d(imm)>(%l) */
ce2b6ad9
MH		 975 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
976 EMIT_CONST_U64(func));
05462310
MH		 977 /* basr %r14,%w1 */
978 EMIT2(0x0d00, REG_14, REG_W1);
979 /* lgr %b0,%r2: load return value into %b0 */
980 EMIT4(0xb9040000, BPF_REG_0, REG_2);
981 break;
982 }
6651ee07
MH		 983 case BPF_JMP | BPF_CALL | BPF_X:
984 /*
985 * Implicit input:
986 * B1: pointer to ctx
987 * B2: pointer to bpf_array
988 * B3: index in bpf_array
989 */
990 jit->seen |= SEEN_TAIL_CALL;
991
992 /*
993 * if (index >= array->map.max_entries)
994 * goto out;
995 */
996
997 /* llgf %w1,map.max_entries(%b2) */
998 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2,
999 offsetof(struct bpf_array, map.max_entries));
1000 /* clgrj %b3,%w1,0xa,label0: if %b3 >= %w1 goto out */
1001 EMIT6_PCREL_LABEL(0xec000000, 0x0065, BPF_REG_3,
1002 REG_W1, 0, 0xa);
1003
1004 /*
1005 * if (tail_call_cnt++ > MAX_TAIL_CALL_CNT)
1006 * goto out;
1007 */
1008
1009 if (jit->seen & SEEN_STACK)
1010 off = STK_OFF_TCCNT + STK_OFF;
1011 else
1012 off = STK_OFF_TCCNT;
1013 /* lhi %w0,1 */
1014 EMIT4_IMM(0xa7080000, REG_W0, 1);
1015 /* laal %w1,%w0,off(%r15) */
1016 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W1, REG_W0, REG_15, off);
1017 /* clij %w1,MAX_TAIL_CALL_CNT,0x2,label0 */
1018 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007f, REG_W1,
1019 MAX_TAIL_CALL_CNT, 0, 0x2);
1020
1021 /*
1022 * prog = array->prog[index];
1023 * if (prog == NULL)
1024 * goto out;
1025 */
1026
1027 /* sllg %r1,%b3,3: %r1 = index * 8 */
1028 EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, BPF_REG_3, REG_0, 3);
1029 /* lg %r1,prog(%b2,%r1) */
1030 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2,
1031 REG_1, offsetof(struct bpf_array, prog));
1032 /* clgij %r1,0,0x8,label0 */
1033 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007d, REG_1, 0, 0, 0x8);
1034
1035 /*
1036 * Restore registers before calling function
1037 */
1038 save_restore_regs(jit, REGS_RESTORE);
1039
1040 /*
1041 * goto *(prog->bpf_func + tail_call_start);
1042 */
1043
1044 /* lg %r1,bpf_func(%r1) */
1045 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, REG_1, REG_0,
1046 offsetof(struct bpf_prog, bpf_func));
1047 /* bc 0xf,tail_call_start(%r1) */
1048 _EMIT4(0x47f01000 + jit->tail_call_start);
1049 /* out: */
1050 jit->labels[0] = jit->prg;
1051 break;
05462310
MH		 1052 case BPF_JMP | BPF_EXIT: /* return b0 */
1053 last = (i == fp->len - 1) ? 1 : 0;
1054 if (last && !(jit->seen & SEEN_RET0))
1055 break;
c10302ef
MS		 1056 /* j <exit> */
1057 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
1058 break;
05462310
MH		 1059 /*
1060 * Branch relative (number of skipped instructions) to offset on
1061 * condition.
1062 *
1063 * Condition code to mask mapping:
1064 *
1065 * CC | Description | Mask
1066 * ------------------------------
1067 * 0 | Operands equal | 8
1068 * 1 | First operand low | 4
1069 * 2 | First operand high | 2
1070 * 3 | Unused | 1
1071 *
1072 * For s390x relative branches: ip = ip + off_bytes
1073 * For BPF relative branches: insn = insn + off_insns + 1
1074 *
1075 * For example for s390x with offset 0 we jump to the branch
1076 * instruction itself (loop) and for BPF with offset 0 we
1077 * branch to the instruction behind the branch.
1078 */
1079 case BPF_JMP | BPF_JA: /* if (true) */
1080 mask = 0xf000; /* j */
1081 goto branch_oc;
1082 case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */
1083 mask = 0x2000; /* jh */
1084 goto branch_ks;
1085 case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */
1086 mask = 0xa000; /* jhe */
1087 goto branch_ks;
1088 case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */
1089 mask = 0x2000; /* jh */
1090 goto branch_ku;
1091 case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */
1092 mask = 0xa000; /* jhe */
1093 goto branch_ku;
1094 case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */
1095 mask = 0x7000; /* jne */
1096 goto branch_ku;
1097 case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */
1098 mask = 0x8000; /* je */
1099 goto branch_ku;
1100 case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */
1101 mask = 0x7000; /* jnz */
1102 /* lgfi %w1,imm (load sign extend imm) */
1103 EMIT6_IMM(0xc0010000, REG_W1, imm);
1104 /* ngr %w1,%dst */
1105 EMIT4(0xb9800000, REG_W1, dst_reg);
1106 goto branch_oc;
1107
1108 case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */
1109 mask = 0x2000; /* jh */
1110 goto branch_xs;
1111 case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */
1112 mask = 0xa000; /* jhe */
1113 goto branch_xs;
1114 case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */
1115 mask = 0x2000; /* jh */
1116 goto branch_xu;
1117 case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */
1118 mask = 0xa000; /* jhe */
1119 goto branch_xu;
1120 case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */
1121 mask = 0x7000; /* jne */
1122 goto branch_xu;
1123 case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */
1124 mask = 0x8000; /* je */
1125 goto branch_xu;
1126 case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */
1127 mask = 0x7000; /* jnz */
1128 /* ngrk %w1,%dst,%src */
1129 EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg);
1130 goto branch_oc;
1131branch_ks:
1132 /* lgfi %w1,imm (load sign extend imm) */
1133 EMIT6_IMM(0xc0010000, REG_W1, imm);
1134 /* cgrj %dst,%w1,mask,off */
1135 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask);
1136 break;
1137branch_ku:
1138 /* lgfi %w1,imm (load sign extend imm) */
1139 EMIT6_IMM(0xc0010000, REG_W1, imm);
1140 /* clgrj %dst,%w1,mask,off */
1141 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask);
1142 break;
1143branch_xs:
1144 /* cgrj %dst,%src,mask,off */
1145 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask);
1146 break;
1147branch_xu:
1148 /* clgrj %dst,%src,mask,off */
1149 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask);
1150 break;
1151branch_oc:
1152 /* brc mask,jmp_off (branch instruction needs 4 bytes) */
1153 jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4);
1154 EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off);
5303a0fe 1155 break;
05462310
MH		 1156 /*
1157 * BPF_LD
1158 */
1159 case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */
1160 case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */
1161 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1162 func_addr = __pa(sk_load_byte_pos);
1163 else
1164 func_addr = __pa(sk_load_byte);
1165 goto call_fn;
1166 case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */
1167 case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */
1168 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1169 func_addr = __pa(sk_load_half_pos);
1170 else
1171 func_addr = __pa(sk_load_half);
1172 goto call_fn;
1173 case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */
1174 case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */
1175 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1176 func_addr = __pa(sk_load_word_pos);
1177 else
1178 func_addr = __pa(sk_load_word);
1179 goto call_fn;
1180call_fn:
1181 jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC;
1182 REG_SET_SEEN(REG_14); /* Return address of possible func call */
1183
1184 /*
1185 * Implicit input:
1186 * BPF_REG_6 (R7) : skb pointer
1187 * REG_SKB_DATA (R12): skb data pointer
1188 *
1189 * Calculated input:
1190 * BPF_REG_2 (R3) : offset of byte(s) to fetch in skb
1191 * BPF_REG_5 (R6) : return address
1192 *
1193 * Output:
1194 * BPF_REG_0 (R14): data read from skb
1195 *
1196 * Scratch registers (BPF_REG_1-5)
1197 */
1198
1199 /* Call function: llilf %w1,func_addr */
1200 EMIT6_IMM(0xc00f0000, REG_W1, func_addr);
1201
1202 /* Offset: lgfi %b2,imm */
1203 EMIT6_IMM(0xc0010000, BPF_REG_2, imm);
1204 if (BPF_MODE(insn->code) == BPF_IND)
1205 /* agfr %b2,%src (%src is s32 here) */
1206 EMIT4(0xb9180000, BPF_REG_2, src_reg);
1207
1208 /* basr %b5,%w1 (%b5 is call saved) */
1209 EMIT2(0x0d00, BPF_REG_5, REG_W1);
1210
1211 /*
1212 * Note: For fast access we jump directly after the
1213 * jnz instruction from bpf_jit.S
1214 */
1215 /* jnz <ret0> */
1216 EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg);
c10302ef
MS		 1217 break;
1218 default: /* too complex, give up */
05462310
MH		 1219 pr_err("Unknown opcode %02x\n", insn->code);
1220 return -1;
1221 }
1222 return insn_count;
1223}
1224
1225/*
1226 * Compile eBPF program into s390x code
1227 */
1228static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp)
1229{
1230 int i, insn_count;
1231
1232 jit->lit = jit->lit_start;
1233 jit->prg = 0;
1234
1235 bpf_jit_prologue(jit);
1236 for (i = 0; i < fp->len; i += insn_count) {
1237 insn_count = bpf_jit_insn(jit, fp, i);
1238 if (insn_count < 0)
1239 return -1;
1240 jit->addrs[i + 1] = jit->prg; /* Next instruction address */
c10302ef 1241 }
05462310
MH		 1242 bpf_jit_epilogue(jit);
1243
1244 jit->lit_start = jit->prg;
1245 jit->size = jit->lit;
1246 jit->size_prg = jit->prg;
c10302ef 1247 return 0;
c10302ef
MS		 1248}
1249
05462310
MH		 1250/*
1251 * Classic BPF function stub. BPF programs will be converted into
1252 * eBPF and then bpf_int_jit_compile() will be called.
1253 */
7ae457c1 1254void bpf_jit_compile(struct bpf_prog *fp)
c10302ef 1255{
05462310
MH		 1256}
1257
1258/*
1259 * Compile eBPF program "fp"
1260 */
1261void bpf_int_jit_compile(struct bpf_prog *fp)
1262{
1263 struct bpf_binary_header *header;
1264 struct bpf_jit jit;
1265 int pass;
c10302ef
MS		 1266
1267 if (!bpf_jit_enable)
1268 return;
05462310
MH		 1269 memset(&jit, 0, sizeof(jit));
1270 jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
1271 if (jit.addrs == NULL)
c10302ef 1272 return;
05462310
MH		 1273 /*
1274 * Three initial passes:
1275 * - 1/2: Determine clobbered registers
1276 * - 3: Calculate program size and addrs arrray
1277 */
1278 for (pass = 1; pass <= 3; pass++) {
1279 if (bpf_jit_prog(&jit, fp))
1280 goto free_addrs;
c10302ef 1281 }
05462310
MH		 1282 /*
1283 * Final pass: Allocate and generate program
1284 */
1285 if (jit.size >= BPF_SIZE_MAX)
1286 goto free_addrs;
1287 header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole);
1288 if (!header)
1289 goto free_addrs;
1290 if (bpf_jit_prog(&jit, fp))
1291 goto free_addrs;
c10302ef 1292 if (bpf_jit_enable > 1) {
05462310
MH		 1293 bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf);
1294 if (jit.prg_buf)
1295 print_fn_code(jit.prg_buf, jit.size_prg);
c10302ef 1296 }
05462310 1297 if (jit.prg_buf) {
aa2d2c73 1298 set_memory_ro((unsigned long)header, header->pages);
05462310 1299 fp->bpf_func = (void *) jit.prg_buf;
286aad3c 1300 fp->jited = true;
aa2d2c73 1301 }
05462310
MH		 1302free_addrs:
1303 kfree(jit.addrs);
c10302ef
MS		 1304}
1305
05462310
MH		 1306/*
1307 * Free eBPF program
1308 */
7ae457c1 1309void bpf_jit_free(struct bpf_prog *fp)
c10302ef 1310{
aa2d2c73
HC		 1311 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1312 struct bpf_binary_header *header = (void *)addr;
1313
f8bbbfc3 1314 if (!fp->jited)
d45ed4a4 1315 goto free_filter;
f8bbbfc3 1316
aa2d2c73 1317 set_memory_rw(addr, header->pages);
738cbe72 1318 bpf_jit_binary_free(header);
f8bbbfc3 1319
d45ed4a4 1320free_filter:
60a3b225 1321 bpf_prog_unlock_free(fp);
c10302ef 1322}
Linux kernel - Deliverables
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