Commit | Line | Data |
---|---|---|
cd248341 JG |
1 | /* |
2 | * Copyright IBM Corp. 2012 | |
3 | * | |
4 | * Author(s): | |
5 | * Jan Glauber <jang@linux.vnet.ibm.com> | |
6 | * | |
7 | * The System z PCI code is a rewrite from a prototype by | |
8 | * the following people (Kudoz!): | |
bedef755 JG |
9 | * Alexander Schmidt |
10 | * Christoph Raisch | |
11 | * Hannes Hering | |
12 | * Hoang-Nam Nguyen | |
13 | * Jan-Bernd Themann | |
14 | * Stefan Roscher | |
15 | * Thomas Klein | |
cd248341 JG |
16 | */ |
17 | ||
18 | #define COMPONENT "zPCI" | |
19 | #define pr_fmt(fmt) COMPONENT ": " fmt | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/err.h> | |
24 | #include <linux/export.h> | |
25 | #include <linux/delay.h> | |
9a4da8a5 JG |
26 | #include <linux/irq.h> |
27 | #include <linux/kernel_stat.h> | |
cd248341 JG |
28 | #include <linux/seq_file.h> |
29 | #include <linux/pci.h> | |
30 | #include <linux/msi.h> | |
31 | ||
9a4da8a5 JG |
32 | #include <asm/isc.h> |
33 | #include <asm/airq.h> | |
cd248341 JG |
34 | #include <asm/facility.h> |
35 | #include <asm/pci_insn.h> | |
a755a45d | 36 | #include <asm/pci_clp.h> |
828b35f6 | 37 | #include <asm/pci_dma.h> |
cd248341 JG |
38 | |
39 | #define DEBUG /* enable pr_debug */ | |
40 | ||
9a4da8a5 JG |
41 | #define SIC_IRQ_MODE_ALL 0 |
42 | #define SIC_IRQ_MODE_SINGLE 1 | |
43 | ||
cd248341 JG |
44 | #define ZPCI_NR_DMA_SPACES 1 |
45 | #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS | |
46 | ||
47 | /* list of all detected zpci devices */ | |
67f43f38 | 48 | static LIST_HEAD(zpci_list); |
57b5918c | 49 | static DEFINE_SPINLOCK(zpci_list_lock); |
cd248341 | 50 | |
1f44a225 MS |
51 | static void zpci_enable_irq(struct irq_data *data); |
52 | static void zpci_disable_irq(struct irq_data *data); | |
cd248341 | 53 | |
1f44a225 MS |
54 | static struct irq_chip zpci_irq_chip = { |
55 | .name = "zPCI", | |
56 | .irq_unmask = zpci_enable_irq, | |
57 | .irq_mask = zpci_disable_irq, | |
9a4da8a5 JG |
58 | }; |
59 | ||
1f44a225 MS |
60 | static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES); |
61 | static DEFINE_SPINLOCK(zpci_domain_lock); | |
9a4da8a5 | 62 | |
5d0d8f43 | 63 | static struct airq_iv *zpci_aisb_iv; |
1f44a225 | 64 | static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES]; |
9a4da8a5 | 65 | |
f4eae94f MS |
66 | /* Adapter interrupt definitions */ |
67 | static void zpci_irq_handler(struct airq_struct *airq); | |
68 | ||
69 | static struct airq_struct zpci_airq = { | |
70 | .handler = zpci_irq_handler, | |
71 | .isc = PCI_ISC, | |
72 | }; | |
9a4da8a5 | 73 | |
cd248341 JG |
74 | /* I/O Map */ |
75 | static DEFINE_SPINLOCK(zpci_iomap_lock); | |
76 | static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); | |
77 | struct zpci_iomap_entry *zpci_iomap_start; | |
78 | EXPORT_SYMBOL_GPL(zpci_iomap_start); | |
79 | ||
d0b08853 JG |
80 | static struct kmem_cache *zdev_fmb_cache; |
81 | ||
cd248341 JG |
82 | struct zpci_dev *get_zdev(struct pci_dev *pdev) |
83 | { | |
84 | return (struct zpci_dev *) pdev->sysdata; | |
85 | } | |
86 | ||
87 | struct zpci_dev *get_zdev_by_fid(u32 fid) | |
88 | { | |
89 | struct zpci_dev *tmp, *zdev = NULL; | |
90 | ||
57b5918c | 91 | spin_lock(&zpci_list_lock); |
cd248341 JG |
92 | list_for_each_entry(tmp, &zpci_list, entry) { |
93 | if (tmp->fid == fid) { | |
94 | zdev = tmp; | |
95 | break; | |
96 | } | |
97 | } | |
57b5918c | 98 | spin_unlock(&zpci_list_lock); |
cd248341 JG |
99 | return zdev; |
100 | } | |
101 | ||
cd248341 JG |
102 | static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus) |
103 | { | |
104 | return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL; | |
105 | } | |
106 | ||
107 | int pci_domain_nr(struct pci_bus *bus) | |
108 | { | |
109 | return ((struct zpci_dev *) bus->sysdata)->domain; | |
110 | } | |
111 | EXPORT_SYMBOL_GPL(pci_domain_nr); | |
112 | ||
113 | int pci_proc_domain(struct pci_bus *bus) | |
114 | { | |
115 | return pci_domain_nr(bus); | |
116 | } | |
117 | EXPORT_SYMBOL_GPL(pci_proc_domain); | |
118 | ||
9a4da8a5 | 119 | /* Modify PCI: Register adapter interruptions */ |
5d0d8f43 | 120 | static int zpci_set_airq(struct zpci_dev *zdev) |
9a4da8a5 JG |
121 | { |
122 | u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT); | |
123 | struct zpci_fib *fib; | |
124 | int rc; | |
125 | ||
126 | fib = (void *) get_zeroed_page(GFP_KERNEL); | |
127 | if (!fib) | |
128 | return -ENOMEM; | |
129 | ||
130 | fib->isc = PCI_ISC; | |
9a4da8a5 | 131 | fib->sum = 1; /* enable summary notifications */ |
5d0d8f43 MS |
132 | fib->noi = airq_iv_end(zdev->aibv); |
133 | fib->aibv = (unsigned long) zdev->aibv->vector; | |
134 | fib->aibvo = 0; /* each zdev has its own interrupt vector */ | |
135 | fib->aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8; | |
136 | fib->aisbo = zdev->aisb & 63; | |
9a4da8a5 | 137 | |
9389339f | 138 | rc = zpci_mod_fc(req, fib); |
9a4da8a5 JG |
139 | |
140 | free_page((unsigned long) fib); | |
141 | return rc; | |
142 | } | |
143 | ||
144 | struct mod_pci_args { | |
145 | u64 base; | |
146 | u64 limit; | |
147 | u64 iota; | |
d0b08853 | 148 | u64 fmb_addr; |
9a4da8a5 JG |
149 | }; |
150 | ||
151 | static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args) | |
152 | { | |
153 | u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn); | |
154 | struct zpci_fib *fib; | |
155 | int rc; | |
156 | ||
157 | /* The FIB must be available even if it's not used */ | |
158 | fib = (void *) get_zeroed_page(GFP_KERNEL); | |
159 | if (!fib) | |
160 | return -ENOMEM; | |
161 | ||
162 | fib->pba = args->base; | |
163 | fib->pal = args->limit; | |
164 | fib->iota = args->iota; | |
d0b08853 | 165 | fib->fmb_addr = args->fmb_addr; |
9a4da8a5 | 166 | |
9389339f | 167 | rc = zpci_mod_fc(req, fib); |
9a4da8a5 JG |
168 | free_page((unsigned long) fib); |
169 | return rc; | |
170 | } | |
171 | ||
828b35f6 JG |
172 | /* Modify PCI: Register I/O address translation parameters */ |
173 | int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas, | |
174 | u64 base, u64 limit, u64 iota) | |
175 | { | |
d0b08853 | 176 | struct mod_pci_args args = { base, limit, iota, 0 }; |
828b35f6 JG |
177 | |
178 | WARN_ON_ONCE(iota & 0x3fff); | |
179 | args.iota |= ZPCI_IOTA_RTTO_FLAG; | |
180 | return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args); | |
181 | } | |
182 | ||
183 | /* Modify PCI: Unregister I/O address translation parameters */ | |
184 | int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas) | |
185 | { | |
d0b08853 | 186 | struct mod_pci_args args = { 0, 0, 0, 0 }; |
828b35f6 JG |
187 | |
188 | return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args); | |
189 | } | |
190 | ||
9a4da8a5 | 191 | /* Modify PCI: Unregister adapter interruptions */ |
5d0d8f43 | 192 | static int zpci_clear_airq(struct zpci_dev *zdev) |
9a4da8a5 | 193 | { |
d0b08853 | 194 | struct mod_pci_args args = { 0, 0, 0, 0 }; |
9a4da8a5 JG |
195 | |
196 | return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args); | |
197 | } | |
198 | ||
d0b08853 JG |
199 | /* Modify PCI: Set PCI function measurement parameters */ |
200 | int zpci_fmb_enable_device(struct zpci_dev *zdev) | |
201 | { | |
202 | struct mod_pci_args args = { 0, 0, 0, 0 }; | |
203 | ||
204 | if (zdev->fmb) | |
205 | return -EINVAL; | |
206 | ||
08b42124 | 207 | zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL); |
d0b08853 JG |
208 | if (!zdev->fmb) |
209 | return -ENOMEM; | |
d0b08853 JG |
210 | WARN_ON((u64) zdev->fmb & 0xf); |
211 | ||
212 | args.fmb_addr = virt_to_phys(zdev->fmb); | |
213 | return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); | |
214 | } | |
215 | ||
216 | /* Modify PCI: Disable PCI function measurement */ | |
217 | int zpci_fmb_disable_device(struct zpci_dev *zdev) | |
218 | { | |
219 | struct mod_pci_args args = { 0, 0, 0, 0 }; | |
220 | int rc; | |
221 | ||
222 | if (!zdev->fmb) | |
223 | return -EINVAL; | |
224 | ||
225 | /* Function measurement is disabled if fmb address is zero */ | |
226 | rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); | |
227 | ||
228 | kmem_cache_free(zdev_fmb_cache, zdev->fmb); | |
229 | zdev->fmb = NULL; | |
230 | return rc; | |
231 | } | |
232 | ||
cd248341 JG |
233 | #define ZPCI_PCIAS_CFGSPC 15 |
234 | ||
235 | static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len) | |
236 | { | |
237 | u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); | |
238 | u64 data; | |
239 | int rc; | |
240 | ||
9389339f | 241 | rc = zpci_load(&data, req, offset); |
b170bad4 SO |
242 | if (!rc) { |
243 | data = data << ((8 - len) * 8); | |
244 | data = le64_to_cpu(data); | |
cd248341 | 245 | *val = (u32) data; |
b170bad4 | 246 | } else |
cd248341 JG |
247 | *val = 0xffffffff; |
248 | return rc; | |
249 | } | |
250 | ||
251 | static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len) | |
252 | { | |
253 | u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); | |
254 | u64 data = val; | |
255 | int rc; | |
256 | ||
257 | data = cpu_to_le64(data); | |
258 | data = data >> ((8 - len) * 8); | |
9389339f | 259 | rc = zpci_store(data, req, offset); |
cd248341 JG |
260 | return rc; |
261 | } | |
262 | ||
1f44a225 MS |
263 | static int zpci_msi_set_mask_bits(struct msi_desc *msi, u32 mask, u32 flag) |
264 | { | |
265 | int offset, pos; | |
266 | u32 mask_bits; | |
267 | ||
268 | if (msi->msi_attrib.is_msix) { | |
269 | offset = msi->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + | |
270 | PCI_MSIX_ENTRY_VECTOR_CTRL; | |
271 | msi->masked = readl(msi->mask_base + offset); | |
272 | writel(flag, msi->mask_base + offset); | |
273 | } else if (msi->msi_attrib.maskbit) { | |
274 | pos = (long) msi->mask_base; | |
275 | pci_read_config_dword(msi->dev, pos, &mask_bits); | |
276 | mask_bits &= ~(mask); | |
277 | mask_bits |= flag & mask; | |
278 | pci_write_config_dword(msi->dev, pos, mask_bits); | |
279 | } else | |
280 | return 0; | |
281 | ||
282 | msi->msi_attrib.maskbit = !!flag; | |
283 | return 1; | |
284 | } | |
285 | ||
286 | static void zpci_enable_irq(struct irq_data *data) | |
9a4da8a5 | 287 | { |
1f44a225 | 288 | struct msi_desc *msi = irq_get_msi_desc(data->irq); |
9a4da8a5 JG |
289 | |
290 | zpci_msi_set_mask_bits(msi, 1, 0); | |
291 | } | |
9a4da8a5 | 292 | |
1f44a225 | 293 | static void zpci_disable_irq(struct irq_data *data) |
9a4da8a5 | 294 | { |
1f44a225 | 295 | struct msi_desc *msi = irq_get_msi_desc(data->irq); |
9a4da8a5 JG |
296 | |
297 | zpci_msi_set_mask_bits(msi, 1, 1); | |
298 | } | |
9a4da8a5 | 299 | |
b881bc46 | 300 | void pcibios_fixup_bus(struct pci_bus *bus) |
cd248341 JG |
301 | { |
302 | } | |
303 | ||
304 | resource_size_t pcibios_align_resource(void *data, const struct resource *res, | |
305 | resource_size_t size, | |
306 | resource_size_t align) | |
307 | { | |
308 | return 0; | |
309 | } | |
310 | ||
87bc359b JG |
311 | /* combine single writes by using store-block insn */ |
312 | void __iowrite64_copy(void __iomem *to, const void *from, size_t count) | |
313 | { | |
314 | zpci_memcpy_toio(to, from, count); | |
315 | } | |
316 | ||
cd248341 JG |
317 | /* Create a virtual mapping cookie for a PCI BAR */ |
318 | void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max) | |
319 | { | |
320 | struct zpci_dev *zdev = get_zdev(pdev); | |
321 | u64 addr; | |
322 | int idx; | |
323 | ||
324 | if ((bar & 7) != bar) | |
325 | return NULL; | |
326 | ||
327 | idx = zdev->bars[bar].map_idx; | |
328 | spin_lock(&zpci_iomap_lock); | |
329 | zpci_iomap_start[idx].fh = zdev->fh; | |
330 | zpci_iomap_start[idx].bar = bar; | |
331 | spin_unlock(&zpci_iomap_lock); | |
332 | ||
333 | addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48); | |
334 | return (void __iomem *) addr; | |
335 | } | |
336 | EXPORT_SYMBOL_GPL(pci_iomap); | |
337 | ||
338 | void pci_iounmap(struct pci_dev *pdev, void __iomem *addr) | |
339 | { | |
340 | unsigned int idx; | |
341 | ||
342 | idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48; | |
343 | spin_lock(&zpci_iomap_lock); | |
344 | zpci_iomap_start[idx].fh = 0; | |
345 | zpci_iomap_start[idx].bar = 0; | |
346 | spin_unlock(&zpci_iomap_lock); | |
347 | } | |
348 | EXPORT_SYMBOL_GPL(pci_iounmap); | |
349 | ||
350 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, | |
351 | int size, u32 *val) | |
352 | { | |
353 | struct zpci_dev *zdev = get_zdev_by_bus(bus); | |
2c3700bb | 354 | int ret; |
cd248341 JG |
355 | |
356 | if (!zdev || devfn != ZPCI_DEVFN) | |
2c3700bb SO |
357 | ret = -ENODEV; |
358 | else | |
359 | ret = zpci_cfg_load(zdev, where, val, size); | |
360 | ||
361 | return ret; | |
cd248341 JG |
362 | } |
363 | ||
364 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, | |
365 | int size, u32 val) | |
366 | { | |
367 | struct zpci_dev *zdev = get_zdev_by_bus(bus); | |
2c3700bb | 368 | int ret; |
cd248341 JG |
369 | |
370 | if (!zdev || devfn != ZPCI_DEVFN) | |
2c3700bb SO |
371 | ret = -ENODEV; |
372 | else | |
373 | ret = zpci_cfg_store(zdev, where, val, size); | |
374 | ||
375 | return ret; | |
cd248341 JG |
376 | } |
377 | ||
378 | static struct pci_ops pci_root_ops = { | |
379 | .read = pci_read, | |
380 | .write = pci_write, | |
381 | }; | |
382 | ||
f4eae94f | 383 | static void zpci_irq_handler(struct airq_struct *airq) |
9a4da8a5 | 384 | { |
5d0d8f43 | 385 | unsigned long si, ai; |
1f44a225 | 386 | struct airq_iv *aibv; |
5d0d8f43 | 387 | int irqs_on = 0; |
9a4da8a5 | 388 | |
420f42ec | 389 | inc_irq_stat(IRQIO_PCI); |
5d0d8f43 MS |
390 | for (si = 0;;) { |
391 | /* Scan adapter summary indicator bit vector */ | |
392 | si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv)); | |
393 | if (si == -1UL) { | |
394 | if (irqs_on++) | |
395 | /* End of second scan with interrupts on. */ | |
396 | break; | |
397 | /* First scan complete, reenable interrupts. */ | |
398 | zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); | |
399 | si = 0; | |
400 | continue; | |
401 | } | |
9a4da8a5 | 402 | |
5d0d8f43 | 403 | /* Scan the adapter interrupt vector for this device. */ |
1f44a225 | 404 | aibv = zpci_aibv[si]; |
5d0d8f43 | 405 | for (ai = 0;;) { |
1f44a225 | 406 | ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv)); |
5d0d8f43 MS |
407 | if (ai == -1UL) |
408 | break; | |
420f42ec | 409 | inc_irq_stat(IRQIO_MSI); |
1f44a225 MS |
410 | airq_iv_lock(aibv, ai); |
411 | generic_handle_irq(airq_iv_get_data(aibv, ai)); | |
412 | airq_iv_unlock(aibv, ai); | |
9a4da8a5 JG |
413 | } |
414 | } | |
5d0d8f43 | 415 | } |
9a4da8a5 | 416 | |
5d0d8f43 | 417 | int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) |
9a4da8a5 JG |
418 | { |
419 | struct zpci_dev *zdev = get_zdev(pdev); | |
1f44a225 | 420 | unsigned int hwirq, irq, msi_vecs; |
5d0d8f43 | 421 | unsigned long aisb; |
9a4da8a5 | 422 | struct msi_desc *msi; |
1f44a225 | 423 | struct msi_msg msg; |
9a4da8a5 JG |
424 | int rc; |
425 | ||
5d0d8f43 MS |
426 | if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI) |
427 | return -EINVAL; | |
428 | msi_vecs = min(nvec, ZPCI_MSI_VEC_MAX); | |
1f44a225 | 429 | msi_vecs = min_t(unsigned int, msi_vecs, CONFIG_PCI_NR_MSI); |
9a4da8a5 | 430 | |
5d0d8f43 MS |
431 | /* Allocate adapter summary indicator bit */ |
432 | rc = -EIO; | |
433 | aisb = airq_iv_alloc_bit(zpci_aisb_iv); | |
434 | if (aisb == -1UL) | |
435 | goto out; | |
9a4da8a5 | 436 | zdev->aisb = aisb; |
9a4da8a5 | 437 | |
5d0d8f43 MS |
438 | /* Create adapter interrupt vector */ |
439 | rc = -ENOMEM; | |
1f44a225 | 440 | zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK); |
5d0d8f43 MS |
441 | if (!zdev->aibv) |
442 | goto out_si; | |
9a4da8a5 | 443 | |
5d0d8f43 | 444 | /* Wire up shortcut pointer */ |
1f44a225 | 445 | zpci_aibv[aisb] = zdev->aibv; |
5d0d8f43 | 446 | |
1f44a225 MS |
447 | /* Request MSI interrupts */ |
448 | hwirq = 0; | |
9a4da8a5 | 449 | list_for_each_entry(msi, &pdev->msi_list, list) { |
1f44a225 MS |
450 | rc = -EIO; |
451 | irq = irq_alloc_desc(0); /* Alloc irq on node 0 */ | |
452 | if (irq == NO_IRQ) | |
453 | goto out_msi; | |
454 | rc = irq_set_msi_desc(irq, msi); | |
9a4da8a5 | 455 | if (rc) |
5d0d8f43 | 456 | goto out_msi; |
1f44a225 MS |
457 | irq_set_chip_and_handler(irq, &zpci_irq_chip, |
458 | handle_simple_irq); | |
459 | msg.data = hwirq; | |
460 | msg.address_lo = zdev->msi_addr & 0xffffffff; | |
461 | msg.address_hi = zdev->msi_addr >> 32; | |
462 | write_msi_msg(irq, &msg); | |
463 | airq_iv_set_data(zdev->aibv, hwirq, irq); | |
464 | hwirq++; | |
9a4da8a5 JG |
465 | } |
466 | ||
5d0d8f43 MS |
467 | /* Enable adapter interrupts */ |
468 | rc = zpci_set_airq(zdev); | |
469 | if (rc) | |
470 | goto out_msi; | |
471 | ||
472 | return (msi_vecs == nvec) ? 0 : msi_vecs; | |
473 | ||
474 | out_msi: | |
5d0d8f43 | 475 | list_for_each_entry(msi, &pdev->msi_list, list) { |
1f44a225 | 476 | if (hwirq-- == 0) |
5d0d8f43 | 477 | break; |
1f44a225 MS |
478 | irq_set_msi_desc(msi->irq, NULL); |
479 | irq_free_desc(msi->irq); | |
480 | msi->msg.address_lo = 0; | |
481 | msi->msg.address_hi = 0; | |
482 | msi->msg.data = 0; | |
483 | msi->irq = 0; | |
9a4da8a5 | 484 | } |
1f44a225 | 485 | zpci_aibv[aisb] = NULL; |
5d0d8f43 MS |
486 | airq_iv_release(zdev->aibv); |
487 | out_si: | |
488 | airq_iv_free_bit(zpci_aisb_iv, aisb); | |
489 | out: | |
5d0d8f43 | 490 | return rc; |
9a4da8a5 JG |
491 | } |
492 | ||
5d0d8f43 | 493 | void arch_teardown_msi_irqs(struct pci_dev *pdev) |
9a4da8a5 JG |
494 | { |
495 | struct zpci_dev *zdev = get_zdev(pdev); | |
496 | struct msi_desc *msi; | |
5d0d8f43 MS |
497 | int rc; |
498 | ||
5d0d8f43 MS |
499 | /* Disable adapter interrupts */ |
500 | rc = zpci_clear_airq(zdev); | |
1f1dcbd4 | 501 | if (rc) |
9a4da8a5 | 502 | return; |
9a4da8a5 | 503 | |
1f44a225 MS |
504 | /* Release MSI interrupts */ |
505 | list_for_each_entry(msi, &pdev->msi_list, list) { | |
506 | zpci_msi_set_mask_bits(msi, 1, 1); | |
507 | irq_set_msi_desc(msi->irq, NULL); | |
508 | irq_free_desc(msi->irq); | |
509 | msi->msg.address_lo = 0; | |
510 | msi->msg.address_hi = 0; | |
511 | msi->msg.data = 0; | |
512 | msi->irq = 0; | |
513 | } | |
9a4da8a5 | 514 | |
1f44a225 | 515 | zpci_aibv[zdev->aisb] = NULL; |
5d0d8f43 MS |
516 | airq_iv_release(zdev->aibv); |
517 | airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); | |
9a4da8a5 JG |
518 | } |
519 | ||
cd248341 JG |
520 | static void zpci_map_resources(struct zpci_dev *zdev) |
521 | { | |
522 | struct pci_dev *pdev = zdev->pdev; | |
523 | resource_size_t len; | |
524 | int i; | |
525 | ||
526 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
527 | len = pci_resource_len(pdev, i); | |
528 | if (!len) | |
529 | continue; | |
530 | pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0); | |
531 | pdev->resource[i].end = pdev->resource[i].start + len - 1; | |
cd248341 | 532 | } |
944239c5 SO |
533 | } |
534 | ||
535 | static void zpci_unmap_resources(struct zpci_dev *zdev) | |
536 | { | |
537 | struct pci_dev *pdev = zdev->pdev; | |
538 | resource_size_t len; | |
539 | int i; | |
540 | ||
541 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
542 | len = pci_resource_len(pdev, i); | |
543 | if (!len) | |
544 | continue; | |
545 | pci_iounmap(pdev, (void *) pdev->resource[i].start); | |
546 | } | |
547 | } | |
cd248341 | 548 | |
cd248341 JG |
549 | struct zpci_dev *zpci_alloc_device(void) |
550 | { | |
551 | struct zpci_dev *zdev; | |
552 | ||
553 | /* Alloc memory for our private pci device data */ | |
554 | zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); | |
5d0d8f43 | 555 | return zdev ? : ERR_PTR(-ENOMEM); |
cd248341 JG |
556 | } |
557 | ||
558 | void zpci_free_device(struct zpci_dev *zdev) | |
559 | { | |
560 | kfree(zdev); | |
561 | } | |
562 | ||
1e8da956 JG |
563 | int pcibios_add_platform_entries(struct pci_dev *pdev) |
564 | { | |
565 | return zpci_sysfs_add_device(&pdev->dev); | |
566 | } | |
567 | ||
9a4da8a5 JG |
568 | static int __init zpci_irq_init(void) |
569 | { | |
5d0d8f43 | 570 | int rc; |
9a4da8a5 | 571 | |
f4eae94f MS |
572 | rc = register_adapter_interrupt(&zpci_airq); |
573 | if (rc) | |
5d0d8f43 | 574 | goto out; |
f4eae94f MS |
575 | /* Set summary to 1 to be called every time for the ISC. */ |
576 | *zpci_airq.lsi_ptr = 1; | |
9a4da8a5 | 577 | |
5d0d8f43 MS |
578 | rc = -ENOMEM; |
579 | zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC); | |
580 | if (!zpci_aisb_iv) | |
581 | goto out_airq; | |
9a4da8a5 | 582 | |
9389339f | 583 | zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); |
9a4da8a5 JG |
584 | return 0; |
585 | ||
5d0d8f43 MS |
586 | out_airq: |
587 | unregister_adapter_interrupt(&zpci_airq); | |
588 | out: | |
9a4da8a5 JG |
589 | return rc; |
590 | } | |
591 | ||
592 | static void zpci_irq_exit(void) | |
593 | { | |
5d0d8f43 | 594 | airq_iv_release(zpci_aisb_iv); |
f4eae94f | 595 | unregister_adapter_interrupt(&zpci_airq); |
9a4da8a5 JG |
596 | } |
597 | ||
cd248341 JG |
598 | static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size, |
599 | unsigned long flags, int domain) | |
600 | { | |
601 | struct resource *r; | |
602 | char *name; | |
603 | int rc; | |
604 | ||
605 | r = kzalloc(sizeof(*r), GFP_KERNEL); | |
606 | if (!r) | |
607 | return ERR_PTR(-ENOMEM); | |
608 | r->start = start; | |
609 | r->end = r->start + size - 1; | |
610 | r->flags = flags; | |
611 | r->parent = &iomem_resource; | |
612 | name = kmalloc(18, GFP_KERNEL); | |
613 | if (!name) { | |
614 | kfree(r); | |
615 | return ERR_PTR(-ENOMEM); | |
616 | } | |
617 | sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR); | |
618 | r->name = name; | |
619 | ||
620 | rc = request_resource(&iomem_resource, r); | |
1f1dcbd4 SO |
621 | if (rc) { |
622 | kfree(r->name); | |
623 | kfree(r); | |
624 | return ERR_PTR(-ENOMEM); | |
625 | } | |
cd248341 JG |
626 | return r; |
627 | } | |
628 | ||
629 | static int zpci_alloc_iomap(struct zpci_dev *zdev) | |
630 | { | |
631 | int entry; | |
632 | ||
633 | spin_lock(&zpci_iomap_lock); | |
634 | entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); | |
635 | if (entry == ZPCI_IOMAP_MAX_ENTRIES) { | |
636 | spin_unlock(&zpci_iomap_lock); | |
637 | return -ENOSPC; | |
638 | } | |
639 | set_bit(entry, zpci_iomap); | |
640 | spin_unlock(&zpci_iomap_lock); | |
641 | return entry; | |
642 | } | |
643 | ||
644 | static void zpci_free_iomap(struct zpci_dev *zdev, int entry) | |
645 | { | |
646 | spin_lock(&zpci_iomap_lock); | |
647 | memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry)); | |
648 | clear_bit(entry, zpci_iomap); | |
649 | spin_unlock(&zpci_iomap_lock); | |
650 | } | |
651 | ||
af0a8a84 SO |
652 | int pcibios_add_device(struct pci_dev *pdev) |
653 | { | |
654 | struct zpci_dev *zdev = get_zdev(pdev); | |
cb809182 SO |
655 | struct resource *res; |
656 | int i; | |
657 | ||
658 | zdev->pdev = pdev; | |
659 | zpci_map_resources(zdev); | |
660 | ||
661 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
662 | res = &pdev->resource[i]; | |
663 | if (res->parent || !res->flags) | |
664 | continue; | |
665 | pci_claim_resource(pdev, i); | |
666 | } | |
667 | ||
668 | return 0; | |
669 | } | |
670 | ||
671 | int pcibios_enable_device(struct pci_dev *pdev, int mask) | |
672 | { | |
673 | struct zpci_dev *zdev = get_zdev(pdev); | |
674 | struct resource *res; | |
675 | u16 cmd; | |
676 | int i; | |
af0a8a84 | 677 | |
1c21351b | 678 | zdev->pdev = pdev; |
af0a8a84 SO |
679 | zpci_debug_init_device(zdev); |
680 | zpci_fmb_enable_device(zdev); | |
681 | zpci_map_resources(zdev); | |
682 | ||
cb809182 SO |
683 | pci_read_config_word(pdev, PCI_COMMAND, &cmd); |
684 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
685 | res = &pdev->resource[i]; | |
686 | ||
687 | if (res->flags & IORESOURCE_IO) | |
688 | return -EINVAL; | |
689 | ||
690 | if (res->flags & IORESOURCE_MEM) | |
691 | cmd |= PCI_COMMAND_MEMORY; | |
692 | } | |
693 | pci_write_config_word(pdev, PCI_COMMAND, cmd); | |
af0a8a84 SO |
694 | return 0; |
695 | } | |
696 | ||
cb809182 | 697 | void pcibios_disable_device(struct pci_dev *pdev) |
944239c5 SO |
698 | { |
699 | struct zpci_dev *zdev = get_zdev(pdev); | |
700 | ||
701 | zpci_unmap_resources(zdev); | |
702 | zpci_fmb_disable_device(zdev); | |
703 | zpci_debug_exit_device(zdev); | |
704 | zdev->pdev = NULL; | |
705 | } | |
706 | ||
69db3b5e SO |
707 | #ifdef CONFIG_HIBERNATE_CALLBACKS |
708 | static int zpci_restore(struct device *dev) | |
709 | { | |
710 | struct zpci_dev *zdev = get_zdev(to_pci_dev(dev)); | |
711 | int ret = 0; | |
712 | ||
713 | if (zdev->state != ZPCI_FN_STATE_ONLINE) | |
714 | goto out; | |
715 | ||
716 | ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); | |
717 | if (ret) | |
718 | goto out; | |
719 | ||
720 | zpci_map_resources(zdev); | |
721 | zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET, | |
722 | zdev->start_dma + zdev->iommu_size - 1, | |
723 | (u64) zdev->dma_table); | |
724 | ||
725 | out: | |
726 | return ret; | |
727 | } | |
728 | ||
729 | static int zpci_freeze(struct device *dev) | |
730 | { | |
731 | struct zpci_dev *zdev = get_zdev(to_pci_dev(dev)); | |
732 | ||
733 | if (zdev->state != ZPCI_FN_STATE_ONLINE) | |
734 | return 0; | |
735 | ||
736 | zpci_unregister_ioat(zdev, 0); | |
737 | return clp_disable_fh(zdev); | |
738 | } | |
739 | ||
740 | struct dev_pm_ops pcibios_pm_ops = { | |
741 | .thaw_noirq = zpci_restore, | |
742 | .freeze_noirq = zpci_freeze, | |
743 | .restore_noirq = zpci_restore, | |
744 | .poweroff_noirq = zpci_freeze, | |
745 | }; | |
746 | #endif /* CONFIG_HIBERNATE_CALLBACKS */ | |
747 | ||
1c21351b | 748 | static int zpci_scan_bus(struct zpci_dev *zdev) |
cd248341 JG |
749 | { |
750 | struct resource *res; | |
751 | LIST_HEAD(resources); | |
752 | int i; | |
753 | ||
754 | /* allocate mapping entry for each used bar */ | |
755 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
756 | unsigned long addr, size, flags; | |
757 | int entry; | |
758 | ||
759 | if (!zdev->bars[i].size) | |
760 | continue; | |
761 | entry = zpci_alloc_iomap(zdev); | |
762 | if (entry < 0) | |
763 | return entry; | |
764 | zdev->bars[i].map_idx = entry; | |
765 | ||
766 | /* only MMIO is supported */ | |
767 | flags = IORESOURCE_MEM; | |
768 | if (zdev->bars[i].val & 8) | |
769 | flags |= IORESOURCE_PREFETCH; | |
770 | if (zdev->bars[i].val & 4) | |
771 | flags |= IORESOURCE_MEM_64; | |
772 | ||
773 | addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48); | |
774 | ||
775 | size = 1UL << zdev->bars[i].size; | |
776 | ||
777 | res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain); | |
778 | if (IS_ERR(res)) { | |
779 | zpci_free_iomap(zdev, entry); | |
780 | return PTR_ERR(res); | |
781 | } | |
782 | pci_add_resource(&resources, res); | |
783 | } | |
784 | ||
1c21351b SO |
785 | zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops, |
786 | zdev, &resources); | |
cd248341 JG |
787 | if (!zdev->bus) |
788 | return -EIO; | |
789 | ||
790 | zdev->bus->max_bus_speed = zdev->max_bus_speed; | |
791 | return 0; | |
792 | } | |
793 | ||
794 | static int zpci_alloc_domain(struct zpci_dev *zdev) | |
795 | { | |
796 | spin_lock(&zpci_domain_lock); | |
797 | zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES); | |
798 | if (zdev->domain == ZPCI_NR_DEVICES) { | |
799 | spin_unlock(&zpci_domain_lock); | |
800 | return -ENOSPC; | |
801 | } | |
802 | set_bit(zdev->domain, zpci_domain); | |
803 | spin_unlock(&zpci_domain_lock); | |
804 | return 0; | |
805 | } | |
806 | ||
807 | static void zpci_free_domain(struct zpci_dev *zdev) | |
808 | { | |
809 | spin_lock(&zpci_domain_lock); | |
810 | clear_bit(zdev->domain, zpci_domain); | |
811 | spin_unlock(&zpci_domain_lock); | |
812 | } | |
813 | ||
a755a45d JG |
814 | int zpci_enable_device(struct zpci_dev *zdev) |
815 | { | |
816 | int rc; | |
817 | ||
818 | rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); | |
819 | if (rc) | |
820 | goto out; | |
828b35f6 JG |
821 | |
822 | rc = zpci_dma_init_device(zdev); | |
823 | if (rc) | |
824 | goto out_dma; | |
0ff70ec8 SO |
825 | |
826 | zdev->state = ZPCI_FN_STATE_ONLINE; | |
a755a45d | 827 | return 0; |
828b35f6 JG |
828 | |
829 | out_dma: | |
830 | clp_disable_fh(zdev); | |
a755a45d JG |
831 | out: |
832 | return rc; | |
833 | } | |
834 | EXPORT_SYMBOL_GPL(zpci_enable_device); | |
835 | ||
cb65a669 SO |
836 | int zpci_disable_device(struct zpci_dev *zdev) |
837 | { | |
838 | zpci_dma_exit_device(zdev); | |
839 | return clp_disable_fh(zdev); | |
840 | } | |
841 | EXPORT_SYMBOL_GPL(zpci_disable_device); | |
842 | ||
cd248341 JG |
843 | int zpci_create_device(struct zpci_dev *zdev) |
844 | { | |
845 | int rc; | |
846 | ||
847 | rc = zpci_alloc_domain(zdev); | |
848 | if (rc) | |
849 | goto out; | |
850 | ||
1c21351b SO |
851 | if (zdev->state == ZPCI_FN_STATE_CONFIGURED) { |
852 | rc = zpci_enable_device(zdev); | |
853 | if (rc) | |
854 | goto out_free; | |
1c21351b SO |
855 | } |
856 | rc = zpci_scan_bus(zdev); | |
cd248341 | 857 | if (rc) |
1c21351b | 858 | goto out_disable; |
cd248341 | 859 | |
57b5918c | 860 | spin_lock(&zpci_list_lock); |
cd248341 | 861 | list_add_tail(&zdev->entry, &zpci_list); |
57b5918c | 862 | spin_unlock(&zpci_list_lock); |
cd248341 | 863 | |
67f43f38 SO |
864 | zpci_init_slot(zdev); |
865 | ||
cd248341 JG |
866 | return 0; |
867 | ||
1c21351b SO |
868 | out_disable: |
869 | if (zdev->state == ZPCI_FN_STATE_ONLINE) | |
870 | zpci_disable_device(zdev); | |
871 | out_free: | |
cd248341 JG |
872 | zpci_free_domain(zdev); |
873 | out: | |
874 | return rc; | |
875 | } | |
876 | ||
877 | void zpci_stop_device(struct zpci_dev *zdev) | |
878 | { | |
828b35f6 | 879 | zpci_dma_exit_device(zdev); |
cd248341 JG |
880 | /* |
881 | * Note: SCLP disables fh via set-pci-fn so don't | |
882 | * do that here. | |
883 | */ | |
884 | } | |
885 | EXPORT_SYMBOL_GPL(zpci_stop_device); | |
886 | ||
cd248341 JG |
887 | static inline int barsize(u8 size) |
888 | { | |
889 | return (size) ? (1 << size) >> 10 : 0; | |
890 | } | |
891 | ||
892 | static int zpci_mem_init(void) | |
893 | { | |
d0b08853 JG |
894 | zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb), |
895 | 16, 0, NULL); | |
896 | if (!zdev_fmb_cache) | |
1f44a225 | 897 | goto error_zdev; |
d0b08853 | 898 | |
cd248341 JG |
899 | /* TODO: use realloc */ |
900 | zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start), | |
901 | GFP_KERNEL); | |
902 | if (!zpci_iomap_start) | |
9a4da8a5 | 903 | goto error_iomap; |
cd248341 JG |
904 | return 0; |
905 | ||
9a4da8a5 | 906 | error_iomap: |
d0b08853 | 907 | kmem_cache_destroy(zdev_fmb_cache); |
cd248341 JG |
908 | error_zdev: |
909 | return -ENOMEM; | |
910 | } | |
911 | ||
912 | static void zpci_mem_exit(void) | |
913 | { | |
914 | kfree(zpci_iomap_start); | |
d0b08853 | 915 | kmem_cache_destroy(zdev_fmb_cache); |
cd248341 JG |
916 | } |
917 | ||
67f43f38 | 918 | static unsigned int s390_pci_probe; |
cd248341 JG |
919 | |
920 | char * __init pcibios_setup(char *str) | |
921 | { | |
89b0dc95 SO |
922 | if (!strcmp(str, "on")) { |
923 | s390_pci_probe = 1; | |
cd248341 JG |
924 | return NULL; |
925 | } | |
926 | return str; | |
927 | } | |
928 | ||
929 | static int __init pci_base_init(void) | |
930 | { | |
931 | int rc; | |
932 | ||
1e5635d1 | 933 | if (!s390_pci_probe) |
cd248341 JG |
934 | return 0; |
935 | ||
936 | if (!test_facility(2) || !test_facility(69) | |
937 | || !test_facility(71) || !test_facility(72)) | |
938 | return 0; | |
939 | ||
d0b08853 JG |
940 | rc = zpci_debug_init(); |
941 | if (rc) | |
1f44a225 | 942 | goto out; |
d0b08853 | 943 | |
cd248341 JG |
944 | rc = zpci_mem_init(); |
945 | if (rc) | |
946 | goto out_mem; | |
947 | ||
9a4da8a5 JG |
948 | rc = zpci_irq_init(); |
949 | if (rc) | |
950 | goto out_irq; | |
951 | ||
828b35f6 JG |
952 | rc = zpci_dma_init(); |
953 | if (rc) | |
954 | goto out_dma; | |
955 | ||
1d578966 | 956 | rc = clp_scan_pci_devices(); |
a755a45d JG |
957 | if (rc) |
958 | goto out_find; | |
959 | ||
cd248341 JG |
960 | return 0; |
961 | ||
a755a45d | 962 | out_find: |
828b35f6 JG |
963 | zpci_dma_exit(); |
964 | out_dma: | |
9a4da8a5 JG |
965 | zpci_irq_exit(); |
966 | out_irq: | |
cd248341 JG |
967 | zpci_mem_exit(); |
968 | out_mem: | |
d0b08853 | 969 | zpci_debug_exit(); |
1f44a225 | 970 | out: |
cd248341 JG |
971 | return rc; |
972 | } | |
67f43f38 | 973 | subsys_initcall_sync(pci_base_init); |
57b5918c SO |
974 | |
975 | void zpci_rescan(void) | |
976 | { | |
977 | clp_rescan_pci_devices_simple(); | |
978 | } |