sh: Silence sq compile warning on sh4 nommu.
[deliverable/linux.git] / arch / sh / Kconfig
CommitLineData
1da177e4
LT
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux/SuperH Kernel Configuration"
7
8config SUPERH
9 bool
10 default y
7a440c95 11 select EMBEDDED
1da177e4
LT
12 help
13 The SuperH is a RISC processor targeted for use in embedded systems
14 and consumer electronics; it was also used in the Sega Dreamcast
15 gaming console. The SuperH port has a home page at
16 <http://www.linux-sh.org/>.
17
1da177e4
LT
18config RWSEM_GENERIC_SPINLOCK
19 bool
20 default y
21
22config RWSEM_XCHGADD_ALGORITHM
23 bool
24
fa691511
PM
25config GENERIC_BUG
26 def_bool y
27 depends on BUG
28
e2268c71
AM
29config GENERIC_FIND_NEXT_BIT
30 bool
31 default y
32
33config GENERIC_HWEIGHT
34 bool
35 default y
36
1da177e4
LT
37config GENERIC_HARDIRQS
38 bool
39 default y
40
41config GENERIC_IRQ_PROBE
42 bool
43 default y
44
45config GENERIC_CALIBRATE_DELAY
46 bool
47 default y
48
cad82448
PM
49config GENERIC_IOMAP
50 bool
51
45882145
PM
52config GENERIC_TIME
53 def_bool n
54
57be2b48
PM
55config GENERIC_CLOCKEVENTS
56 def_bool n
57
357d5946
PM
58config SYS_SUPPORTS_PM
59 bool
60
0a9b0db1
PM
61config SYS_SUPPORTS_APM_EMULATION
62 bool
357d5946
PM
63 select SYS_SUPPORTS_PM
64
65config SYS_SUPPORTS_SMP
66 bool
67
68config SYS_SUPPORTS_NUMA
69 bool
70
71config SYS_SUPPORTS_PCI
72 bool
0a9b0db1 73
a08b6b79
Z
74config ARCH_MAY_HAVE_PC_FDC
75 bool
a08b6b79 76
afbfb52e
PM
77config STACKTRACE_SUPPORT
78 bool
79 default y
80
81config LOCKDEP_SUPPORT
82 bool
83 default y
84
f0d1b0b3
DH
85config ARCH_HAS_ILOG2_U32
86 bool
87 default n
88
89config ARCH_HAS_ILOG2_U64
90 bool
91 default n
92
1da177e4
LT
93source "init/Kconfig"
94
95menu "System type"
96
f3d22298
PM
97source "arch/sh/mm/Kconfig"
98
99menu "Processor features"
bc8fb5d0 100
1da177e4 101choice
f3d22298
PM
102 prompt "Endianess selection"
103 default CPU_LITTLE_ENDIAN
104 help
105 Some SuperH machines can be configured for either little or big
106 endian byte order. These modes require different kernels.
107
108config CPU_LITTLE_ENDIAN
109 bool "Little Endian"
110
111config CPU_BIG_ENDIAN
112 bool "Big Endian"
113
114endchoice
115
116config SH_FPU
117 bool "FPU support"
357d5946 118 depends on CPU_SH4
f3d22298
PM
119 default y
120 help
121 Selecting this option will enable support for SH processors that
122 have FPU units (ie, SH77xx).
123
124 This option must be set in order to enable the FPU.
125
126config SH_FPU_EMU
127 bool "FPU emulation support"
128 depends on !SH_FPU && EXPERIMENTAL
129 default n
130 help
131 Selecting this option will enable support for software FPU emulation.
132 Most SH-3 users will want to say Y here, whereas most SH-4 users will
133 want to say N.
134
135config SH_DSP
136 bool "DSP support"
137 default y if SH4AL_DSP || !CPU_SH4
138 default n
139 help
140 Selecting this option will enable support for SH processors that
141 have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
142
143 This option must be set in order to enable the DSP.
144
145config SH_ADC
146 bool "ADC support"
147 depends on CPU_SH3
148 default y
149 help
150 Selecting this option will allow the Linux kernel to use SH3 on-chip
151 ADC module.
152
153 If unsure, say N.
154
155config SH_STORE_QUEUES
156 bool "Support for Store Queues"
157 depends on CPU_SH4
158 help
159 Selecting this option will enable an in-kernel API for manipulating
160 the store queues integrated in the SH-4 processors.
161
162config SPECULATIVE_EXECUTION
163 bool "Speculative subroutine return"
164 depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
165 help
166 This enables support for a speculative instruction fetch for
167 subroutine return. There are various pitfalls associated with
168 this, as outlined in the SH7780 hardware manual.
169
170 If unsure, say N.
171
172config CPU_HAS_INTEVT
173 bool
174
f3d22298
PM
175config CPU_HAS_MASKREG_IRQ
176 bool
177
02ab3f70
MD
178config CPU_HAS_INTC_IRQ
179 bool
180
f3d22298
PM
181config CPU_HAS_INTC2_IRQ
182 bool
183
184config CPU_HAS_IPR_IRQ
185 bool
186
187config CPU_HAS_SR_RB
188 bool "CPU has SR.RB"
189 depends on CPU_SH3 || CPU_SH4
190 default y
191 help
192 This will enable the use of SR.RB register bank usage. Processors
193 that are lacking this bit must have another method in place for
194 accomplishing what is taken care of by the banked registers.
195
196 See <file:Documentation/sh/register-banks.txt> for further
197 information on SR.RB and register banking in the kernel in general.
198
199config CPU_HAS_PTEA
200 bool
201
202endmenu
203
204menu "Board support"
205
206config SOLUTION_ENGINE
207 bool
1da177e4
LT
208
209config SH_SOLUTION_ENGINE
210 bool "SolutionEngine"
bc8fb5d0 211 select SOLUTION_ENGINE
56386f64 212 select CPU_HAS_IPR_IRQ
f3d22298 213 depends on CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750
1da177e4
LT
214 help
215 Select SolutionEngine if configuring for a Hitachi SH7709
216 or SH7750 evaluation board.
217
f3d22298
PM
218config SH_7206_SOLUTION_ENGINE
219 bool "SolutionEngine7206"
220 select SOLUTION_ENGINE
221 depends on CPU_SUBTYPE_SH7206
222 help
223 Select 7206 SolutionEngine if configuring for a Hitachi SH7206
224 evaluation board.
225
226config SH_7619_SOLUTION_ENGINE
227 bool "SolutionEngine7619"
228 select SOLUTION_ENGINE
229 depends on CPU_SUBTYPE_SH7619
230 help
231 Select 7619 SolutionEngine if configuring for a Hitachi SH7619
232 evaluation board.
233
6865f0ea
RS
234config SH_7722_SOLUTION_ENGINE
235 bool "SolutionEngine7722"
236 select SOLUTION_ENGINE
f3d22298 237 depends on CPU_SUBTYPE_SH7722
6865f0ea
RS
238 help
239 Select 7722 SolutionEngine if configuring for a Hitachi SH772
240 evaluation board.
241
1da177e4
LT
242config SH_7751_SOLUTION_ENGINE
243 bool "SolutionEngine7751"
bc8fb5d0 244 select SOLUTION_ENGINE
56386f64 245 select CPU_HAS_IPR_IRQ
f3d22298 246 depends on CPU_SUBTYPE_SH7751
1da177e4
LT
247 help
248 Select 7751 SolutionEngine if configuring for a Hitachi SH7751
249 evaluation board.
b7576230
NI
250
251config SH_7780_SOLUTION_ENGINE
252 bool "SolutionEngine7780"
253 select SOLUTION_ENGINE
357d5946 254 select SYS_SUPPORTS_PCI
39c7aa9e 255 select CPU_HAS_INTC2_IRQ
f3d22298 256 depends on CPU_SUBTYPE_SH7780
b7576230
NI
257 help
258 Select 7780 SolutionEngine if configuring for a Renesas SH7780
259 evaluation board.
1da177e4
LT
260
261config SH_7300_SOLUTION_ENGINE
262 bool "SolutionEngine7300"
bc8fb5d0 263 select SOLUTION_ENGINE
f3d22298 264 depends on CPU_SUBTYPE_SH7300
1da177e4 265 help
bc8fb5d0
PM
266 Select 7300 SolutionEngine if configuring for a Hitachi
267 SH7300(SH-Mobile V) evaluation board.
268
269config SH_7343_SOLUTION_ENGINE
270 bool "SolutionEngine7343"
271 select SOLUTION_ENGINE
f3d22298 272 depends on CPU_SUBTYPE_SH7343
bc8fb5d0
PM
273 help
274 Select 7343 SolutionEngine if configuring for a Hitachi
275 SH7343 (SH-Mobile 3AS) evaluation board.
1da177e4 276
1da177e4
LT
277config SH_7751_SYSTEMH
278 bool "SystemH7751R"
f3d22298 279 depends on CPU_SUBTYPE_SH7751R
1da177e4
LT
280 help
281 Select SystemH if you are configuring for a Renesas SystemH
282 7751R evaluation board.
283
cad82448
PM
284config SH_HP6XX
285 bool "HP6XX"
0a9b0db1 286 select SYS_SUPPORTS_APM_EMULATION
357d5946 287 select HD6446X_SERIES
f3d22298 288 depends on CPU_SUBTYPE_SH7709
1da177e4 289 help
cad82448 290 Select HP6XX if configuring for a HP jornada HP6xx.
1da177e4
LT
291 More information (hardware only) at
292 <http://www.hp.com/jornada/>.
293
1da177e4
LT
294config SH_DREAMCAST
295 bool "Dreamcast"
357d5946 296 select SYS_SUPPORTS_PCI
f3d22298 297 depends on CPU_SUBTYPE_SH7091
1da177e4
LT
298 help
299 Select Dreamcast if configuring for a SEGA Dreamcast.
300 More information at
301 <http://www.m17n.org/linux-sh/dreamcast/>. There is a
302 Dreamcast project is at <http://linuxdc.sourceforge.net/>.
303
1da177e4 304config SH_MPC1211
cad82448 305 bool "Interface MPC1211"
f3d22298 306 depends on CPU_SUBTYPE_SH7751 && BROKEN
cad82448
PM
307 help
308 CTP/PCI-SH02 is a CPU module computer that is produced
309 by Interface Corporation.
310 More information at <http://www.interface.co.jp>
1da177e4
LT
311
312config SH_SH03
cad82448 313 bool "Interface CTP/PCI-SH03"
f3d22298 314 depends on CPU_SUBTYPE_SH7751 && BROKEN
56386f64 315 select CPU_HAS_IPR_IRQ
357d5946 316 select SYS_SUPPORTS_PCI
1da177e4 317 help
cad82448 318 CTP/PCI-SH03 is a CPU module computer that is produced
1da177e4 319 by Interface Corporation.
1da177e4
LT
320 More information at <http://www.interface.co.jp>
321
322config SH_SECUREEDGE5410
323 bool "SecureEdge5410"
f3d22298 324 depends on CPU_SUBTYPE_SH7751R
56386f64 325 select CPU_HAS_IPR_IRQ
357d5946 326 select SYS_SUPPORTS_PCI
1da177e4
LT
327 help
328 Select SecureEdge5410 if configuring for a SnapGear SH board.
329 This includes both the OEM SecureEdge products as well as the
330 SME product line.
331
332config SH_HS7751RVOIP
333 bool "HS7751RVOIP"
f3d22298 334 depends on CPU_SUBTYPE_SH7751R
1da177e4
LT
335 help
336 Select HS7751RVOIP if configuring for a Renesas Technology
337 Sales VoIP board.
338
91b91d01
PM
339config SH_7710VOIPGW
340 bool "SH7710-VOIP-GW"
f3d22298 341 depends on CPU_SUBTYPE_SH7710
91b91d01
PM
342 help
343 Select this option to build a kernel for the SH7710 based
344 VOIP GW.
345
1da177e4
LT
346config SH_RTS7751R2D
347 bool "RTS7751R2D"
f3d22298 348 depends on CPU_SUBTYPE_SH7751R
357d5946 349 select SYS_SUPPORTS_PCI
1da177e4
LT
350 help
351 Select RTS7751R2D if configuring for a Renesas Technology
352 Sales SH-Graphics board.
353
32351a28
PM
354config SH_HIGHLANDER
355 bool "Highlander"
f3d22298 356 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
357d5946 357 select SYS_SUPPORTS_PCI
cad82448 358
1da177e4
LT
359config SH_EDOSK7705
360 bool "EDOSK7705"
f3d22298 361 depends on CPU_SUBTYPE_SH7705
1da177e4
LT
362
363config SH_SH4202_MICRODEV
364 bool "SH4-202 MicroDev"
f3d22298 365 depends on CPU_SUBTYPE_SH4_202
1da177e4
LT
366 help
367 Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
368 with an SH4-202 CPU.
369
cad82448
PM
370config SH_LANDISK
371 bool "LANDISK"
f3d22298 372 depends on CPU_SUBTYPE_SH7751R
357d5946 373 select SYS_SUPPORTS_PCI
cad82448
PM
374 help
375 I-O DATA DEVICE, INC. "LANDISK Series" support.
376
377config SH_TITAN
378 bool "TITAN"
f3d22298 379 depends on CPU_SUBTYPE_SH7751R
56386f64 380 select CPU_HAS_IPR_IRQ
357d5946 381 select SYS_SUPPORTS_PCI
cad82448
PM
382 help
383 Select Titan if you are configuring for a Nimble Microsystems
384 NetEngine NP51R.
385
51e22e7a
TY
386config SH_SHMIN
387 bool "SHMIN"
f3d22298 388 depends on CPU_SUBTYPE_SH7706
56386f64 389 select CPU_HAS_IPR_IRQ
51e22e7a 390 help
3cb2fccc 391 Select SHMIN if configuring for the SHMIN board.
51e22e7a 392
c86c5a91
NI
393config SH_LBOX_RE2
394 bool "L-BOX RE2"
f3d22298 395 depends on CPU_SUBTYPE_SH7751R
357d5946 396 select SYS_SUPPORTS_PCI
c86c5a91
NI
397 help
398 Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
9d4436a6 399
f3d22298 400endmenu
1da177e4 401
32351a28
PM
402source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
403source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
404source "arch/sh/boards/renesas/r7780rp/Kconfig"
405
32351a28
PM
406menu "Timer and clock configuration"
407
cad82448
PM
408config SH_TMU
409 bool "TMU timer support"
9d4436a6 410 depends on CPU_SH3 || CPU_SH4
57be2b48
PM
411 select GENERIC_TIME
412 select GENERIC_CLOCKEVENTS
1da177e4 413 default y
1da177e4 414 help
cad82448 415 This enables the use of the TMU as the system timer.
1da177e4 416
9d4436a6
YS
417config SH_CMT
418 bool "CMT timer support"
419 depends on CPU_SH2
420 default y
421 help
422 This enables the use of the CMT as the system timer.
423
424config SH_MTU2
425 bool "MTU2 timer support"
426 depends on CPU_SH2A
427 default n
428 help
429 This enables the use of the MTU2 as the system timer.
430
417528a2
PM
431config SH_TIMER_IRQ
432 int
32351a28 433 default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
417528a2
PM
434 default "86" if CPU_SUBTYPE_SH7619
435 default "140" if CPU_SUBTYPE_SH7206
436 default "16"
437
cad82448
PM
438config SH_PCLK_FREQ
439 int "Peripheral clock frequency (in Hz)"
870e8a24 440 default "27000000" if CPU_SUBTYPE_SH7343
9d4436a6 441 default "31250000" if CPU_SUBTYPE_SH7619
05627486 442 default "32000000" if CPU_SUBTYPE_SH7722
9d4436a6
YS
443 default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \
444 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
445 CPU_SUBTYPE_SH7206
05627486 446 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
cad82448 447 default "66000000" if CPU_SUBTYPE_SH4_202
05627486 448 default "50000000"
1da177e4 449 help
cad82448
PM
450 This option is used to specify the peripheral clock frequency.
451 This is necessary for determining the reference clock value on
452 platforms lacking an RTC.
1da177e4 453
9d4436a6
YS
454config SH_CLK_MD
455 int "CPU Mode Pin Setting"
456 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
357d5946
PM
457 default 6 if CPU_SUBTYPE_SH7206
458 default 5 if CPU_SUBTYPE_SH7619
459 default 0
9d4436a6 460 help
11cbb70e 461 MD2 - MD0 pin setting.
9d4436a6 462
57be2b48
PM
463source "kernel/time/Kconfig"
464
32351a28
PM
465endmenu
466
cad82448
PM
467menu "CPU Frequency scaling"
468
469source "drivers/cpufreq/Kconfig"
1da177e4 470
cad82448
PM
471config SH_CPU_FREQ
472 tristate "SuperH CPU Frequency driver"
cb5ec75b 473 depends on CPU_FREQ
cad82448 474 select CPU_FREQ_TABLE
1da177e4 475 help
cad82448
PM
476 This adds the cpufreq driver for SuperH. At present, only
477 the SH-4 is supported.
1da177e4 478
cad82448 479 For details, take a look at <file:Documentation/cpu-freq>.
1da177e4
LT
480
481 If unsure, say N.
482
cad82448
PM
483endmenu
484
9f5e8eee
PM
485source "arch/sh/drivers/Kconfig"
486
cad82448 487endmenu
1da177e4 488
cad82448
PM
489config ISA_DMA_API
490 bool
05efc67d 491 depends on SH_MPC1211
cad82448 492 default y
1da177e4 493
cad82448
PM
494menu "Kernel features"
495
91b91d01
PM
496source kernel/Kconfig.hz
497
cad82448
PM
498config KEXEC
499 bool "kexec system call (EXPERIMENTAL)"
500 depends on EXPERIMENTAL
1da177e4 501 help
cad82448
PM
502 kexec is a system call that implements the ability to shutdown your
503 current kernel, and to start another kernel. It is like a reboot
1f1332f7 504 but it is independent of the system firmware. And like a reboot
cad82448
PM
505 you can start any kernel with it, not just Linux.
506
1f1332f7 507 The name comes from the similarity to the exec system call.
cad82448
PM
508
509 It is an ongoing process to be certain the hardware in a machine
510 is properly shutdown, so do not be surprised if this code does not
511 initially work for you. It may help to enable device hotplugging
512 support. As of this writing the exact hardware interface is
513 strongly in flux, so no good recommendation can be made.
514
4d5ade5b
PM
515config CRASH_DUMP
516 bool "kernel crash dumps (EXPERIMENTAL)"
517 depends on EXPERIMENTAL
518 help
519 Generate crash dump after being started by kexec.
520 This should be normally only set in special crash dump kernels
521 which are loaded in the main kernel with kexec-tools into
522 a specially reserved region and then later executed after
523 a crash by kdump/kexec. The crash dump kernel must be compiled
524 to a memory address not used by the main kernel using
525 MEMORY_START.
526
527 For more details see Documentation/kdump/kdump.txt
528
1da177e4
LT
529config SMP
530 bool "Symmetric multi-processing support"
357d5946 531 depends on SYS_SUPPORTS_SMP
1da177e4
LT
532 ---help---
533 This enables support for systems with more than one CPU. If you have
534 a system with only one CPU, like most personal computers, say N. If
535 you have a system with more than one CPU, say Y.
536
537 If you say N here, the kernel will run on single and multiprocessor
538 machines, but will use only one CPU of a multiprocessor machine. If
539 you say Y here, the kernel will run on many, but not all,
540 singleprocessor machines. On a singleprocessor machine, the kernel
541 will run faster if you say N here.
542
543 People using multiprocessor machines who say Y here should also say
544 Y to "Enhanced Real Time Clock Support", below.
545
546 See also the <file:Documentation/smp.txt>,
547 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
548 at <http://www.tldp.org/docs.html#howto>.
549
550 If you don't know what to do here, say N.
551
552config NR_CPUS
553 int "Maximum number of CPUs (2-32)"
554 range 2 32
555 depends on SMP
2b1bd1ac 556 default "4" if CPU_SHX3
1da177e4
LT
557 default "2"
558 help
559 This allows you to specify the maximum number of CPUs which this
560 kernel will support. The maximum supported value is 32 and the
561 minimum value which makes sense is 2.
562
563 This is purely to save memory - each supported CPU adds
564 approximately eight kilobytes to the kernel image.
565
91b91d01
PM
566source "kernel/Kconfig.preempt"
567
c80d79d7
YG
568config NODES_SHIFT
569 int
570 default "1"
571 depends on NEED_MULTIPLE_NODES
572
cad82448 573endmenu
1da177e4 574
cad82448 575menu "Boot options"
1da177e4 576
cad82448
PM
577config ZERO_PAGE_OFFSET
578 hex "Zero page offset"
579 default "0x00004000" if SH_MPC1211 || SH_SH03
7a847f81
PM
580 default "0x00010000" if PAGE_SIZE_64KB
581 default "0x00002000" if PAGE_SIZE_8KB
cad82448 582 default "0x00001000"
1da177e4 583 help
cad82448 584 This sets the default offset of zero page.
1da177e4 585
cad82448
PM
586config BOOT_LINK_OFFSET
587 hex "Link address offset for booting"
588 default "0x00800000"
589 help
590 This option allows you to set the link address offset of the zImage.
591 This can be useful if you are on a board which has a small amount of
592 memory.
1da177e4 593
cad82448
PM
594config UBC_WAKEUP
595 bool "Wakeup UBC on startup"
357d5946 596 depends on CPU_SH4
cad82448
PM
597 help
598 Selecting this option will wakeup the User Break Controller (UBC) on
599 startup. Although the UBC is left in an awake state when the processor
600 comes up, some boot loaders misbehave by putting the UBC to sleep in a
601 power saving state, which causes issues with things like ptrace().
1da177e4 602
cad82448 603 If unsure, say N.
1da177e4 604
cad82448
PM
605config CMDLINE_BOOL
606 bool "Default bootloader kernel arguments"
1da177e4 607
cad82448
PM
608config CMDLINE
609 string "Initial kernel command string"
610 depends on CMDLINE_BOOL
611 default "console=ttySC1,115200"
1da177e4
LT
612
613endmenu
614
cad82448 615menu "Bus options"
1da177e4
LT
616
617# Even on SuperH devices which don't have an ISA bus,
618# this variable helps the PCMCIA modules handle
619# IRQ requesting properly -- Greg Banks.
620#
621# Though we're generally not interested in it when
622# we're not using PCMCIA, so we make it dependent on
623# PCMCIA outright. -- PFM.
624config ISA
357d5946
PM
625 def_bool y
626 depends on PCMCIA && HD6446X_SERIES
1da177e4
LT
627 help
628 Find out whether you have ISA slots on your motherboard. ISA is the
629 name of a bus system, i.e. the way the CPU talks to the other stuff
630 inside your box. Other bus systems are PCI, EISA, MicroChannel
631 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
632 newer boards don't support it. If you have ISA, say Y, otherwise N.
633
634config EISA
635 bool
636 ---help---
637 The Extended Industry Standard Architecture (EISA) bus was
638 developed as an open alternative to the IBM MicroChannel bus.
639
640 The EISA bus provided some of the features of the IBM MicroChannel
641 bus while maintaining backward compatibility with cards made for
642 the older ISA bus. The EISA bus saw limited use between 1988 and
643 1995 when it was made obsolete by the PCI bus.
644
645 Say Y here if you are building a kernel for an EISA-based machine.
646
647 Otherwise, say N.
648
649config MCA
650 bool
651 help
652 MicroChannel Architecture is found in some IBM PS/2 machines and
653 laptops. It is a bus system similar to PCI or ISA. See
654 <file:Documentation/mca.txt> (and especially the web page given
655 there) before attempting to build an MCA bus kernel.
656
657config SBUS
658 bool
659
cad82448
PM
660config SUPERHYWAY
661 tristate "SuperHyway Bus support"
662 depends on CPU_SUBTYPE_SH4_202
1da177e4 663
824e55f9
PM
664config CF_ENABLER
665 bool "Compact Flash Enabler support"
666 depends on SOLUTION_ENGINE || SH_SH03
667 ---help---
668 Compact Flash is a small, removable mass storage device introduced
669 in 1994 originally as a PCMCIA device. If you say `Y' here, you
670 compile in support for Compact Flash devices directly connected to
671 a SuperH processor. A Compact Flash FAQ is available at
672 <http://www.compactflash.org/faqs/faq.htm>.
673
674 If your board has "Directly Connected" CompactFlash at area 5 or 6,
675 you may want to enable this option. Then, you can use CF as
676 primary IDE drive (only tested for SanDisk).
677
678 If in doubt, select 'N'.
679
680choice
681 prompt "Compact Flash Connection Area"
682 depends on CF_ENABLER
683 default CF_AREA6
684
685config CF_AREA5
686 bool "Area5"
687 help
688 If your board has "Directly Connected" CompactFlash, You should
689 select the area where your CF is connected to.
690
691 - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
692 - "Area6" if it is connected to Area 6 (0x18000000)
693
694 "Area6" will work for most boards.
695
696config CF_AREA6
697 bool "Area6"
698
699endchoice
700
701config CF_BASE_ADDR
702 hex
703 depends on CF_ENABLER
704 default "0xb8000000" if CF_AREA6
705 default "0xb4000000" if CF_AREA5
706
1da177e4
LT
707source "arch/sh/drivers/pci/Kconfig"
708
709source "drivers/pci/Kconfig"
710
711source "drivers/pcmcia/Kconfig"
712
713source "drivers/pci/hotplug/Kconfig"
714
715endmenu
716
717menu "Executable file formats"
718
719source "fs/Kconfig.binfmt"
720
721endmenu
722
3aa770e7 723menu "Power management options (EXPERIMENTAL)"
357d5946 724depends on EXPERIMENTAL && SYS_SUPPORTS_PM
3aa770e7
AS
725
726source kernel/power/Kconfig
727
3aa770e7
AS
728endmenu
729
d5950b43
SR
730source "net/Kconfig"
731
1da177e4
LT
732source "drivers/Kconfig"
733
734source "fs/Kconfig"
735
736source "arch/sh/oprofile/Kconfig"
737
738source "arch/sh/Kconfig.debug"
739
740source "security/Kconfig"
741
742source "crypto/Kconfig"
743
744source "lib/Kconfig"
This page took 0.270223 seconds and 5 git commands to generate.