[deliverable/linux.git] / arch / sh / boards / mach-ap325rxa / setup.c

/*
 * Renesas - AP-325RXA
 * (Compatible with Algo System ., LTD. - AP-320A)
 *
 * Copyright (C) 2008 Renesas Solutions Corp.
 * Author : Yusuke Goda <goda.yuske@renesas.com>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/init.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/smc911x.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/io.h>
#include <asm/clock.h>

static struct smc911x_platdata smc911x_info = {
	.flags = SMC911X_USE_32BIT,
	.irq_flags = IRQF_TRIGGER_LOW,
};

static struct resource smc9118_resources[] = {
	[0] = {
		.start	= 0xb6080000,
		.end	= 0xb60fffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 35,
		.end	= 35,
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device smc9118_device = {
	.name		= "smc911x",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(smc9118_resources),
	.resource	= smc9118_resources,
	.dev		= {
		.platform_data = &smc911x_info,
	},
};

static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
	{
		 .name = "uboot",
		 .offset = 0,
		 .size = (1 * 1024 * 1024),
		 .mask_flags = MTD_WRITEABLE,	/* Read-only */
	}, {
		 .name = "kernel",
		 .offset = MTDPART_OFS_APPEND,
		 .size = (2 * 1024 * 1024),
	}, {
		 .name = "other",
		 .offset = MTDPART_OFS_APPEND,
		 .size = MTDPART_SIZ_FULL,
	},
};

static struct physmap_flash_data ap325rxa_nor_flash_data = {
	.width		= 2,
	.parts		= ap325rxa_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(ap325rxa_nor_flash_partitions),
};

static struct resource ap325rxa_nor_flash_resources[] = {
	[0] = {
		.name	= "NOR Flash",
		.start	= 0x00000000,
		.end	= 0x00ffffff,
		.flags	= IORESOURCE_MEM,
	}
};

static struct platform_device ap325rxa_nor_flash_device = {
	.name		= "physmap-flash",
	.resource	= ap325rxa_nor_flash_resources,
	.num_resources	= ARRAY_SIZE(ap325rxa_nor_flash_resources),
	.dev		= {
		.platform_data = &ap325rxa_nor_flash_data,
	},
};

#define FPGA_LCDREG	0xB4100180
#define FPGA_BKLREG	0xB4100212
#define FPGA_LCDREG_VAL	0x0018
#define PORT_PHCR	0xA405010E
#define PORT_PLCR	0xA4050114
#define PORT_PMCR	0xA4050116
#define PORT_PRCR	0xA405011C
#define PORT_PSCR	0xA405011E
#define PORT_PZCR	0xA405014C
#define PORT_HIZCRA	0xA4050158
#define PORT_MSELCRB	0xA4050182
#define PORT_PSDR	0xA405013E
#define PORT_PZDR	0xA405016C
#define PORT_PSELD	0xA4050154

static void ap320_wvga_power_on(void *board_data)
{
	msleep(100);

	/* ASD AP-320/325 LCD ON */
	ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);

	/* backlight */
	ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
	ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
	ctrl_outw(0x100, FPGA_BKLREG);
}

static struct sh_mobile_lcdc_info lcdc_info = {
	.clock_source = LCDC_CLK_EXTERNAL,
	.ch[0] = {
		.chan = LCDC_CHAN_MAINLCD,
		.bpp = 16,
		.interface_type = RGB18,
		.clock_divider = 1,
		.lcd_cfg = {
			.name = "LB070WV1",
			.xres = 800,
			.yres = 480,
			.left_margin = 40,
			.right_margin = 160,
			.hsync_len = 8,
			.upper_margin = 63,
			.lower_margin = 80,
			.vsync_len = 1,
			.sync = 0, /* hsync and vsync are active low */
		},
		.board_cfg = {
			.display_on = ap320_wvga_power_on,
		},
	}
};

static struct resource lcdc_resources[] = {
	[0] = {
		.name	= "LCDC",
		.start	= 0xfe940000, /* P4-only space */
		.end	= 0xfe941fff,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device lcdc_device = {
	.name		= "sh_mobile_lcdc_fb",
	.num_resources	= ARRAY_SIZE(lcdc_resources),
	.resource	= lcdc_resources,
	.dev		= {
		.platform_data	= &lcdc_info,
	},
};

#ifdef CONFIG_I2C
static unsigned char camera_ncm03j_magic[] =
{
	0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
	0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
	0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
	0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
	0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
	0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
	0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
	0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
	0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
	0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
	0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
	0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
	0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
	0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
	0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
	0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
};

static int camera_set_capture(struct soc_camera_platform_info *info,
			      int enable)
{
	struct i2c_adapter *a = i2c_get_adapter(0);
	struct i2c_msg msg;
	int ret = 0;
	int i;

	if (!enable)
		return 0; /* no disable for now */

	for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
		u_int8_t buf[8];

		msg.addr = 0x6e;
		msg.buf = buf;
		msg.len = 2;
		msg.flags = 0;

		buf[0] = camera_ncm03j_magic[i];
		buf[1] = camera_ncm03j_magic[i + 1];

		ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
	}

	return ret;
}

static struct soc_camera_platform_info camera_info = {
	.iface = 0,
	.format_name = "UYVY",
	.format_depth = 16,
	.format = {
		.pixelformat = V4L2_PIX_FMT_UYVY,
		.colorspace = V4L2_COLORSPACE_SMPTE170M,
		.width = 640,
		.height = 480,
	},
	.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
	SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
	.set_capture = camera_set_capture,
};

static struct platform_device camera_device = {
	.name		= "soc_camera_platform",
	.dev		= {
		.platform_data	= &camera_info,
	},
};
#endif /* CONFIG_I2C */

static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
	.flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
	SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
};

static struct resource ceu_resources[] = {
	[0] = {
		.name	= "CEU",
		.start	= 0xfe910000,
		.end	= 0xfe91009f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start  = 52,
		.flags  = IORESOURCE_IRQ,
	},
	[2] = {
		/* place holder for contiguous memory */
	},
};

static struct platform_device ceu_device = {
	.name		= "sh_mobile_ceu",
	.num_resources	= ARRAY_SIZE(ceu_resources),
	.resource	= ceu_resources,
	.dev		= {
		.platform_data	= &sh_mobile_ceu_info,
	},
};

static struct platform_device *ap325rxa_devices[] __initdata = {
	&smc9118_device,
	&ap325rxa_nor_flash_device,
	&lcdc_device,
	&ceu_device,
#ifdef CONFIG_I2C
	&camera_device,
#endif
};

static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
};

static int __init ap325rxa_devices_setup(void)
{
	clk_always_enable("mstp200"); /* LCDC */
	clk_always_enable("mstp203"); /* CEU */

	platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);

	i2c_register_board_info(0, ap325rxa_i2c_devices,
				ARRAY_SIZE(ap325rxa_i2c_devices));
 
	return platform_add_devices(ap325rxa_devices,
				ARRAY_SIZE(ap325rxa_devices));
}
device_initcall(ap325rxa_devices_setup);

static void __init ap325rxa_setup(char **cmdline_p)
{
	/* LCDC configuration */
	ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
	ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
	ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
	ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);

	/* CEU */
	ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
	ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
	ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
	ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
}

static struct sh_machine_vector mv_ap325rxa __initmv = {
	.mv_name = "AP-325RXA",
	.mv_setup = ap325rxa_setup,
};
Commit	Line	Data
04e917b6 YG	1	/*
	2	* Renesas - AP-325RXA
	3	* (Compatible with Algo System ., LTD. - AP-320A)
	4	*
	5	* Copyright (C) 2008 Renesas Solutions Corp.
	6	* Author : Yusuke Goda <goda.yuske@renesas.com>
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12
	13	#include <linux/init.h>
	14	#include <linux/device.h>
4875ea22	15	#include <linux/interrupt.h>
04e917b6 YG	16	#include <linux/platform_device.h>
	17	#include <linux/mtd/physmap.h>
	18	#include <linux/delay.h>
026953db	19	#include <linux/i2c.h>
6968980a	20	#include <linux/delay.h>
4875ea22	21	#include <linux/smc911x.h>
8b2224dc MD	22	#include <media/soc_camera_platform.h>
8b2224dc MD	23	#include <media/sh_mobile_ceu.h>
6968980a	24	#include <asm/sh_mobile_lcdc.h>
04e917b6	25	#include <asm/io.h>
6968980a	26	#include <asm/clock.h>
04e917b6	27
4875ea22 MD	28	static struct smc911x_platdata smc911x_info = {
	29	.flags = SMC911X_USE_32BIT,
	30	.irq_flags = IRQF_TRIGGER_LOW,
	31	};
	32
04e917b6 YG	33	static struct resource smc9118_resources[] = {
	34	[0] = {
	35	.start = 0xb6080000,
	36	.end = 0xb60fffff,
	37	.flags = IORESOURCE_MEM,
	38	},
	39	[1] = {
	40	.start = 35,
	41	.end = 35,
	42	.flags = IORESOURCE_IRQ,
	43	}
	44	};
	45
	46	static struct platform_device smc9118_device = {
	47	.name = "smc911x",
	48	.id = -1,
	49	.num_resources = ARRAY_SIZE(smc9118_resources),
	50	.resource = smc9118_resources,
4875ea22 MD	51	.dev = {
	52	.platform_data = &smc911x_info,
	53	},
04e917b6 YG	54	};
	55
	56	static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
	57	{
	58	.name = "uboot",
	59	.offset = 0,
	60	.size = (1 * 1024 * 1024),
	61	.mask_flags = MTD_WRITEABLE, /* Read-only */
	62	}, {
	63	.name = "kernel",
	64	.offset = MTDPART_OFS_APPEND,
	65	.size = (2 * 1024 * 1024),
	66	}, {
	67	.name = "other",
	68	.offset = MTDPART_OFS_APPEND,
	69	.size = MTDPART_SIZ_FULL,
	70	},
	71	};
	72
	73	static struct physmap_flash_data ap325rxa_nor_flash_data = {
	74	.width = 2,
	75	.parts = ap325rxa_nor_flash_partitions,
	76	.nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
	77	};
	78
	79	static struct resource ap325rxa_nor_flash_resources[] = {
	80	[0] = {
	81	.name = "NOR Flash",
	82	.start = 0x00000000,
	83	.end = 0x00ffffff,
	84	.flags = IORESOURCE_MEM,
	85	}
	86	};
	87
	88	static struct platform_device ap325rxa_nor_flash_device = {
	89	.name = "physmap-flash",
	90	.resource = ap325rxa_nor_flash_resources,
	91	.num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
	92	.dev = {
	93	.platform_data = &ap325rxa_nor_flash_data,
	94	},
	95	};
	96
6968980a MD	97	#define FPGA_LCDREG 0xB4100180
	98	#define FPGA_BKLREG 0xB4100212
	99	#define FPGA_LCDREG_VAL 0x0018
	100	#define PORT_PHCR 0xA405010E
	101	#define PORT_PLCR 0xA4050114
	102	#define PORT_PMCR 0xA4050116
	103	#define PORT_PRCR 0xA405011C
6968980a	104	#define PORT_PSCR 0xA405011E
8b2224dc MD	105	#define PORT_PZCR 0xA405014C
	106	#define PORT_HIZCRA 0xA4050158
	107	#define PORT_MSELCRB 0xA4050182
6968980a	108	#define PORT_PSDR 0xA405013E
8b2224dc MD	109	#define PORT_PZDR 0xA405016C
8b2224dc MD	110	#define PORT_PSELD 0xA4050154
6968980a MD	111
	112	static void ap320_wvga_power_on(void *board_data)
	113	{
	114	msleep(100);
	115
	116	/* ASD AP-320/325 LCD ON */
	117	ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
	118
	119	/* backlight */
	120	ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) \| 0x40, PORT_PSCR);
	121	ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
	122	ctrl_outw(0x100, FPGA_BKLREG);
	123	}
	124
	125	static struct sh_mobile_lcdc_info lcdc_info = {
	126	.clock_source = LCDC_CLK_EXTERNAL,
	127	.ch[0] = {
	128	.chan = LCDC_CHAN_MAINLCD,
	129	.bpp = 16,
	130	.interface_type = RGB18,
	131	.clock_divider = 1,
	132	.lcd_cfg = {
	133	.name = "LB070WV1",
	134	.xres = 800,
	135	.yres = 480,
	136	.left_margin = 40,
	137	.right_margin = 160,
	138	.hsync_len = 8,
	139	.upper_margin = 63,
	140	.lower_margin = 80,
	141	.vsync_len = 1,
	142	.sync = 0, /* hsync and vsync are active low */
	143	},
	144	.board_cfg = {
	145	.display_on = ap320_wvga_power_on,
	146	},
	147	}
	148	};
	149
	150	static struct resource lcdc_resources[] = {
	151	[0] = {
	152	.name = "LCDC",
	153	.start = 0xfe940000, /* P4-only space */
	154	.end = 0xfe941fff,
	155	.flags = IORESOURCE_MEM,
	156	},
	157	};
	158
	159	static struct platform_device lcdc_device = {
	160	.name = "sh_mobile_lcdc_fb",
	161	.num_resources = ARRAY_SIZE(lcdc_resources),
	162	.resource = lcdc_resources,
	163	.dev = {
	164	.platform_data = &lcdc_info,
	165	},
	166	};
	167
e565b518	168	#ifdef CONFIG_I2C
8b2224dc MD	169	static unsigned char camera_ncm03j_magic[] =
	170	{
	171	0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
	172	0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
	173	0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
	174	0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
	175	0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
	176	0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
	177	0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
	178	0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
	179	0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
	180	0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
	181	0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
	182	0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
	183	0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
	184	0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
	185	0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
	186	0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
	187	};
	188
	189	static int camera_set_capture(struct soc_camera_platform_info *info,
	190	int enable)
	191	{
	192	struct i2c_adapter *a = i2c_get_adapter(0);
	193	struct i2c_msg msg;
	194	int ret = 0;
	195	int i;
	196
	197	if (!enable)
	198	return 0; /* no disable for now */
	199
	200	for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
	201	u_int8_t buf[8];
	202
	203	msg.addr = 0x6e;
	204	msg.buf = buf;
	205	msg.len = 2;
	206	msg.flags = 0;
	207
	208	buf[0] = camera_ncm03j_magic[i];
	209	buf[1] = camera_ncm03j_magic[i + 1];
	210
	211	ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
	212	}
	213
	214	return ret;
	215	}
	216
	217	static struct soc_camera_platform_info camera_info = {
	218	.iface = 0,
	219	.format_name = "UYVY",
	220	.format_depth = 16,
	221	.format = {
	222	.pixelformat = V4L2_PIX_FMT_UYVY,
	223	.colorspace = V4L2_COLORSPACE_SMPTE170M,
	224	.width = 640,
	225	.height = 480,
	226	},
	227	.bus_param = SOCAM_PCLK_SAMPLE_RISING \| SOCAM_HSYNC_ACTIVE_HIGH \|
	228	SOCAM_VSYNC_ACTIVE_HIGH \| SOCAM_MASTER \| SOCAM_DATAWIDTH_8,
	229	.set_capture = camera_set_capture,
	230	};
	231
	232	static struct platform_device camera_device = {
233	.name = "soc_camera_platform",
234	.dev = {
235	.platform_data = &camera_info,
236	},
237	};
e565b518	238	#endif /* CONFIG_I2C */
8b2224dc MD	239
	240	static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
	241	.flags = SOCAM_PCLK_SAMPLE_RISING \| SOCAM_HSYNC_ACTIVE_HIGH \|
	242	SOCAM_VSYNC_ACTIVE_HIGH \| SOCAM_MASTER \| SOCAM_DATAWIDTH_8,
	243	};
	244
	245	static struct resource ceu_resources[] = {
	246	[0] = {
	247	.name = "CEU",
	248	.start = 0xfe910000,
	249	.end = 0xfe91009f,
	250	.flags = IORESOURCE_MEM,
	251	},
	252	[1] = {
	253	.start = 52,
	254	.flags = IORESOURCE_IRQ,
	255	},
	256	[2] = {
	257	/* place holder for contiguous memory */
	258	},
	259	};
	260
	261	static struct platform_device ceu_device = {
	262	.name = "sh_mobile_ceu",
	263	.num_resources = ARRAY_SIZE(ceu_resources),
	264	.resource = ceu_resources,
	265	.dev = {
	266	.platform_data = &sh_mobile_ceu_info,
	267	},
	268	};
	269
04e917b6 YG	270	static struct platform_device *ap325rxa_devices[] __initdata = {
04e917b6 YG	271	&smc9118_device,
6968980a MD	272	&ap325rxa_nor_flash_device,
6968980a MD	273	&lcdc_device,
8b2224dc	274	&ceu_device,
e565b518	275	#ifdef CONFIG_I2C
8b2224dc	276	&camera_device,
e565b518	277	#endif
04e917b6 YG	278	};
04e917b6 YG	279
026953db MD	280	static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
	281	};
	282
04e917b6 YG	283	static int __init ap325rxa_devices_setup(void)
04e917b6 YG	284	{
6968980a	285	clk_always_enable("mstp200"); /* LCDC */
8b2224dc MD	286	clk_always_enable("mstp203"); /* CEU */
	287
	288	platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
6968980a	289
026953db MD	290	i2c_register_board_info(0, ap325rxa_i2c_devices,
	291	ARRAY_SIZE(ap325rxa_i2c_devices));
	292
04e917b6 YG	293	return platform_add_devices(ap325rxa_devices,
	294	ARRAY_SIZE(ap325rxa_devices));
	295	}
	296	device_initcall(ap325rxa_devices_setup);
	297
04e917b6 YG	298	static void __init ap325rxa_setup(char **cmdline_p)
04e917b6 YG	299	{
6968980a MD	300	/* LCDC configuration */
	301	ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
	302	ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
	303	ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
	304	ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
	305	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
8b2224dc MD	306
	307	/* CEU */
	308	ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
	309	ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
	310	ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) \| 0x5500, PORT_PZCR);
	311	ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) \| 0x20, PORT_PZDR);
04e917b6 YG	312	}
	313
	314	static struct sh_machine_vector mv_ap325rxa __initmv = {
	315	.mv_name = "AP-325RXA",
	316	.mv_setup = ap325rxa_setup,
	317	};