Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Renesas Technology Sales RTS7751R2D Support. |
3 | * | |
9c57548f PM |
4 | * Copyright (C) 2002 - 2006 Atom Create Engineering Co., Ltd. |
5 | * Copyright (C) 2004 - 2007 Paul Mundt | |
ade2b3f6 PM |
6 | * |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
1da177e4 | 10 | */ |
1da177e4 | 11 | #include <linux/init.h> |
ade2b3f6 | 12 | #include <linux/platform_device.h> |
9c57548f | 13 | #include <linux/pata_platform.h> |
ade2b3f6 | 14 | #include <linux/serial_8250.h> |
c87a7111 | 15 | #include <linux/sm501.h> |
29ec6778 | 16 | #include <linux/sm501-regs.h> |
a56d276c | 17 | #include <linux/pm.h> |
cbd10dfb | 18 | #include <linux/fb.h> |
2c7834a6 | 19 | #include <asm/machvec.h> |
9c57548f | 20 | #include <asm/rts7751r2d.h> |
9c57548f | 21 | #include <asm/io.h> |
ade2b3f6 | 22 | |
9c57548f PM |
23 | static struct resource cf_ide_resources[] = { |
24 | [0] = { | |
25 | .start = PA_AREA5_IO + 0x1000, | |
43f4b8c7 | 26 | .end = PA_AREA5_IO + 0x1000 + 0x10 - 0x2, |
9c57548f PM |
27 | .flags = IORESOURCE_MEM, |
28 | }, | |
29 | [1] = { | |
30 | .start = PA_AREA5_IO + 0x80c, | |
43f4b8c7 | 31 | .end = PA_AREA5_IO + 0x80c, |
9c57548f PM |
32 | .flags = IORESOURCE_MEM, |
33 | }, | |
abac3f78 | 34 | #ifndef CONFIG_RTS7751R2D_1 /* For R2D-1 polling is preferred */ |
9c57548f | 35 | [2] = { |
2eeec856 | 36 | .start = IRQ_CF_IDE, |
9c57548f PM |
37 | .flags = IORESOURCE_IRQ, |
38 | }, | |
abac3f78 | 39 | #endif |
9c57548f PM |
40 | }; |
41 | ||
42 | static struct pata_platform_info pata_info = { | |
43 | .ioport_shift = 1, | |
44 | }; | |
45 | ||
46 | static struct platform_device cf_ide_device = { | |
47 | .name = "pata_platform", | |
48 | .id = -1, | |
49 | .num_resources = ARRAY_SIZE(cf_ide_resources), | |
50 | .resource = cf_ide_resources, | |
51 | .dev = { | |
52 | .platform_data = &pata_info, | |
53 | }, | |
54 | }; | |
55 | ||
f8b40d8c MD |
56 | static struct resource heartbeat_resources[] = { |
57 | [0] = { | |
58 | .start = PA_OUTPORT, | |
a1fd306b | 59 | .end = PA_OUTPORT, |
f8b40d8c MD |
60 | .flags = IORESOURCE_MEM, |
61 | }, | |
62 | }; | |
63 | ||
64 | static struct platform_device heartbeat_device = { | |
65 | .name = "heartbeat", | |
66 | .id = -1, | |
67 | .num_resources = ARRAY_SIZE(heartbeat_resources), | |
68 | .resource = heartbeat_resources, | |
69 | }; | |
70 | ||
71 | #ifdef CONFIG_MFD_SM501 | |
9c57548f PM |
72 | static struct plat_serial8250_port uart_platform_data[] = { |
73 | { | |
29ec6778 MD |
74 | .membase = (void __iomem *)0xb3e30000, |
75 | .mapbase = 0xb3e30000, | |
9c57548f | 76 | .iotype = UPIO_MEM, |
29ec6778 MD |
77 | .irq = IRQ_VOYAGER, |
78 | .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ, | |
9c57548f PM |
79 | .regshift = 2, |
80 | .uartclk = (9600 * 16), | |
3a353824 MD |
81 | }, |
82 | { 0 }, | |
9c57548f PM |
83 | }; |
84 | ||
ade2b3f6 PM |
85 | static struct platform_device uart_device = { |
86 | .name = "serial8250", | |
9c57548f | 87 | .id = PLAT8250_DEV_PLATFORM, |
ade2b3f6 PM |
88 | .dev = { |
89 | .platform_data = uart_platform_data, | |
90 | }, | |
91 | }; | |
92 | ||
c87a7111 PM |
93 | static struct resource sm501_resources[] = { |
94 | [0] = { | |
95 | .start = 0x10000000, | |
96 | .end = 0x13e00000 - 1, | |
97 | .flags = IORESOURCE_MEM, | |
98 | }, | |
99 | [1] = { | |
100 | .start = 0x13e00000, | |
101 | .end = 0x13ffffff, | |
102 | .flags = IORESOURCE_MEM, | |
103 | }, | |
104 | [2] = { | |
29ec6778 | 105 | .start = IRQ_VOYAGER, |
c87a7111 PM |
106 | .flags = IORESOURCE_IRQ, |
107 | }, | |
108 | }; | |
109 | ||
cbd10dfb MD |
110 | static struct fb_videomode sm501_default_mode = { |
111 | .pixclock = 35714, | |
112 | .xres = 640, | |
113 | .yres = 480, | |
114 | .left_margin = 105, | |
115 | .right_margin = 50, | |
116 | .upper_margin = 35, | |
117 | .lower_margin = 0, | |
118 | .hsync_len = 96, | |
119 | .vsync_len = 2, | |
120 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
121 | }; | |
122 | ||
123 | static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = { | |
124 | .def_bpp = 16, | |
125 | .def_mode = &sm501_default_mode, | |
126 | .flags = SM501FB_FLAG_USE_INIT_MODE | | |
127 | SM501FB_FLAG_USE_HWCURSOR | | |
128 | SM501FB_FLAG_USE_HWACCEL | | |
129 | SM501FB_FLAG_DISABLE_AT_EXIT, | |
130 | }; | |
131 | ||
132 | static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = { | |
133 | .flags = (SM501FB_FLAG_USE_INIT_MODE | | |
134 | SM501FB_FLAG_USE_HWCURSOR | | |
135 | SM501FB_FLAG_USE_HWACCEL | | |
136 | SM501FB_FLAG_DISABLE_AT_EXIT), | |
137 | ||
138 | }; | |
139 | ||
140 | static struct sm501_platdata_fb sm501_fb_pdata = { | |
141 | .fb_route = SM501_FB_OWN, | |
142 | .fb_crt = &sm501_pdata_fbsub_crt, | |
143 | .fb_pnl = &sm501_pdata_fbsub_pnl, | |
144 | .flags = SM501_FBPD_SWAP_FB_ENDIAN, | |
145 | }; | |
146 | ||
29ec6778 MD |
147 | static struct sm501_initdata sm501_initdata = { |
148 | .gpio_high = { | |
149 | .set = 0x00001fe0, | |
150 | .mask = 0x0, | |
151 | }, | |
152 | }; | |
153 | ||
cbd10dfb | 154 | static struct sm501_platdata sm501_platform_data = { |
29ec6778 | 155 | .init = &sm501_initdata, |
cbd10dfb MD |
156 | .fb = &sm501_fb_pdata, |
157 | }; | |
158 | ||
c87a7111 PM |
159 | static struct platform_device sm501_device = { |
160 | .name = "sm501", | |
161 | .id = -1, | |
cbd10dfb MD |
162 | .dev = { |
163 | .platform_data = &sm501_platform_data, | |
164 | }, | |
c87a7111 PM |
165 | .num_resources = ARRAY_SIZE(sm501_resources), |
166 | .resource = sm501_resources, | |
167 | }; | |
168 | ||
f8b40d8c MD |
169 | #endif /* CONFIG_MFD_SM501 */ |
170 | ||
ade2b3f6 | 171 | static struct platform_device *rts7751r2d_devices[] __initdata = { |
f8b40d8c | 172 | #ifdef CONFIG_MFD_SM501 |
ade2b3f6 | 173 | &uart_device, |
c87a7111 | 174 | &sm501_device, |
f8b40d8c | 175 | #endif |
43f4b8c7 | 176 | &cf_ide_device, |
f8b40d8c | 177 | &heartbeat_device, |
ade2b3f6 PM |
178 | }; |
179 | ||
180 | static int __init rts7751r2d_devices_setup(void) | |
181 | { | |
182 | return platform_add_devices(rts7751r2d_devices, | |
183 | ARRAY_SIZE(rts7751r2d_devices)); | |
184 | } | |
9c57548f | 185 | __initcall(rts7751r2d_devices_setup); |
1da177e4 | 186 | |
a56d276c PM |
187 | static void rts7751r2d_power_off(void) |
188 | { | |
189 | ctrl_outw(0x0001, PA_POWOFF); | |
190 | } | |
191 | ||
43f4b8c7 AS |
192 | static inline unsigned char is_ide_ioaddr(unsigned long addr) |
193 | { | |
194 | return ((cf_ide_resources[0].start <= addr && | |
195 | addr <= cf_ide_resources[0].end) || | |
196 | (cf_ide_resources[1].start <= addr && | |
197 | addr <= cf_ide_resources[1].end)); | |
198 | } | |
199 | ||
02353f5d | 200 | void rts7751r2d_writeb(u8 b, void __iomem *addr) |
43f4b8c7 AS |
201 | { |
202 | unsigned long tmp = (unsigned long __force)addr; | |
203 | ||
204 | if (is_ide_ioaddr(tmp)) | |
205 | ctrl_outw((u16)b, tmp); | |
206 | else | |
207 | ctrl_outb(b, tmp); | |
208 | } | |
209 | ||
02353f5d | 210 | u8 rts7751r2d_readb(void __iomem *addr) |
43f4b8c7 AS |
211 | { |
212 | unsigned long tmp = (unsigned long __force)addr; | |
213 | ||
214 | if (is_ide_ioaddr(tmp)) | |
215 | return ctrl_inw(tmp) & 0xff; | |
216 | else | |
217 | return ctrl_inb(tmp); | |
218 | } | |
219 | ||
1da177e4 LT |
220 | /* |
221 | * Initialize the board | |
222 | */ | |
2c7834a6 | 223 | static void __init rts7751r2d_setup(char **cmdline_p) |
1da177e4 | 224 | { |
29ec6778 | 225 | void __iomem *sm501_reg; |
9c57548f PM |
226 | u16 ver = ctrl_inw(PA_VERREG); |
227 | ||
228 | printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); | |
229 | ||
230 | printk(KERN_INFO "FPGA version:%d (revision:%d)\n", | |
231 | (ver >> 4) & 0xf, ver & 0xf); | |
2c7834a6 | 232 | |
1da177e4 | 233 | ctrl_outw(0x0000, PA_OUTPORT); |
a56d276c | 234 | pm_power_off = rts7751r2d_power_off; |
ade2b3f6 | 235 | |
29ec6778 MD |
236 | /* sm501 dram configuration: |
237 | * ColSizeX = 11 - External Memory Column Size: 256 words. | |
238 | * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks. | |
239 | * RstX = 1 - External Memory Reset: Normal. | |
240 | * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks. | |
241 | * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks. | |
242 | * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock. | |
243 | * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks. | |
244 | * Rst = 1 - Internal Memory Reset: Normal. | |
245 | * RA = 1 - Internal Memory Remain in Active State: Do not remain. | |
246 | */ | |
247 | ||
248 | sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; | |
249 | writel(readl(sm501_reg) | 0x00f107c0, sm501_reg); | |
250 | ||
251 | /* | |
252 | * Power Mode Gate - Enable UART0 | |
253 | */ | |
254 | ||
255 | sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE; | |
256 | writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg); | |
257 | ||
258 | sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE; | |
259 | writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg); | |
1da177e4 | 260 | } |
2c7834a6 PM |
261 | |
262 | /* | |
263 | * The Machine Vector | |
264 | */ | |
82f81f47 | 265 | static struct sh_machine_vector mv_rts7751r2d __initmv = { |
2c7834a6 PM |
266 | .mv_name = "RTS7751R2D", |
267 | .mv_setup = rts7751r2d_setup, | |
2c7834a6 | 268 | .mv_init_irq = init_rts7751r2d_IRQ, |
2c7834a6 | 269 | .mv_irq_demux = rts7751r2d_irq_demux, |
43f4b8c7 AS |
270 | .mv_writeb = rts7751r2d_writeb, |
271 | .mv_readb = rts7751r2d_readb, | |
2c7834a6 | 272 | }; |