Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Renesas Technology Sales RTS7751R2D Support. |
3 | * | |
9c57548f PM |
4 | * Copyright (C) 2002 - 2006 Atom Create Engineering Co., Ltd. |
5 | * Copyright (C) 2004 - 2007 Paul Mundt | |
ade2b3f6 PM |
6 | * |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
1da177e4 | 10 | */ |
1da177e4 | 11 | #include <linux/init.h> |
ade2b3f6 | 12 | #include <linux/platform_device.h> |
9c57548f | 13 | #include <linux/pata_platform.h> |
ade2b3f6 | 14 | #include <linux/serial_8250.h> |
c87a7111 | 15 | #include <linux/sm501.h> |
a56d276c | 16 | #include <linux/pm.h> |
2c7834a6 | 17 | #include <asm/machvec.h> |
9c57548f | 18 | #include <asm/rts7751r2d.h> |
adf1890b | 19 | #include <asm/voyagergx.h> |
9c57548f | 20 | #include <asm/io.h> |
ade2b3f6 PM |
21 | |
22 | static void __init voyagergx_serial_init(void) | |
23 | { | |
24 | unsigned long val; | |
25 | ||
26 | /* | |
27 | * GPIO Control | |
28 | */ | |
9c57548f | 29 | val = readl((void __iomem *)GPIO_MUX_HIGH); |
ade2b3f6 | 30 | val |= 0x00001fe0; |
9c57548f | 31 | writel(val, (void __iomem *)GPIO_MUX_HIGH); |
ade2b3f6 PM |
32 | |
33 | /* | |
34 | * Power Mode Gate | |
35 | */ | |
9c57548f | 36 | val = readl((void __iomem *)POWER_MODE0_GATE); |
ade2b3f6 | 37 | val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1); |
9c57548f | 38 | writel(val, (void __iomem *)POWER_MODE0_GATE); |
ade2b3f6 | 39 | |
9c57548f | 40 | val = readl((void __iomem *)POWER_MODE1_GATE); |
ade2b3f6 | 41 | val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1); |
9c57548f | 42 | writel(val, (void __iomem *)POWER_MODE1_GATE); |
ade2b3f6 PM |
43 | } |
44 | ||
9c57548f PM |
45 | static struct resource cf_ide_resources[] = { |
46 | [0] = { | |
47 | .start = PA_AREA5_IO + 0x1000, | |
43f4b8c7 | 48 | .end = PA_AREA5_IO + 0x1000 + 0x10 - 0x2, |
9c57548f PM |
49 | .flags = IORESOURCE_MEM, |
50 | }, | |
51 | [1] = { | |
52 | .start = PA_AREA5_IO + 0x80c, | |
43f4b8c7 | 53 | .end = PA_AREA5_IO + 0x80c, |
9c57548f PM |
54 | .flags = IORESOURCE_MEM, |
55 | }, | |
56 | [2] = { | |
2eeec856 | 57 | .start = IRQ_CF_IDE, |
9c57548f PM |
58 | .flags = IORESOURCE_IRQ, |
59 | }, | |
60 | }; | |
61 | ||
62 | static struct pata_platform_info pata_info = { | |
63 | .ioport_shift = 1, | |
64 | }; | |
65 | ||
66 | static struct platform_device cf_ide_device = { | |
67 | .name = "pata_platform", | |
68 | .id = -1, | |
69 | .num_resources = ARRAY_SIZE(cf_ide_resources), | |
70 | .resource = cf_ide_resources, | |
71 | .dev = { | |
72 | .platform_data = &pata_info, | |
73 | }, | |
74 | }; | |
75 | ||
f8b40d8c MD |
76 | static struct resource heartbeat_resources[] = { |
77 | [0] = { | |
78 | .start = PA_OUTPORT, | |
a1fd306b | 79 | .end = PA_OUTPORT, |
f8b40d8c MD |
80 | .flags = IORESOURCE_MEM, |
81 | }, | |
82 | }; | |
83 | ||
84 | static struct platform_device heartbeat_device = { | |
85 | .name = "heartbeat", | |
86 | .id = -1, | |
87 | .num_resources = ARRAY_SIZE(heartbeat_resources), | |
88 | .resource = heartbeat_resources, | |
89 | }; | |
90 | ||
91 | #ifdef CONFIG_MFD_SM501 | |
9c57548f PM |
92 | static struct plat_serial8250_port uart_platform_data[] = { |
93 | { | |
94 | .membase = (void __iomem *)VOYAGER_UART_BASE, | |
95 | .mapbase = VOYAGER_UART_BASE, | |
96 | .iotype = UPIO_MEM, | |
48180cab | 97 | .irq = IRQ_SM501_U0, |
9c57548f PM |
98 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
99 | .regshift = 2, | |
100 | .uartclk = (9600 * 16), | |
3a353824 MD |
101 | }, |
102 | { 0 }, | |
9c57548f PM |
103 | }; |
104 | ||
ade2b3f6 PM |
105 | static struct platform_device uart_device = { |
106 | .name = "serial8250", | |
9c57548f | 107 | .id = PLAT8250_DEV_PLATFORM, |
ade2b3f6 PM |
108 | .dev = { |
109 | .platform_data = uart_platform_data, | |
110 | }, | |
111 | }; | |
112 | ||
c87a7111 PM |
113 | static struct resource sm501_resources[] = { |
114 | [0] = { | |
115 | .start = 0x10000000, | |
116 | .end = 0x13e00000 - 1, | |
117 | .flags = IORESOURCE_MEM, | |
118 | }, | |
119 | [1] = { | |
120 | .start = 0x13e00000, | |
121 | .end = 0x13ffffff, | |
122 | .flags = IORESOURCE_MEM, | |
123 | }, | |
124 | [2] = { | |
48180cab | 125 | .start = IRQ_SM501_CV, |
c87a7111 PM |
126 | .flags = IORESOURCE_IRQ, |
127 | }, | |
128 | }; | |
129 | ||
130 | static struct platform_device sm501_device = { | |
131 | .name = "sm501", | |
132 | .id = -1, | |
133 | .num_resources = ARRAY_SIZE(sm501_resources), | |
134 | .resource = sm501_resources, | |
135 | }; | |
136 | ||
f8b40d8c MD |
137 | #endif /* CONFIG_MFD_SM501 */ |
138 | ||
ade2b3f6 | 139 | static struct platform_device *rts7751r2d_devices[] __initdata = { |
f8b40d8c | 140 | #ifdef CONFIG_MFD_SM501 |
ade2b3f6 | 141 | &uart_device, |
c87a7111 | 142 | &sm501_device, |
f8b40d8c | 143 | #endif |
43f4b8c7 | 144 | &cf_ide_device, |
f8b40d8c | 145 | &heartbeat_device, |
ade2b3f6 PM |
146 | }; |
147 | ||
148 | static int __init rts7751r2d_devices_setup(void) | |
149 | { | |
150 | return platform_add_devices(rts7751r2d_devices, | |
151 | ARRAY_SIZE(rts7751r2d_devices)); | |
152 | } | |
9c57548f | 153 | __initcall(rts7751r2d_devices_setup); |
1da177e4 | 154 | |
a56d276c PM |
155 | static void rts7751r2d_power_off(void) |
156 | { | |
157 | ctrl_outw(0x0001, PA_POWOFF); | |
158 | } | |
159 | ||
43f4b8c7 AS |
160 | static inline unsigned char is_ide_ioaddr(unsigned long addr) |
161 | { | |
162 | return ((cf_ide_resources[0].start <= addr && | |
163 | addr <= cf_ide_resources[0].end) || | |
164 | (cf_ide_resources[1].start <= addr && | |
165 | addr <= cf_ide_resources[1].end)); | |
166 | } | |
167 | ||
02353f5d | 168 | void rts7751r2d_writeb(u8 b, void __iomem *addr) |
43f4b8c7 AS |
169 | { |
170 | unsigned long tmp = (unsigned long __force)addr; | |
171 | ||
172 | if (is_ide_ioaddr(tmp)) | |
173 | ctrl_outw((u16)b, tmp); | |
174 | else | |
175 | ctrl_outb(b, tmp); | |
176 | } | |
177 | ||
02353f5d | 178 | u8 rts7751r2d_readb(void __iomem *addr) |
43f4b8c7 AS |
179 | { |
180 | unsigned long tmp = (unsigned long __force)addr; | |
181 | ||
182 | if (is_ide_ioaddr(tmp)) | |
183 | return ctrl_inw(tmp) & 0xff; | |
184 | else | |
185 | return ctrl_inb(tmp); | |
186 | } | |
187 | ||
1da177e4 LT |
188 | /* |
189 | * Initialize the board | |
190 | */ | |
2c7834a6 | 191 | static void __init rts7751r2d_setup(char **cmdline_p) |
1da177e4 | 192 | { |
9c57548f PM |
193 | u16 ver = ctrl_inw(PA_VERREG); |
194 | ||
195 | printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); | |
196 | ||
197 | printk(KERN_INFO "FPGA version:%d (revision:%d)\n", | |
198 | (ver >> 4) & 0xf, ver & 0xf); | |
2c7834a6 | 199 | |
1da177e4 | 200 | ctrl_outw(0x0000, PA_OUTPORT); |
a56d276c | 201 | pm_power_off = rts7751r2d_power_off; |
ade2b3f6 PM |
202 | |
203 | voyagergx_serial_init(); | |
1da177e4 | 204 | } |
2c7834a6 PM |
205 | |
206 | /* | |
207 | * The Machine Vector | |
208 | */ | |
82f81f47 | 209 | static struct sh_machine_vector mv_rts7751r2d __initmv = { |
2c7834a6 PM |
210 | .mv_name = "RTS7751R2D", |
211 | .mv_setup = rts7751r2d_setup, | |
2c7834a6 | 212 | .mv_init_irq = init_rts7751r2d_IRQ, |
2c7834a6 | 213 | .mv_irq_demux = rts7751r2d_irq_demux, |
43f4b8c7 AS |
214 | .mv_writeb = rts7751r2d_writeb, |
215 | .mv_readb = rts7751r2d_readb, | |
f8b40d8c | 216 | #if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD) |
2c7834a6 PM |
217 | .mv_consistent_alloc = voyagergx_consistent_alloc, |
218 | .mv_consistent_free = voyagergx_consistent_free, | |
219 | #endif | |
220 | }; |