[deliverable/linux.git] / arch / sh / boards / se / 770x / setup.c

/*
 * linux/arch/sh/boards/se/770x/setup.c
 *
 * Copyright (C) 2000  Kazumoto Kojima
 *
 * Hitachi SolutionEngine Support.
 *
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se.h>
#include <asm/io.h>
#include <asm/smc37c93x.h>
#include <asm/heartbeat.h>

/*
 * Configure the Super I/O chip
 */
static void __init smsc_config(int index, int data)
{
	outb_p(index, INDEX_PORT);
	outb_p(data, DATA_PORT);
}

/* XXX: Another candidate for a more generic cchip machine vector */
static void __init smsc_setup(char **cmdline_p)
{
	outb_p(CONFIG_ENTER, CONFIG_PORT);
	outb_p(CONFIG_ENTER, CONFIG_PORT);

	/* FDC */
	smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */

	/* AUXIO (GPIO): to use IDE1 */
	smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
	smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
	smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */

	/* COM1 */
	smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IO_BASE_HI_INDEX, 0x03);
	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */

	/* COM2 */
	smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IO_BASE_HI_INDEX, 0x02);
	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */

	/* RTC */
	smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */

	/* XXX: PARPORT, KBD, and MOUSE will come here... */
	outb_p(CONFIG_EXIT, CONFIG_PORT);
}


static struct resource cf_ide_resources[] = {
	[0] = {
		.start  = PA_MRSHPC_IO + 0x1f0,
		.end    = PA_MRSHPC_IO + 0x1f0 + 8,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = PA_MRSHPC_IO + 0x1f0 + 0x206,
		.end    = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
		.flags  = IORESOURCE_MEM,
	},
	[2] = {
		.start  = IRQ_CFCARD,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device cf_ide_device  = {
	.name           = "pata_platform",
	.id             = -1,
	.num_resources  = ARRAY_SIZE(cf_ide_resources),
	.resource       = cf_ide_resources,
};

static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };

static struct heartbeat_data heartbeat_data = {
	.bit_pos	= heartbeat_bit_pos,
	.nr_bits	= ARRAY_SIZE(heartbeat_bit_pos),
	.regsize	= 16,
};

static struct resource heartbeat_resources[] = {
	[0] = {
		.start	= PA_LED,
		.end	= PA_LED,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device heartbeat_device = {
	.name		= "heartbeat",
	.id		= -1,
	.dev	= {
		.platform_data	= &heartbeat_data,
	},
	.num_resources	= ARRAY_SIZE(heartbeat_resources),
	.resource	= heartbeat_resources,
};

#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
	defined(CONFIG_CPU_SUBTYPE_SH7712)
/* SH771X Ethernet driver */
static struct resource sh_eth0_resources[] = {
	[0] = {
		.start = SH_ETH0_BASE,
		.end = SH_ETH0_BASE + 0x1B8,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = SH_ETH0_IRQ,
		.end = SH_ETH0_IRQ,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device sh_eth0_device = {
	.name = "sh-eth",
	.id	= 0,
	.dev = {
		.platform_data = PHY_ID,
	},
	.num_resources = ARRAY_SIZE(sh_eth0_resources),
	.resource = sh_eth0_resources,
};

static struct resource sh_eth1_resources[] = {
	[0] = {
		.start = SH_ETH1_BASE,
		.end = SH_ETH1_BASE + 0x1B8,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = SH_ETH1_IRQ,
		.end = SH_ETH1_IRQ,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device sh_eth1_device = {
	.name = "sh-eth",
	.id	= 1,
	.dev = {
		.platform_data = PHY_ID,
	},
	.num_resources = ARRAY_SIZE(sh_eth1_resources),
	.resource = sh_eth1_resources,
};
#endif

static struct platform_device *se_devices[] __initdata = {
	&heartbeat_device,
	&cf_ide_device,
#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
	defined(CONFIG_CPU_SUBTYPE_SH7712)
	&sh_eth0_device,
	&sh_eth1_device,
#endif
};

static int __init se_devices_setup(void)
{
	return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
}
device_initcall(se_devices_setup);

/*
 * The Machine Vector
 */
static struct sh_machine_vector mv_se __initmv = {
	.mv_name		= "SolutionEngine",
	.mv_setup		= smsc_setup,
#if defined(CONFIG_CPU_SH4)
	.mv_nr_irqs		= 48,
#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
	.mv_nr_irqs		= 32,
#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
	.mv_nr_irqs		= 61,
#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
	.mv_nr_irqs		= 86,
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
	.mv_nr_irqs             = 104,
#endif

	.mv_inb			= se_inb,
	.mv_inw			= se_inw,
	.mv_inl			= se_inl,
	.mv_outb		= se_outb,
	.mv_outw		= se_outw,
	.mv_outl		= se_outl,

	.mv_inb_p		= se_inb_p,
	.mv_inw_p		= se_inw,
	.mv_inl_p		= se_inl,
	.mv_outb_p		= se_outb_p,
	.mv_outw_p		= se_outw,
	.mv_outl_p		= se_outl,

	.mv_insb		= se_insb,
	.mv_insw		= se_insw,
	.mv_insl		= se_insl,
	.mv_outsb		= se_outsb,
	.mv_outsw		= se_outsw,
	.mv_outsl		= se_outsl,

	.mv_init_irq		= init_se_IRQ,
};
Commit	Line	Data
aa4a5db5	1	/*
1da177e4 LT	2	* linux/arch/sh/boards/se/770x/setup.c
	3	*
	4	* Copyright (C) 2000 Kazumoto Kojima
	5	*
	6	* Hitachi SolutionEngine Support.
	7	*
	8	*/
1da177e4	9	#include <linux/init.h>
3b4d9539	10	#include <linux/platform_device.h>
711fa809	11	#include <asm/machvec.h>
373e68b5	12	#include <asm/se.h>
711fa809	13	#include <asm/io.h>
0c91c1a7	14	#include <asm/smc37c93x.h>
8786c952	15	#include <asm/heartbeat.h>
2c7834a6	16
1da177e4 LT	17	/*
	18	* Configure the Super I/O chip
	19	*/
	20	static void __init smsc_config(int index, int data)
	21	{
	22	outb_p(index, INDEX_PORT);
	23	outb_p(data, DATA_PORT);
	24	}
	25
2c7834a6 PM	26	/* XXX: Another candidate for a more generic cchip machine vector */
2c7834a6 PM	27	static void __init smsc_setup(char **cmdline_p)
1da177e4 LT	28	{
	29	outb_p(CONFIG_ENTER, CONFIG_PORT);
	30	outb_p(CONFIG_ENTER, CONFIG_PORT);
	31
	32	/* FDC */
	33	smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
	34	smsc_config(ACTIVATE_INDEX, 0x01);
	35	smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
	36
1da177e4 LT	37	/* AUXIO (GPIO): to use IDE1 */
	38	smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
	39	smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
	40	smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
	41
	42	/* COM1 */
	43	smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
	44	smsc_config(ACTIVATE_INDEX, 0x01);
	45	smsc_config(IO_BASE_HI_INDEX, 0x03);
	46	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	47	smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
	48
	49	/* COM2 */
	50	smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
	51	smsc_config(ACTIVATE_INDEX, 0x01);
	52	smsc_config(IO_BASE_HI_INDEX, 0x02);
	53	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	54	smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
	55
	56	/* RTC */
	57	smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
	58	smsc_config(ACTIVATE_INDEX, 0x01);
	59	smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
	60
	61	/* XXX: PARPORT, KBD, and MOUSE will come here... */
	62	outb_p(CONFIG_EXIT, CONFIG_PORT);
	63	}
	64
f987fc88 NI	65
	66	static struct resource cf_ide_resources[] = {
	67	[0] = {
	68	.start = PA_MRSHPC_IO + 0x1f0,
	69	.end = PA_MRSHPC_IO + 0x1f0 + 8,
	70	.flags = IORESOURCE_MEM,
	71	},
	72	[1] = {
	73	.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
787d9d7e	74	.end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
f987fc88 NI	75	.flags = IORESOURCE_MEM,
	76	},
	77	[2] = {
2a8ff459	78	.start = IRQ_CFCARD,
f987fc88 NI	79	.flags = IORESOURCE_IRQ,
	80	},
	81	};
	82
	83	static struct platform_device cf_ide_device = {
	84	.name = "pata_platform",
	85	.id = -1,
	86	.num_resources = ARRAY_SIZE(cf_ide_resources),
	87	.resource = cf_ide_resources,
	88	};
	89
3b4d9539 PM	90	static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
3b4d9539 PM	91
8786c952 PM	92	static struct heartbeat_data heartbeat_data = {
	93	.bit_pos = heartbeat_bit_pos,
	94	.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
9c88b6ba	95	.regsize = 16,
8786c952 PM	96	};
8786c952 PM	97
3b4d9539 PM	98	static struct resource heartbeat_resources[] = {
	99	[0] = {
	100	.start = PA_LED,
a1fd306b	101	.end = PA_LED,
3b4d9539 PM	102	.flags = IORESOURCE_MEM,
	103	},
	104	};
	105
	106	static struct platform_device heartbeat_device = {
	107	.name = "heartbeat",
	108	.id = -1,
	109	.dev = {
a1fd306b	110	.platform_data = &heartbeat_data,
3b4d9539 PM	111	},
	112	.num_resources = ARRAY_SIZE(heartbeat_resources),
	113	.resource = heartbeat_resources,
	114	};
	115
4864841a NI	116	#if defined(CONFIG_CPU_SUBTYPE_SH7710) \|\|\
4864841a NI	117	defined(CONFIG_CPU_SUBTYPE_SH7712)
ffb91ad2 NI	118	/* SH771X Ethernet driver */
	119	static struct resource sh_eth0_resources[] = {
	120	[0] = {
	121	.start = SH_ETH0_BASE,
	122	.end = SH_ETH0_BASE + 0x1B8,
	123	.flags = IORESOURCE_MEM,
	124	},
	125	[1] = {
	126	.start = SH_ETH0_IRQ,
	127	.end = SH_ETH0_IRQ,
	128	.flags = IORESOURCE_IRQ,
	129	},
	130	};
	131
	132	static struct platform_device sh_eth0_device = {
	133	.name = "sh-eth",
	134	.id = 0,
	135	.dev = {
	136	.platform_data = PHY_ID,
	137	},
	138	.num_resources = ARRAY_SIZE(sh_eth0_resources),
	139	.resource = sh_eth0_resources,
	140	};
	141
	142	static struct resource sh_eth1_resources[] = {
	143	[0] = {
	144	.start = SH_ETH1_BASE,
	145	.end = SH_ETH1_BASE + 0x1B8,
	146	.flags = IORESOURCE_MEM,
	147	},
	148	[1] = {
	149	.start = SH_ETH1_IRQ,
	150	.end = SH_ETH1_IRQ,
	151	.flags = IORESOURCE_IRQ,
	152	},
	153	};
	154
	155	static struct platform_device sh_eth1_device = {
	156	.name = "sh-eth",
	157	.id = 1,
	158	.dev = {
	159	.platform_data = PHY_ID,
	160	},
	161	.num_resources = ARRAY_SIZE(sh_eth1_resources),
	162	.resource = sh_eth1_resources,
	163	};
4864841a	164	#endif
ffb91ad2	165
3b4d9539 PM	166	static struct platform_device *se_devices[] __initdata = {
3b4d9539 PM	167	&heartbeat_device,
f987fc88	168	&cf_ide_device,
4864841a NI	169	#if defined(CONFIG_CPU_SUBTYPE_SH7710) \|\|\
4864841a NI	170	defined(CONFIG_CPU_SUBTYPE_SH7712)
ffb91ad2 NI	171	&sh_eth0_device,
ffb91ad2 NI	172	&sh_eth1_device,
4864841a	173	#endif
3b4d9539 PM	174	};
	175
	176	static int __init se_devices_setup(void)
	177	{
	178	return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
	179	}
9465a54f	180	device_initcall(se_devices_setup);
3b4d9539	181
1da177e4	182	/*
2c7834a6	183	* The Machine Vector
1da177e4	184	*/
82f81f47	185	static struct sh_machine_vector mv_se __initmv = {
2c7834a6 PM	186	.mv_name = "SolutionEngine",
	187	.mv_setup = smsc_setup,
	188	#if defined(CONFIG_CPU_SH4)
	189	.mv_nr_irqs = 48,
	190	#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
	191	.mv_nr_irqs = 32,
	192	#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
	193	.mv_nr_irqs = 61,
	194	#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
	195	.mv_nr_irqs = 86,
9465a54f NI	196	#elif defined(CONFIG_CPU_SUBTYPE_SH7710) \|\| defined(CONFIG_CPU_SUBTYPE_SH7712)
9465a54f NI	197	.mv_nr_irqs = 104,
2c7834a6 PM	198	#endif
	199
	200	.mv_inb = se_inb,
	201	.mv_inw = se_inw,
	202	.mv_inl = se_inl,
	203	.mv_outb = se_outb,
	204	.mv_outw = se_outw,
	205	.mv_outl = se_outl,
	206
	207	.mv_inb_p = se_inb_p,
	208	.mv_inw_p = se_inw,
	209	.mv_inl_p = se_inl,
	210	.mv_outb_p = se_outb_p,
	211	.mv_outw_p = se_outw,
	212	.mv_outl_p = se_outl,
	213
	214	.mv_insb = se_insb,
	215	.mv_insw = se_insw,
	216	.mv_insl = se_insl,
	217	.mv_outsb = se_outsb,
	218	.mv_outsw = se_outsw,
	219	.mv_outsl = se_outsl,
	220
	221	.mv_init_irq = init_se_IRQ,
2c7834a6	222	};