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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1999 by Kaz Kojima | |
7 | * | |
8 | * Defitions for the address spaces of the SH CPUs. | |
9 | */ | |
10 | #ifndef __ASM_SH_ADDRSPACE_H | |
11 | #define __ASM_SH_ADDRSPACE_H | |
5a668651 | 12 | |
1da177e4 LT |
13 | #ifdef __KERNEL__ |
14 | ||
f15cbe6f | 15 | #include <cpu/addrspace.h> |
1da177e4 | 16 | |
5a668651 PM |
17 | /* If this CPU supports segmentation, hook up the helpers */ |
18 | #ifdef P1SEG | |
1da177e4 | 19 | |
6deb6f91 PM |
20 | /* |
21 | [ P0/U0 (virtual) ] 0x00000000 <------ User space | |
22 | [ P1 (fixed) cached ] 0x80000000 <------ Kernel space | |
23 | [ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access | |
24 | [ P3 (virtual) cached] 0xC0000000 <------ vmalloced area | |
25 | [ P4 control ] 0xE0000000 | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | /* Returns the privileged segment base of a given address */ |
29 | #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) | |
30 | ||
a0ab3668 | 31 | #ifdef CONFIG_29BIT |
1da177e4 LT |
32 | /* |
33 | * Map an address to a certain privileged segment | |
34 | */ | |
5a668651 PM |
35 | #define P1SEGADDR(a) \ |
36 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) | |
37 | #define P2SEGADDR(a) \ | |
38 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) | |
39 | #define P3SEGADDR(a) \ | |
40 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) | |
41 | #define P4SEGADDR(a) \ | |
42 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) | |
206582c3 PM |
43 | #else |
44 | /* | |
45 | * These will never work in 32-bit, don't even bother. | |
46 | */ | |
47 | #define P1SEGADDR(a) __futile_remapping_attempt | |
48 | #define P2SEGADDR(a) __futile_remapping_attempt | |
49 | #define P3SEGADDR(a) __futile_remapping_attempt | |
50 | #define P4SEGADDR(a) __futile_remapping_attempt | |
51 | #endif | |
5a668651 | 52 | #endif /* P1SEG */ |
1da177e4 | 53 | |
d02b08f6 SM |
54 | /* Check if an address can be reached in 29 bits */ |
55 | #define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) | |
56 | ||
716777db MD |
57 | #ifdef CONFIG_SH_STORE_QUEUES |
58 | /* | |
59 | * This is a special case for the SH-4 store queues, as pages for this | |
60 | * space still need to be faulted in before it's possible to flush the | |
61 | * store queue cache for writeout to the remapped region. | |
62 | */ | |
63 | #define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000) | |
64 | #else | |
65 | #define P3_ADDR_MAX P4SEG | |
66 | #endif | |
67 | ||
1da177e4 LT |
68 | #endif /* __KERNEL__ */ |
69 | #endif /* __ASM_SH_ADDRSPACE_H */ |