[deliverable/linux.git] / arch / sh / include / asm / pci.h

#ifndef __ASM_SH_PCI_H
#define __ASM_SH_PCI_H

#ifdef __KERNEL__

#include <linux/dma-mapping.h>

/* Can be used to override the logic in pci_scan_bus for skipping
   already-configured bus numbers - to be used for buggy BIOSes
   or architectures with incomplete PCI setup by the loader */

#define pcibios_assign_all_busses()	1
#define pcibios_scan_all_fns(a, b)	0

/*
 * A board can define one or more PCI channels that represent built-in (or
 * external) PCI controllers.
 */
struct pci_channel {
	struct pci_channel	*next;

	struct pci_ops		*pci_ops;
	struct resource		*io_resource;
	struct resource		*mem_resource;

	unsigned long		io_offset;
	unsigned long		mem_offset;

	unsigned long		reg_base;

	unsigned long		io_map_base;
};

extern void register_pci_controller(struct pci_channel *hose);

extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;

struct pci_dev;

#define HAVE_PCI_MMAP
extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
	enum pci_mmap_state mmap_state, int write_combine);
extern void pcibios_set_master(struct pci_dev *dev);

static inline void pcibios_penalize_isa_irq(int irq, int active)
{
	/* We don't do dynamic PCI IRQ allocation */
}

/* Dynamic DMA mapping stuff.
 * SuperH has everything mapped statically like x86.
 */

/* The PCI address space does equal the physical memory
 * address space.  The networking and block device layers use
 * this boolean for bounce buffer decisions.
 */
#define PCI_DMA_BUS_IS_PHYS	(1)

#include <linux/types.h>
#include <linux/slab.h>
#include <asm/scatterlist.h>
#include <linux/string.h>
#include <asm/io.h>

/* pci_unmap_{single,page} being a nop depends upon the
 * configuration.
 */
#ifdef CONFIG_SH_PCIDMA_NONCOHERENT
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)	\
	dma_addr_t ADDR_NAME;
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)		\
	__u32 LEN_NAME;
#define pci_unmap_addr(PTR, ADDR_NAME)			\
	((PTR)->ADDR_NAME)
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)		\
	(((PTR)->ADDR_NAME) = (VAL))
#define pci_unmap_len(PTR, LEN_NAME)			\
	((PTR)->LEN_NAME)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL)		\
	(((PTR)->LEN_NAME) = (VAL))
#else
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
#define pci_unmap_addr(PTR, ADDR_NAME)		(0)
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)	do { } while (0)
#define pci_unmap_len(PTR, LEN_NAME)		(0)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL)	do { } while (0)
#endif

#ifdef CONFIG_PCI
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
					enum pci_dma_burst_strategy *strat,
					unsigned long *strategy_parameter)
{
	*strat = PCI_DMA_BURST_INFINITY;
	*strategy_parameter = ~0UL;
}
#endif

#ifdef CONFIG_SUPERH32
/*
 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped
 * at the end of the address space in a special non-translatable area.
 */
#define PCI_MEM_FIXED_START	0xfd000000
#define PCI_MEM_FIXED_END	(PCI_MEM_FIXED_START + 0x01000000)

#define is_pci_memory_fixed_range(s, e)	\
	((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END)
#else
#define is_pci_memory_fixed_range(s, e)	(0)
#endif

/* Board-specific fixup routines. */
int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);

extern void pcibios_resource_to_bus(struct pci_dev *dev,
	struct pci_bus_region *region, struct resource *res);

extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
				    struct pci_bus_region *region);

static inline struct resource *
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
{
	struct resource *root = NULL;

	if (res->flags & IORESOURCE_IO)
		root = &ioport_resource;
	if (res->flags & IORESOURCE_MEM)
		root = &iomem_resource;

	return root;
}

/* Chances are this interrupt is wired PC-style ...  */
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
	return channel ? 15 : 14;
}

/* generic DMA-mapping stuff */
#include <asm-generic/pci-dma-compat.h>

#endif /* __KERNEL__ */
#endif /* __ASM_SH_PCI_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef __ASM_SH_PCI_H
	2	#define __ASM_SH_PCI_H
	3
	4	#ifdef __KERNEL__
	5
	6	#include <linux/dma-mapping.h>
	7
	8	/* Can be used to override the logic in pci_scan_bus for skipping
	9	already-configured bus numbers - to be used for buggy BIOSes
	10	or architectures with incomplete PCI setup by the loader */
	11
	12	#define pcibios_assign_all_busses() 1
	13	#define pcibios_scan_all_fns(a, b) 0
	14
	15	/*
	16	* A board can define one or more PCI channels that represent built-in (or
	17	* external) PCI controllers.
	18	*/
	19	struct pci_channel {
e79066a6 PM	20	struct pci_channel *next;
e79066a6 PM	21
e79066a6 PM	22	struct pci_ops *pci_ops;
	23	struct resource *io_resource;
	24	struct resource *mem_resource;
	25
09cfeb13 PM	26	unsigned long io_offset;
	27	unsigned long mem_offset;
	28
e79066a6	29	unsigned long reg_base;
e79066a6 PM	30
e79066a6 PM	31	unsigned long io_map_base;
1da177e4 LT	32	};
1da177e4 LT	33
e79066a6 PM	34	extern void register_pci_controller(struct pci_channel *hose);
e79066a6 PM	35
a3c0e0d0	36	extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
1da177e4 LT	37
	38	struct pci_dev;
	39
98333851 PM	40	#define HAVE_PCI_MMAP
	41	extern int pci_mmap_page_range(struct pci_dev dev, struct vm_area_struct vma,
	42	enum pci_mmap_state mmap_state, int write_combine);
1da177e4 LT	43	extern void pcibios_set_master(struct pci_dev *dev);
1da177e4 LT	44
c9c3e457	45	static inline void pcibios_penalize_isa_irq(int irq, int active)
1da177e4 LT	46	{
	47	/* We don't do dynamic PCI IRQ allocation */
	48	}
	49
	50	/* Dynamic DMA mapping stuff.
	51	* SuperH has everything mapped statically like x86.
	52	*/
	53
	54	/* The PCI address space does equal the physical memory
	55	* address space. The networking and block device layers use
	56	* this boolean for bounce buffer decisions.
	57	*/
	58	#define PCI_DMA_BUS_IS_PHYS (1)
	59
	60	#include <linux/types.h>
	61	#include <linux/slab.h>
	62	#include <asm/scatterlist.h>
	63	#include <linux/string.h>
	64	#include <asm/io.h>
	65
	66	/* pci_unmap_{single,page} being a nop depends upon the
	67	* configuration.
	68	*/
	69	#ifdef CONFIG_SH_PCIDMA_NONCOHERENT
	70	#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
	71	dma_addr_t ADDR_NAME;
	72	#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
	73	__u32 LEN_NAME;
	74	#define pci_unmap_addr(PTR, ADDR_NAME) \
	75	((PTR)->ADDR_NAME)
	76	#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
	77	(((PTR)->ADDR_NAME) = (VAL))
	78	#define pci_unmap_len(PTR, LEN_NAME) \
	79	((PTR)->LEN_NAME)
	80	#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
	81	(((PTR)->LEN_NAME) = (VAL))
	82	#else
	83	#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
	84	#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
	85	#define pci_unmap_addr(PTR, ADDR_NAME) (0)
	86	#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
	87	#define pci_unmap_len(PTR, LEN_NAME) (0)
	88	#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
	89	#endif
	90
3e98f9f1	91	#ifdef CONFIG_PCI
e24c2d96 DM	92	static inline void pci_dma_burst_advice(struct pci_dev *pdev,
	93	enum pci_dma_burst_strategy *strat,
	94	unsigned long *strategy_parameter)
	95	{
	96	*strat = PCI_DMA_BURST_INFINITY;
	97	*strategy_parameter = ~0UL;
	98	}
3e98f9f1	99	#endif
ef339f24	100
99f95f11 PM	101	#ifdef CONFIG_SUPERH32
	102	/*
	103	* If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped
	104	* at the end of the address space in a special non-translatable area.
	105	*/
	106	#define PCI_MEM_FIXED_START 0xfd000000
	107	#define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000)
	108
	109	#define is_pci_memory_fixed_range(s, e) \
	110	((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END)
ef339f24	111	#else
99f95f11	112	#define is_pci_memory_fixed_range(s, e) (0)
bb4a61b6	113	#endif
e24c2d96	114
1da177e4	115	/* Board-specific fixup routines. */
959f85f8	116	int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
1da177e4	117
9ade1217 PM	118	extern void pcibios_resource_to_bus(struct pci_dev *dev,
	119	struct pci_bus_region region, struct resource res);
	120
	121	extern void pcibios_bus_to_resource(struct pci_dev dev, struct resource res,
	122	struct pci_bus_region *region);
	123
	124	static inline struct resource *
	125	pcibios_select_root(struct pci_dev pdev, struct resource res)
	126	{
	127	struct resource *root = NULL;
	128
	129	if (res->flags & IORESOURCE_IO)
	130	root = &ioport_resource;
	131	if (res->flags & IORESOURCE_MEM)
	132	root = &iomem_resource;
1da177e4	133
9ade1217 PM	134	return root;
	135	}
	136
	137	/* Chances are this interrupt is wired PC-style ... */
	138	static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
	139	{
	140	return channel ? 15 : 14;
	141	}
1da177e4 LT	142
	143	/* generic DMA-mapping stuff */
	144	#include <asm-generic/pci-dma-compat.h>
	145
9ade1217	146	#endif /* __KERNEL__ */
1da177e4 LT	147	#endif /* __ASM_SH_PCI_H */
1da177e4 LT	148