[deliverable/linux.git] / arch / sh / include / asm / tlb.h

#ifndef __ASM_SH_TLB_H
#define __ASM_SH_TLB_H

#ifdef CONFIG_SUPERH64
# include <asm/tlb_64.h>
#endif

#ifndef __ASSEMBLY__
#include <linux/pagemap.h>

#ifdef CONFIG_MMU
#include <linux/swap.h>
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
#include <asm/mmu_context.h>

/*
 * TLB handling.  This allows us to remove pages from the page
 * tables, and efficiently handle the TLB issues.
 */
struct mmu_gather {
	struct mm_struct	*mm;
	unsigned int		fullmm;
	unsigned long		start, end;
};

static inline void init_tlb_gather(struct mmu_gather *tlb)
{
	tlb->start = TASK_SIZE;
	tlb->end = 0;

	if (tlb->fullmm) {
		tlb->start = 0;
		tlb->end = TASK_SIZE;
	}
}

static inline void
tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)
{
	tlb->mm = mm;
	tlb->start = start;
	tlb->end = end;
	tlb->fullmm = !(start | (end+1));

	init_tlb_gather(tlb);
}

static inline void
tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
{
	if (tlb->fullmm)
		flush_tlb_mm(tlb->mm);

	/* keep the page table cache within bounds */
	check_pgt_cache();
}

static inline void
tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
{
	if (tlb->start > address)
		tlb->start = address;
	if (tlb->end < address + PAGE_SIZE)
		tlb->end = address + PAGE_SIZE;
}

/*
 * In the case of tlb vma handling, we can optimise these away in the
 * case where we're doing a full MM flush.  When we're doing a munmap,
 * the vmas are adjusted to only cover the region to be torn down.
 */
static inline void
tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
{
	if (!tlb->fullmm)
		flush_cache_range(vma, vma->vm_start, vma->vm_end);
}

static inline void
tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
{
	if (!tlb->fullmm && tlb->end) {
		flush_tlb_range(vma, tlb->start, tlb->end);
		init_tlb_gather(tlb);
	}
}

static inline void tlb_flush_mmu(struct mmu_gather *tlb)
{
}

static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
{
	free_page_and_swap_cache(page);
	return 1; /* avoid calling tlb_flush_mmu */
}

static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
{
	__tlb_remove_page(tlb, page);
}

#define pte_free_tlb(tlb, ptep, addr)	pte_free((tlb)->mm, ptep)
#define pmd_free_tlb(tlb, pmdp, addr)	pmd_free((tlb)->mm, pmdp)
#define pud_free_tlb(tlb, pudp, addr)	pud_free((tlb)->mm, pudp)

#define tlb_migrate_finish(mm)		do { } while (0)

#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SUPERH64)
extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t);
extern void tlb_unwire_entry(void);
#else
static inline void tlb_wire_entry(struct vm_area_struct *vma ,
				  unsigned long addr, pte_t pte)
{
	BUG();
}

static inline void tlb_unwire_entry(void)
{
	BUG();
}
#endif

#else /* CONFIG_MMU */

#define tlb_start_vma(tlb, vma)				do { } while (0)
#define tlb_end_vma(tlb, vma)				do { } while (0)
#define __tlb_remove_tlb_entry(tlb, pte, address)	do { } while (0)
#define tlb_flush(tlb)					do { } while (0)

#include <asm-generic/tlb.h>

#endif /* CONFIG_MMU */
#endif /* __ASSEMBLY__ */
#endif /* __ASM_SH_TLB_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef __ASM_SH_TLB_H
	2	#define __ASM_SH_TLB_H
	3
959f7d58	4	#ifdef CONFIG_SUPERH64
a1ce3928	5	# include <asm/tlb_64.h>
959f7d58 PM	6	#endif
	7
	8	#ifndef __ASSEMBLY__
c2035184 PM	9	#include <linux/pagemap.h>
	10
	11	#ifdef CONFIG_MMU
194cd8df	12	#include <linux/swap.h>
c2035184 PM	13	#include <asm/pgalloc.h>
c2035184 PM	14	#include <asm/tlbflush.h>
24ef7fc4	15	#include <asm/mmu_context.h>
c2035184 PM	16
	17	/*
	18	* TLB handling. This allows us to remove pages from the page
	19	* tables, and efficiently handle the TLB issues.
	20	*/
	21	struct mmu_gather {
	22	struct mm_struct *mm;
	23	unsigned int fullmm;
	24	unsigned long start, end;
	25	};
959f7d58	26
c2035184 PM	27	static inline void init_tlb_gather(struct mmu_gather *tlb)
	28	{
	29	tlb->start = TASK_SIZE;
	30	tlb->end = 0;
1da177e4	31
c2035184 PM	32	if (tlb->fullmm) {
	33	tlb->start = 0;
	34	tlb->end = TASK_SIZE;
	35	}
	36	}
	37
1e56a564	38	static inline void
2b047252	39	tlb_gather_mmu(struct mmu_gather tlb, struct mm_struct mm, unsigned long start, unsigned long end)
c2035184	40	{
c2035184	41	tlb->mm = mm;
2b047252 LT	42	tlb->start = start;
	43	tlb->end = end;
	44	tlb->fullmm = !(start \| (end+1));
c2035184 PM	45
c2035184 PM	46	init_tlb_gather(tlb);
c2035184 PM	47	}
	48
	49	static inline void
	50	tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
	51	{
	52	if (tlb->fullmm)
	53	flush_tlb_mm(tlb->mm);
	54
	55	/* keep the page table cache within bounds */
	56	check_pgt_cache();
c2035184 PM	57	}
	58
	59	static inline void
	60	tlb_remove_tlb_entry(struct mmu_gather tlb, pte_t ptep, unsigned long address)
	61	{
	62	if (tlb->start > address)
	63	tlb->start = address;
	64	if (tlb->end < address + PAGE_SIZE)
	65	tlb->end = address + PAGE_SIZE;
	66	}
1da177e4 LT	67
1da177e4 LT	68	/*
c2035184 PM	69	* In the case of tlb vma handling, we can optimise these away in the
	70	* case where we're doing a full MM flush. When we're doing a munmap,
	71	* the vmas are adjusted to only cover the region to be torn down.
1da177e4	72	*/
c2035184 PM	73	static inline void
	74	tlb_start_vma(struct mmu_gather tlb, struct vm_area_struct vma)
	75	{
	76	if (!tlb->fullmm)
	77	flush_cache_range(vma, vma->vm_start, vma->vm_end);
	78	}
	79
	80	static inline void
	81	tlb_end_vma(struct mmu_gather tlb, struct vm_area_struct vma)
	82	{
	83	if (!tlb->fullmm && tlb->end) {
	84	flush_tlb_range(vma, tlb->start, tlb->end);
	85	init_tlb_gather(tlb);
	86	}
	87	}
	88
1e56a564 PZ	89	static inline void tlb_flush_mmu(struct mmu_gather *tlb)
	90	{
	91	}
	92
	93	static inline int __tlb_remove_page(struct mmu_gather tlb, struct page page)
	94	{
	95	free_page_and_swap_cache(page);
	96	return 1; /* avoid calling tlb_flush_mmu */
	97	}
	98
	99	static inline void tlb_remove_page(struct mmu_gather tlb, struct page page)
	100	{
	101	__tlb_remove_page(tlb, page);
	102	}
	103
9e1b32ca BH	104	#define pte_free_tlb(tlb, ptep, addr) pte_free((tlb)->mm, ptep)
	105	#define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp)
	106	#define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp)
c2035184 PM	107
	108	#define tlb_migrate_finish(mm) do { } while (0)
	109
bb29c677	110	#if defined(CONFIG_CPU_SH4) \|\| defined(CONFIG_SUPERH64)
8eda5514 MF	111	extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t);
	112	extern void tlb_unwire_entry(void);
	113	#else
	114	static inline void tlb_wire_entry(struct vm_area_struct *vma ,
	115	unsigned long addr, pte_t pte)
	116	{
	117	BUG();
	118	}
	119
	120	static inline void tlb_unwire_entry(void)
	121	{
	122	BUG();
	123	}
bb29c677	124	#endif
8eda5514	125
c2035184 PM	126	#else /* CONFIG_MMU */
	127
	128	#define tlb_start_vma(tlb, vma) do { } while (0)
	129	#define tlb_end_vma(tlb, vma) do { } while (0)
	130	#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
	131	#define tlb_flush(tlb) do { } while (0)
1da177e4 LT	132
1da177e4 LT	133	#include <asm-generic/tlb.h>
959f7d58	134
c2035184	135	#endif /* CONFIG_MMU */
959f7d58 PM	136	#endif /* __ASSEMBLY__ */
959f7d58 PM	137	#endif /* __ASM_SH_TLB_H */