sh: Add SH7263 CPU support.
[deliverable/linux.git] / arch / sh / kernel / cpu / sh2a / probe.c
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1/*
2 * arch/sh/kernel/cpu/sh2a/probe.c
3 *
4 * CPU Subtype Probing for SH-2A.
5 *
6d01f510 6 * Copyright (C) 2004 - 2007 Paul Mundt
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7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
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12#include <linux/init.h>
13#include <asm/processor.h>
14#include <asm/cache.h>
15
16int __init detect_cpu_and_cache_system(void)
17{
6d01f510 18 /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */
cb7af21f 19 boot_cpu_data.flags |= CPU_HAS_OP32;
9d4436a6 20
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21#if defined(CONFIG_CPU_SUBTYPE_SH7203)
22 boot_cpu_data.type = CPU_SH7203;
23 /* SH7203 has an FPU.. */
24 boot_cpu_data.flags |= CPU_HAS_FPU;
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25#elif defined(CONFIG_CPU_SUBTYPE_SH7263)
26 boot_cpu_data.type = CPU_SH7263;
27 boot_cpu_data.flags |= CPU_HAS_FPU;
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28#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
29 boot_cpu_data.type = CPU_SH7206;
30 /* While SH7206 has a DSP.. */
31 boot_cpu_data.flags |= CPU_HAS_DSP;
32#endif
33
cb7af21f 34 boot_cpu_data.dcache.ways = 4;
6d01f510 35 boot_cpu_data.dcache.way_incr = (1 << 11);
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36 boot_cpu_data.dcache.sets = 128;
37 boot_cpu_data.dcache.entry_shift = 4;
38 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
39 boot_cpu_data.dcache.flags = 0;
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40
41 /*
42 * The icache is the same as the dcache as far as this setup is
43 * concerned. The only real difference in hardware is that the icache
44 * lacks the U bit that the dcache has, none of this has any bearing
45 * on the cache info.
46 */
cb7af21f 47 boot_cpu_data.icache = boot_cpu_data.dcache;
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48
49 return 0;
50}
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