[deliverable/linux.git] / arch / sh / kernel / cpu / sh3 / serial-sh7720.c

#include <linux/serial_sci.h>
#include <linux/serial_core.h>
#include <linux/io.h>
#include <cpu/serial.h>
#include <cpu/gpio.h>

static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
{
	unsigned short data;

	if (cflag & CRTSCTS) {
		/* enable RTS/CTS */
		if (port->mapbase == 0xa4430000) { /* SCIF0 */
			/* Clear PTCR bit 9-2; enable all scif pins but sck */
			data = __raw_readw(PORT_PTCR);
			__raw_writew((data & 0xfc03), PORT_PTCR);
		} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
			/* Clear PVCR bit 9-2 */
			data = __raw_readw(PORT_PVCR);
			__raw_writew((data & 0xfc03), PORT_PVCR);
		}
	} else {
		if (port->mapbase == 0xa4430000) { /* SCIF0 */
			/* Clear PTCR bit 5-2; enable only tx and rx  */
			data = __raw_readw(PORT_PTCR);
			__raw_writew((data & 0xffc3), PORT_PTCR);
		} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
			/* Clear PVCR bit 5-2 */
			data = __raw_readw(PORT_PVCR);
			__raw_writew((data & 0xffc3), PORT_PVCR);
		}
	}
}

struct plat_sci_port_ops sh7720_sci_port_ops = {
	.init_pins	= sh7720_sci_init_pins,
};
Commit	Line	Data
61a6976b PM	1	#include <linux/serial_sci.h>
	2	#include <linux/serial_core.h>
	3	#include <linux/io.h>
	4	#include <cpu/serial.h>
64941d89	5	#include <cpu/gpio.h>
61a6976b PM	6
	7	static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
	8	{
	9	unsigned short data;
	10
	11	if (cflag & CRTSCTS) {
	12	/* enable RTS/CTS */
	13	if (port->mapbase == 0xa4430000) { /* SCIF0 */
	14	/* Clear PTCR bit 9-2; enable all scif pins but sck */
	15	data = __raw_readw(PORT_PTCR);
	16	__raw_writew((data & 0xfc03), PORT_PTCR);
	17	} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
	18	/* Clear PVCR bit 9-2 */
	19	data = __raw_readw(PORT_PVCR);
	20	__raw_writew((data & 0xfc03), PORT_PVCR);
	21	}
	22	} else {
	23	if (port->mapbase == 0xa4430000) { /* SCIF0 */
	24	/* Clear PTCR bit 5-2; enable only tx and rx */
	25	data = __raw_readw(PORT_PTCR);
	26	__raw_writew((data & 0xffc3), PORT_PTCR);
	27	} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
	28	/* Clear PVCR bit 5-2 */
	29	data = __raw_readw(PORT_PVCR);
	30	__raw_writew((data & 0xffc3), PORT_PVCR);
	31	}
	32	}
	33	}
	34
	35	struct plat_sci_port_ops sh7720_sci_port_ops = {
	36	.init_pins = sh7720_sci_init_pins,
	37	};