projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public | |
| 3 | * License. See the file "COPYING" in the main directory of this archive | |
| 4 | * for more details. | |
| 5 | * | |
| 6 | * arch/sh64/mach-romram/setup.c | |
| 7 | * | |
| 8 | * SH-5 ROM/RAM Platform Support | |
| 9 | * | |
| 10 | * This file handles the architecture-dependent parts of initialization | |
| 11 | * | |
| 12 | * Copyright (C) 2000, 2001 Paolo Alberelli | |
| 13 | * | |
| 14 | * benedict.gaster@superh.com: 3rd May 2002 | |
| 15 | * Added support for ramdisk, removing statically linked romfs at the same time. * | |
| 16 | * | |
| 17 | * lethal@linux-sh.org: 15th May 2003 | |
| 18 | * Use the generic procfs cpuinfo interface, just return a valid board name. | |
| 19 | * | |
| 20 | * Sean.McGoogan@superh.com 17th Feb 2004 | |
| 21 | * copied from arch/sh64/mach-harp/setup.c | |
| 22 | */ | |
| 23 | ||
| 24 | #include <linux/stddef.h> | |
| 25 | #include <linux/init.h> | |
| 1da177e4 LT |
26 | #include <linux/mm.h> |
| 27 | #include <linux/bootmem.h> | |
| 28 | #include <linux/delay.h> | |
| 29 | #include <linux/kernel.h> | |
| 30 | #include <asm/processor.h> | |
| 31 | #include <asm/platform.h> | |
| 32 | #include <asm/io.h> | |
| 33 | #include <asm/irq.h> | |
| 34 | #include <asm/page.h> | |
| 35 | ||
| 36 | #define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource))) | |
| 37 | ||
| 38 | /* | |
| 39 | * Platform Dependent Interrupt Priorities. | |
| 40 | */ | |
| 41 | ||
| 42 | /* Using defaults defined in irq.h */ | |
| 43 | #define RES NO_PRIORITY /* Disabled */ | |
| 44 | #define IR0 IRL0_PRIORITY /* IRLs */ | |
| 45 | #define IR1 IRL1_PRIORITY | |
| 46 | #define IR2 IRL2_PRIORITY | |
| 47 | #define IR3 IRL3_PRIORITY | |
| 48 | #define PCA INTA_PRIORITY /* PCI Ints */ | |
| 49 | #define PCB INTB_PRIORITY | |
| 50 | #define PCC INTC_PRIORITY | |
| 51 | #define PCD INTD_PRIORITY | |
| 52 | #define SER TOP_PRIORITY | |
| 53 | #define ERR TOP_PRIORITY | |
| 54 | #define PW0 TOP_PRIORITY | |
| 55 | #define PW1 TOP_PRIORITY | |
| 56 | #define PW2 TOP_PRIORITY | |
| 57 | #define PW3 TOP_PRIORITY | |
| 58 | #define DM0 NO_PRIORITY /* DMA Ints */ | |
| 59 | #define DM1 NO_PRIORITY | |
| 60 | #define DM2 NO_PRIORITY | |
| 61 | #define DM3 NO_PRIORITY | |
| 62 | #define DAE NO_PRIORITY | |
| 63 | #define TU0 TIMER_PRIORITY /* TMU Ints */ | |
| 64 | #define TU1 NO_PRIORITY | |
| 65 | #define TU2 NO_PRIORITY | |
| 66 | #define TI2 NO_PRIORITY | |
| 67 | #define ATI NO_PRIORITY /* RTC Ints */ | |
| 68 | #define PRI NO_PRIORITY | |
| 69 | #define CUI RTC_PRIORITY | |
| 70 | #define ERI SCIF_PRIORITY /* SCIF Ints */ | |
| 71 | #define RXI SCIF_PRIORITY | |
| 72 | #define BRI SCIF_PRIORITY | |
| 73 | #define TXI SCIF_PRIORITY | |
| 74 | #define ITI TOP_PRIORITY /* WDT Ints */ | |
| 75 | ||
| 76 | /* | |
| 77 | * Platform dependent structures: maps and parms block. | |
| 78 | */ | |
| 79 | struct resource io_resources[] = { | |
| 80 | /* To be updated with external devices */ | |
| 81 | }; | |
| 82 | ||
| 83 | struct resource kram_resources[] = { | |
| 84 | { "Kernel code", 0, 0 }, /* These must be last in the array */ | |
| 85 | { "Kernel data", 0, 0 } /* These must be last in the array */ | |
| 86 | }; | |
| 87 | ||
| 88 | struct resource xram_resources[] = { | |
| 89 | /* To be updated with external devices */ | |
| 90 | }; | |
| 91 | ||
| 92 | struct resource rom_resources[] = { | |
| 93 | /* To be updated with external devices */ | |
| 94 | }; | |
| 95 | ||
| 96 | struct sh64_platform platform_parms = { | |
| 97 | .readonly_rootfs = 1, | |
| 98 | .initial_root_dev = 0x0100, | |
| 99 | .loader_type = 1, | |
| 100 | .io_res_p = io_resources, | |
| 101 | .io_res_count = RES_COUNT(io_resources), | |
| 102 | .kram_res_p = kram_resources, | |
| 103 | .kram_res_count = RES_COUNT(kram_resources), | |
| 104 | .xram_res_p = xram_resources, | |
| 105 | .xram_res_count = RES_COUNT(xram_resources), | |
| 106 | .rom_res_p = rom_resources, | |
| 107 | .rom_res_count = RES_COUNT(rom_resources), | |
| 108 | }; | |
| 109 | ||
| 110 | int platform_int_priority[NR_INTC_IRQS] = { | |
| 111 | IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ | |
| 112 | RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ | |
| 113 | PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ | |
| 114 | RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ | |
| 115 | TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ | |
| 116 | RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ | |
| 117 | RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ | |
| 118 | RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ | |
| 119 | }; | |
| 120 | ||
| 121 | void __init platform_setup(void) | |
| 122 | { | |
| 123 | /* ROM/RAM platform leaves the decision to head.S, for now */ | |
| 124 | platform_parms.fpu_flags = fpu_in_use; | |
| 125 | } | |
| 126 | ||
| 127 | void __init platform_monitor(void) | |
| 128 | { | |
| 129 | /* Nothing yet .. */ | |
| 130 | } | |
| 131 | ||
| 132 | void __init platform_reserve(void) | |
| 133 | { | |
| 134 | /* Nothing yet .. */ | |
| 135 | } | |
| 136 | ||
| 137 | const char *get_system_type(void) | |
| 138 | { | |
| 139 | return "ROM/RAM"; | |
| 140 | } | |
| 141 |