Commit | Line | Data |
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a439fe51 | 1 | /* asm/floppy.h: Sparc specific parts of the Floppy driver. |
f5e706ad SR |
2 | * |
3 | * Copyright (C) 1995 David S. Miller (davem@davemloft.net) | |
4 | */ | |
5 | ||
6 | #ifndef __ASM_SPARC_FLOPPY_H | |
7 | #define __ASM_SPARC_FLOPPY_H | |
8 | ||
454eeb2d DM |
9 | #include <linux/of.h> |
10 | #include <linux/of_device.h> | |
11 | ||
f5e706ad | 12 | #include <asm/pgtable.h> |
f5e706ad | 13 | #include <asm/idprom.h> |
f5e706ad SR |
14 | #include <asm/oplib.h> |
15 | #include <asm/auxio.h> | |
fbb86383 SR |
16 | #include <asm/setup.h> |
17 | #include <asm/page.h> | |
f5e706ad SR |
18 | #include <asm/irq.h> |
19 | ||
20 | /* We don't need no stinkin' I/O port allocation crap. */ | |
21 | #undef release_region | |
22 | #undef request_region | |
23 | #define release_region(X, Y) do { } while(0) | |
24 | #define request_region(X, Y, Z) (1) | |
25 | ||
26 | /* References: | |
27 | * 1) Netbsd Sun floppy driver. | |
28 | * 2) NCR 82077 controller manual | |
29 | * 3) Intel 82077 controller manual | |
30 | */ | |
31 | struct sun_flpy_controller { | |
32 | volatile unsigned char status_82072; /* Main Status reg. */ | |
33 | #define dcr_82072 status_82072 /* Digital Control reg. */ | |
34 | #define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ | |
35 | ||
36 | volatile unsigned char data_82072; /* Data fifo. */ | |
37 | #define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ | |
38 | ||
39 | volatile unsigned char dor_82077; /* Digital Output reg. */ | |
40 | volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ | |
41 | ||
42 | volatile unsigned char status_82077; /* Main Status Register. */ | |
43 | #define drs_82077 status_82077 /* Digital Rate Select reg. */ | |
44 | ||
45 | volatile unsigned char data_82077; /* Data fifo. */ | |
46 | volatile unsigned char ___unused; | |
47 | volatile unsigned char dir_82077; /* Digital Input reg. */ | |
48 | #define dcr_82077 dir_82077 /* Config Control reg. */ | |
49 | }; | |
50 | ||
51 | /* You'll only ever find one controller on a SparcStation anyways. */ | |
52 | static struct sun_flpy_controller *sun_fdc = NULL; | |
f5e706ad SR |
53 | |
54 | struct sun_floppy_ops { | |
55 | unsigned char (*fd_inb)(int port); | |
56 | void (*fd_outb)(unsigned char value, int port); | |
57 | }; | |
58 | ||
59 | static struct sun_floppy_ops sun_fdops; | |
60 | ||
61 | #define fd_inb(port) sun_fdops.fd_inb(port) | |
62 | #define fd_outb(value,port) sun_fdops.fd_outb(value,port) | |
63 | #define fd_enable_dma() sun_fd_enable_dma() | |
64 | #define fd_disable_dma() sun_fd_disable_dma() | |
65 | #define fd_request_dma() (0) /* nothing... */ | |
66 | #define fd_free_dma() /* nothing... */ | |
67 | #define fd_clear_dma_ff() /* nothing... */ | |
68 | #define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) | |
69 | #define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) | |
70 | #define fd_set_dma_count(count) sun_fd_set_dma_count(count) | |
71 | #define fd_enable_irq() /* nothing... */ | |
72 | #define fd_disable_irq() /* nothing... */ | |
73 | #define fd_cacheflush(addr, size) /* nothing... */ | |
74 | #define fd_request_irq() sun_fd_request_irq() | |
75 | #define fd_free_irq() /* nothing... */ | |
76 | #if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ | |
77 | #define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) | |
78 | #define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) | |
79 | #endif | |
80 | ||
81 | /* XXX This isn't really correct. XXX */ | |
82 | #define get_dma_residue(x) (0) | |
83 | ||
84 | #define FLOPPY0_TYPE 4 | |
85 | #define FLOPPY1_TYPE 0 | |
86 | ||
87 | /* Super paranoid... */ | |
88 | #undef HAVE_DISABLE_HLT | |
89 | ||
90 | /* Here is where we catch the floppy driver trying to initialize, | |
91 | * therefore this is where we call the PROM device tree probing | |
92 | * routine etc. on the Sparc. | |
93 | */ | |
94 | #define FDC1 sun_floppy_init() | |
95 | ||
96 | #define N_FDC 1 | |
97 | #define N_DRIVE 8 | |
98 | ||
99 | /* No 64k boundary crossing problems on the Sparc. */ | |
100 | #define CROSS_64KB(a,s) (0) | |
101 | ||
102 | /* Routines unique to each controller type on a Sun. */ | |
103 | static void sun_set_dor(unsigned char value, int fdc_82077) | |
104 | { | |
0301a6cb | 105 | if (fdc_82077) |
f5e706ad | 106 | sun_fdc->dor_82077 = value; |
f5e706ad SR |
107 | } |
108 | ||
109 | static unsigned char sun_read_dir(void) | |
110 | { | |
0301a6cb | 111 | return sun_fdc->dir_82077; |
f5e706ad SR |
112 | } |
113 | ||
114 | static unsigned char sun_82072_fd_inb(int port) | |
115 | { | |
116 | udelay(5); | |
117 | switch(port & 7) { | |
118 | default: | |
119 | printk("floppy: Asked to read unknown port %d\n", port); | |
120 | panic("floppy: Port bolixed."); | |
121 | case 4: /* FD_STATUS */ | |
122 | return sun_fdc->status_82072 & ~STATUS_DMA; | |
123 | case 5: /* FD_DATA */ | |
124 | return sun_fdc->data_82072; | |
125 | case 7: /* FD_DIR */ | |
126 | return sun_read_dir(); | |
6cb79b3f | 127 | } |
f5e706ad SR |
128 | panic("sun_82072_fd_inb: How did I get here?"); |
129 | } | |
130 | ||
131 | static void sun_82072_fd_outb(unsigned char value, int port) | |
132 | { | |
133 | udelay(5); | |
134 | switch(port & 7) { | |
135 | default: | |
136 | printk("floppy: Asked to write to unknown port %d\n", port); | |
137 | panic("floppy: Port bolixed."); | |
138 | case 2: /* FD_DOR */ | |
139 | sun_set_dor(value, 0); | |
140 | break; | |
141 | case 5: /* FD_DATA */ | |
142 | sun_fdc->data_82072 = value; | |
143 | break; | |
144 | case 7: /* FD_DCR */ | |
145 | sun_fdc->dcr_82072 = value; | |
146 | break; | |
147 | case 4: /* FD_STATUS */ | |
148 | sun_fdc->status_82072 = value; | |
149 | break; | |
6cb79b3f | 150 | } |
f5e706ad SR |
151 | return; |
152 | } | |
153 | ||
154 | static unsigned char sun_82077_fd_inb(int port) | |
155 | { | |
156 | udelay(5); | |
157 | switch(port & 7) { | |
158 | default: | |
159 | printk("floppy: Asked to read unknown port %d\n", port); | |
160 | panic("floppy: Port bolixed."); | |
161 | case 0: /* FD_STATUS_0 */ | |
162 | return sun_fdc->status1_82077; | |
163 | case 1: /* FD_STATUS_1 */ | |
164 | return sun_fdc->status2_82077; | |
165 | case 2: /* FD_DOR */ | |
166 | return sun_fdc->dor_82077; | |
167 | case 3: /* FD_TDR */ | |
168 | return sun_fdc->tapectl_82077; | |
169 | case 4: /* FD_STATUS */ | |
170 | return sun_fdc->status_82077 & ~STATUS_DMA; | |
171 | case 5: /* FD_DATA */ | |
172 | return sun_fdc->data_82077; | |
173 | case 7: /* FD_DIR */ | |
174 | return sun_read_dir(); | |
6cb79b3f | 175 | } |
f5e706ad SR |
176 | panic("sun_82077_fd_inb: How did I get here?"); |
177 | } | |
178 | ||
179 | static void sun_82077_fd_outb(unsigned char value, int port) | |
180 | { | |
181 | udelay(5); | |
182 | switch(port & 7) { | |
183 | default: | |
184 | printk("floppy: Asked to write to unknown port %d\n", port); | |
185 | panic("floppy: Port bolixed."); | |
186 | case 2: /* FD_DOR */ | |
187 | sun_set_dor(value, 1); | |
188 | break; | |
189 | case 5: /* FD_DATA */ | |
190 | sun_fdc->data_82077 = value; | |
191 | break; | |
192 | case 7: /* FD_DCR */ | |
193 | sun_fdc->dcr_82077 = value; | |
194 | break; | |
195 | case 4: /* FD_STATUS */ | |
196 | sun_fdc->status_82077 = value; | |
197 | break; | |
198 | case 3: /* FD_TDR */ | |
199 | sun_fdc->tapectl_82077 = value; | |
200 | break; | |
6cb79b3f | 201 | } |
f5e706ad SR |
202 | return; |
203 | } | |
204 | ||
205 | /* For pseudo-dma (Sun floppy drives have no real DMA available to | |
206 | * them so we must eat the data fifo bytes directly ourselves) we have | |
207 | * three state variables. doing_pdma tells our inline low-level | |
208 | * assembly floppy interrupt entry point whether it should sit and eat | |
209 | * bytes from the fifo or just transfer control up to the higher level | |
210 | * floppy interrupt c-code. I tried very hard but I could not get the | |
211 | * pseudo-dma to work in c-code without getting many overruns and | |
212 | * underruns. If non-zero, doing_pdma encodes the direction of | |
213 | * the transfer for debugging. 1=read 2=write | |
214 | */ | |
f5e706ad SR |
215 | |
216 | /* Common routines to all controller types on the Sparc. */ | |
217 | static inline void virtual_dma_init(void) | |
218 | { | |
219 | /* nothing... */ | |
220 | } | |
221 | ||
222 | static inline void sun_fd_disable_dma(void) | |
223 | { | |
224 | doing_pdma = 0; | |
679bea5e | 225 | pdma_base = NULL; |
f5e706ad SR |
226 | } |
227 | ||
228 | static inline void sun_fd_set_dma_mode(int mode) | |
229 | { | |
230 | switch(mode) { | |
231 | case DMA_MODE_READ: | |
232 | doing_pdma = 1; | |
233 | break; | |
234 | case DMA_MODE_WRITE: | |
235 | doing_pdma = 2; | |
236 | break; | |
237 | default: | |
238 | printk("Unknown dma mode %d\n", mode); | |
239 | panic("floppy: Giving up..."); | |
240 | } | |
241 | } | |
242 | ||
243 | static inline void sun_fd_set_dma_addr(char *buffer) | |
244 | { | |
245 | pdma_vaddr = buffer; | |
246 | } | |
247 | ||
248 | static inline void sun_fd_set_dma_count(int length) | |
249 | { | |
250 | pdma_size = length; | |
251 | } | |
252 | ||
253 | static inline void sun_fd_enable_dma(void) | |
254 | { | |
f5e706ad SR |
255 | pdma_base = pdma_vaddr; |
256 | pdma_areasize = pdma_size; | |
257 | } | |
258 | ||
f05a6865 | 259 | int sparc_floppy_request_irq(unsigned int irq, irq_handler_t irq_handler); |
f5e706ad SR |
260 | |
261 | static int sun_fd_request_irq(void) | |
262 | { | |
263 | static int once = 0; | |
f5e706ad | 264 | |
6baa9b20 | 265 | if (!once) { |
f5e706ad | 266 | once = 1; |
6baa9b20 SR |
267 | return sparc_floppy_request_irq(FLOPPY_IRQ, floppy_interrupt); |
268 | } else { | |
269 | return 0; | |
270 | } | |
f5e706ad SR |
271 | } |
272 | ||
273 | static struct linux_prom_registers fd_regs[2]; | |
274 | ||
275 | static int sun_floppy_init(void) | |
276 | { | |
6baa9b20 SR |
277 | struct platform_device *op; |
278 | struct device_node *dp; | |
144e988d | 279 | struct resource r; |
f5e706ad | 280 | char state[128]; |
144e988d SR |
281 | phandle fd_node; |
282 | phandle tnode; | |
8d125562 | 283 | int num_regs; |
f5e706ad SR |
284 | |
285 | use_virtual_dma = 1; | |
286 | ||
f5e706ad SR |
287 | /* Forget it if we aren't on a machine that could possibly |
288 | * ever have a floppy drive. | |
289 | */ | |
58fa4dcb | 290 | if (sparc_cpu_model != sun4m) { |
f5e706ad SR |
291 | /* We certainly don't have a floppy controller. */ |
292 | goto no_sun_fdc; | |
293 | } | |
294 | /* Well, try to find one. */ | |
295 | tnode = prom_getchild(prom_root_node); | |
296 | fd_node = prom_searchsiblings(tnode, "obio"); | |
144e988d | 297 | if (fd_node != 0) { |
f5e706ad SR |
298 | tnode = prom_getchild(fd_node); |
299 | fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); | |
300 | } else { | |
301 | fd_node = prom_searchsiblings(tnode, "fd"); | |
302 | } | |
144e988d | 303 | if (fd_node == 0) { |
f5e706ad SR |
304 | goto no_sun_fdc; |
305 | } | |
306 | ||
307 | /* The sun4m lets us know if the controller is actually usable. */ | |
144e988d | 308 | if (prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { |
f5e706ad SR |
309 | if(!strcmp(state, "disabled")) { |
310 | goto no_sun_fdc; | |
311 | } | |
312 | } | |
313 | num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); | |
314 | num_regs = (num_regs / sizeof(fd_regs[0])); | |
315 | prom_apply_obio_ranges(fd_regs, num_regs); | |
316 | memset(&r, 0, sizeof(r)); | |
317 | r.flags = fd_regs[0].which_io; | |
318 | r.start = fd_regs[0].phys_addr; | |
144e988d | 319 | sun_fdc = of_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); |
f5e706ad | 320 | |
6baa9b20 SR |
321 | /* Look up irq in platform_device. |
322 | * We try "SUNW,fdtwo" and "fd" | |
323 | */ | |
918f8322 | 324 | op = NULL; |
6baa9b20 SR |
325 | for_each_node_by_name(dp, "SUNW,fdtwo") { |
326 | op = of_find_device_by_node(dp); | |
327 | if (op) | |
328 | break; | |
329 | } | |
330 | if (!op) { | |
331 | for_each_node_by_name(dp, "fd") { | |
332 | op = of_find_device_by_node(dp); | |
333 | if (op) | |
334 | break; | |
335 | } | |
336 | } | |
337 | if (!op) | |
338 | goto no_sun_fdc; | |
339 | ||
340 | FLOPPY_IRQ = op->archdata.irqs[0]; | |
341 | ||
f5e706ad | 342 | /* Last minute sanity check... */ |
144e988d | 343 | if (sun_fdc->status_82072 == 0xff) { |
f5e706ad SR |
344 | sun_fdc = NULL; |
345 | goto no_sun_fdc; | |
346 | } | |
347 | ||
348 | sun_fdops.fd_inb = sun_82077_fd_inb; | |
349 | sun_fdops.fd_outb = sun_82077_fd_outb; | |
350 | fdc_status = &sun_fdc->status_82077; | |
351 | ||
352 | if (sun_fdc->dor_82077 == 0x80) { | |
353 | sun_fdc->dor_82077 = 0x02; | |
354 | if (sun_fdc->dor_82077 == 0x80) { | |
355 | sun_fdops.fd_inb = sun_82072_fd_inb; | |
356 | sun_fdops.fd_outb = sun_82072_fd_outb; | |
357 | fdc_status = &sun_fdc->status_82072; | |
358 | } | |
359 | } | |
360 | ||
361 | /* Success... */ | |
362 | allowed_drive_mask = 0x01; | |
363 | return (int) sun_fdc; | |
364 | ||
365 | no_sun_fdc: | |
366 | return -1; | |
367 | } | |
368 | ||
369 | static int sparc_eject(void) | |
370 | { | |
371 | set_dor(0x00, 0xff, 0x90); | |
372 | udelay(500); | |
373 | set_dor(0x00, 0x6f, 0x00); | |
374 | udelay(500); | |
375 | return 0; | |
376 | } | |
377 | ||
378 | #define fd_eject(drive) sparc_eject() | |
379 | ||
380 | #define EXTRA_FLOPPY_PARAMS | |
381 | ||
334ae614 DM |
382 | static DEFINE_SPINLOCK(dma_spin_lock); |
383 | ||
384 | #define claim_dma_lock() \ | |
385 | ({ unsigned long flags; \ | |
386 | spin_lock_irqsave(&dma_spin_lock, flags); \ | |
387 | flags; \ | |
388 | }) | |
389 | ||
390 | #define release_dma_lock(__flags) \ | |
391 | spin_unlock_irqrestore(&dma_spin_lock, __flags); | |
392 | ||
f5e706ad | 393 | #endif /* !(__ASM_SPARC_FLOPPY_H) */ |