projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| f5e706ad SR |
1 | #ifndef __SPARC64_PCI_H |
| 2 | #define __SPARC64_PCI_H | |
| 3 | ||
| 4 | #ifdef __KERNEL__ | |
| 5 | ||
| 6 | #include <linux/dma-mapping.h> | |
| 7 | ||
| 8 | /* Can be used to override the logic in pci_scan_bus for skipping | |
| 9 | * already-configured bus numbers - to be used for buggy BIOSes | |
| 10 | * or architectures with incomplete PCI setup by the loader. | |
| 11 | */ | |
| 12 | #define pcibios_assign_all_busses() 0 | |
| f5e706ad SR |
13 | |
| 14 | #define PCIBIOS_MIN_IO 0UL | |
| 15 | #define PCIBIOS_MIN_MEM 0UL | |
| 16 | ||
| 17 | #define PCI_IRQ_NONE 0xffffffff | |
| 18 | ||
| f5e706ad SR |
19 | static inline void pcibios_set_master(struct pci_dev *dev) |
| 20 | { | |
| 21 | /* No special bus mastering setup handling */ | |
| 22 | } | |
| 23 | ||
| 24 | static inline void pcibios_penalize_isa_irq(int irq, int active) | |
| 25 | { | |
| 26 | /* We don't do dynamic PCI IRQ allocation */ | |
| 27 | } | |
| 28 | ||
| 29 | /* The PCI address space does not equal the physical memory | |
| 30 | * address space. The networking and block device layers use | |
| 31 | * this boolean for bounce buffer decisions. | |
| 32 | */ | |
| 33 | #define PCI_DMA_BUS_IS_PHYS (0) | |
| 34 | ||
| f5e706ad SR |
35 | /* pci_unmap_{single,page} is not a nop, thus... */ |
| 36 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | |
| 37 | dma_addr_t ADDR_NAME; | |
| 38 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | |
| 39 | __u32 LEN_NAME; | |
| 40 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | |
| 41 | ((PTR)->ADDR_NAME) | |
| 42 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | |
| 43 | (((PTR)->ADDR_NAME) = (VAL)) | |
| 44 | #define pci_unmap_len(PTR, LEN_NAME) \ | |
| 45 | ((PTR)->LEN_NAME) | |
| 46 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | |
| 47 | (((PTR)->LEN_NAME) = (VAL)) | |
| 48 | ||
| f5e706ad SR |
49 | /* PCI IOMMU mapping bypass support. */ |
| 50 | ||
| 51 | /* PCI 64-bit addressing works for all slots on all controller | |
| 52 | * types on sparc64. However, it requires that the device | |
| 53 | * can drive enough of the 64 bits. | |
| 54 | */ | |
| 55 | #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) | |
| 56 | #define PCI64_ADDR_BASE 0xfffc000000000000UL | |
| 57 | ||
| f5e706ad SR |
58 | #ifdef CONFIG_PCI |
| 59 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | |
| 60 | enum pci_dma_burst_strategy *strat, | |
| 61 | unsigned long *strategy_parameter) | |
| 62 | { | |
| 63 | unsigned long cacheline_size; | |
| 64 | u8 byte; | |
| 65 | ||
| 66 | pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); | |
| 67 | if (byte == 0) | |
| 68 | cacheline_size = 1024; | |
| 69 | else | |
| 70 | cacheline_size = (int) byte * 4; | |
| 71 | ||
| 72 | *strat = PCI_DMA_BURST_BOUNDARY; | |
| 73 | *strategy_parameter = cacheline_size; | |
| 74 | } | |
| 75 | #endif | |
| 76 | ||
| 77 | /* Return the index of the PCI controller for device PDEV. */ | |
| 78 | ||
| 79 | extern int pci_domain_nr(struct pci_bus *bus); | |
| 80 | static inline int pci_proc_domain(struct pci_bus *bus) | |
| 81 | { | |
| 82 | return 1; | |
| 83 | } | |
| 84 | ||
| 85 | /* Platform support for /proc/bus/pci/X/Y mmap()s. */ | |
| 86 | ||
| 87 | #define HAVE_PCI_MMAP | |
| 88 | #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA | |
| 89 | #define get_pci_unmapped_area get_fb_unmapped_area | |
| 90 | ||
| 91 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
| 92 | enum pci_mmap_state mmap_state, | |
| 93 | int write_combine); | |
| 94 | ||
| 95 | extern void | |
| 96 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, | |
| 97 | struct resource *res); | |
| 98 | ||
| 99 | extern void | |
| 100 | pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, | |
| 101 | struct pci_bus_region *region); | |
| 102 | ||
| f5e706ad SR |
103 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) |
| 104 | { | |
| 105 | return PCI_IRQ_NONE; | |
| 106 | } | |
| 107 | ||
| 108 | struct device_node; | |
| 109 | extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); | |
| 110 | ||
| 111 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER | |
| 112 | extern void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
| 113 | const struct resource *rsrc, | |
| 114 | resource_size_t *start, resource_size_t *end); | |
| 115 | #endif /* __KERNEL__ */ | |
| 116 | ||
| 117 | #endif /* __SPARC64_PCI_H */ |