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a00736e9 SR |
1 | #ifndef _SPARC64_PIL_H |
2 | #define _SPARC64_PIL_H | |
3 | ||
4 | /* To avoid some locking problems, we hard allocate certain PILs | |
5 | * for SMP cross call messages that must do a etrap/rtrap. | |
6 | * | |
7 | * A local_irq_disable() does not block the cross call delivery, so | |
8 | * when SMP locking is an issue we reschedule the event into a PIL | |
9 | * interrupt which is blocked by local_irq_disable(). | |
10 | * | |
11 | * In fact any XCALL which has to etrap/rtrap has a problem because | |
12 | * it is difficult to prevent rtrap from running BH's, and that would | |
b4f4372f DM |
13 | * need to be done if the XCALL arrived while %pil==PIL_NORMAL_MAX. |
14 | * | |
15 | * Finally, in order to handle profiling events even when a | |
16 | * local_irq_disable() is in progress, we only disable up to level 14 | |
17 | * interrupts. Profile counter overflow interrupts arrive at level | |
18 | * 15. | |
a00736e9 SR |
19 | */ |
20 | #define PIL_SMP_CALL_FUNC 1 | |
21 | #define PIL_SMP_RECEIVE_SIGNAL 2 | |
22 | #define PIL_SMP_CAPTURE 3 | |
23 | #define PIL_SMP_CTX_NEW_VERSION 4 | |
24 | #define PIL_DEVICE_IRQ 5 | |
d172ad18 | 25 | #define PIL_SMP_CALL_FUNC_SNGL 6 |
3eb8057b | 26 | #define PIL_DEFERRED_PCR_WORK 7 |
b4f4372f DM |
27 | #define PIL_NORMAL_MAX 14 |
28 | #define PIL_NMI 15 | |
a00736e9 SR |
29 | |
30 | #endif /* !(_SPARC64_PIL_H) */ |