[deliverable/linux.git] / arch / sparc / include / asm / smp_32.h

/* smp.h: Sparc specific SMP stuff.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 */

#ifndef _SPARC_SMP_H
#define _SPARC_SMP_H

#include <linux/threads.h>
#include <asm/head.h>
#include <asm/btfixup.h>

#ifndef __ASSEMBLY__

#include <linux/cpumask.h>

#endif /* __ASSEMBLY__ */

#ifdef CONFIG_SMP

#ifndef __ASSEMBLY__

#include <asm/ptrace.h>
#include <asm/asi.h>
#include <asm/atomic.h>

/*
 *	Private routines/data
 */

extern unsigned char boot_cpu_id;

typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
		       unsigned long, unsigned long);

/*
 *	General functions that each host system must provide.
 */

void sun4m_init_smp(void);
void sun4d_init_smp(void);

void smp_callin(void);
void smp_boot_cpus(void);
void smp_store_cpu_info(int);

struct seq_file;
void smp_bogo(struct seq_file *);
void smp_info(struct seq_file *);

BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
BTFIXUPDEF_BLACKBOX(load_current)

#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)

static inline void xc0(smpfunc_t func) { smp_cross_call(func, cpu_online_map, 0, 0, 0, 0); }
static inline void xc1(smpfunc_t func, unsigned long arg1)
{ smp_cross_call(func, cpu_online_map, arg1, 0, 0, 0); }
static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
{ smp_cross_call(func, cpu_online_map, arg1, arg2, 0, 0); }
static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
			   unsigned long arg3)
{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, 0); }
static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
			   unsigned long arg3, unsigned long arg4)
{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, arg4); }

static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
{
	xc1((smpfunc_t)func, (unsigned long)info);
	return 0;
}

static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
					   void *info, int wait)
{
	smp_cross_call((smpfunc_t)func, cpumask_of_cpu(cpuid),
		       (unsigned long) info, 0, 0, 0);
	return 0;
}

static inline int cpu_logical_map(int cpu)
{
	return cpu;
}

static inline int hard_smp4m_processor_id(void)
{
	int cpuid;

	__asm__ __volatile__("rd %%tbr, %0\n\t"
			     "srl %0, 12, %0\n\t"
			     "and %0, 3, %0\n\t" :
			     "=&r" (cpuid));
	return cpuid;
}

static inline int hard_smp4d_processor_id(void)
{
	int cpuid;

	__asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
			     "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
	return cpuid;
}

extern inline int hard_smpleon_processor_id(void)
{
	int cpuid;
	__asm__ __volatile__("rd     %%asr17,%0\n\t"
			     "srl    %0,28,%0" :
			     "=&r" (cpuid) : );
	return cpuid;
}

#ifndef MODULE
static inline int hard_smp_processor_id(void)
{
	int cpuid;

	/* Black box - sun4m
		__asm__ __volatile__("rd %%tbr, %0\n\t"
				     "srl %0, 12, %0\n\t"
				     "and %0, 3, %0\n\t" :
				     "=&r" (cpuid));
	             - sun4d
		__asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
				     "nop; nop" :
				     "=&r" (cpuid));
	   See btfixup.h and btfixupprep.c to understand how a blackbox works.
	 */
	__asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
			     "sethi %%hi(boot_cpu_id), %0\n\t"
			     "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
			     "=&r" (cpuid));
	return cpuid;
}
#else
static inline int hard_smp_processor_id(void)
{
	int cpuid;

	__asm__ __volatile__("mov %%o7, %%g1\n\t"
			     "call ___f___hard_smp_processor_id\n\t"
			     " nop\n\t"
			     "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
	return cpuid;
}
#endif

#define raw_smp_processor_id()		(current_thread_info()->cpu)

#define prof_multiplier(__cpu)		cpu_data(__cpu).multiplier
#define prof_counter(__cpu)		cpu_data(__cpu).counter

void smp_setup_cpu_possible_map(void);

#endif /* !(__ASSEMBLY__) */

/* Sparc specific messages. */
#define MSG_CROSS_CALL         0x0005       /* run func on cpus */

/* Empirical PROM processor mailbox constants.  If the per-cpu mailbox
 * contains something other than one of these then the ipi is from
 * Linux's active_kernel_processor.  This facility exists so that
 * the boot monitor can capture all the other cpus when one catches
 * a watchdog reset or the user enters the monitor using L1-A keys.
 */
#define MBOX_STOPCPU          0xFB
#define MBOX_IDLECPU          0xFC
#define MBOX_IDLECPU2         0xFD
#define MBOX_STOPCPU2         0xFE

#else /* SMP */

#define hard_smp_processor_id()		0
#define smp_setup_cpu_possible_map() do { } while (0)

#endif /* !(SMP) */
#endif /* !(_SPARC_SMP_H) */
Commit	Line	Data
f5e706ad SR	1	/* smp.h: Sparc specific SMP stuff.
	2	*
	3	* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
	4	*/
	5
	6	#ifndef _SPARC_SMP_H
	7	#define _SPARC_SMP_H
	8
	9	#include <linux/threads.h>
	10	#include <asm/head.h>
	11	#include <asm/btfixup.h>
	12
	13	#ifndef __ASSEMBLY__
	14
	15	#include <linux/cpumask.h>
	16
	17	#endif /* __ASSEMBLY__ */
	18
	19	#ifdef CONFIG_SMP
	20
	21	#ifndef __ASSEMBLY__
	22
	23	#include <asm/ptrace.h>
	24	#include <asm/asi.h>
	25	#include <asm/atomic.h>
	26
	27	/*
	28	* Private routines/data
	29	*/
	30
	31	extern unsigned char boot_cpu_id;
f5e706ad SR	32
	33	typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
	34	unsigned long, unsigned long);
	35
	36	/*
	37	* General functions that each host system must provide.
	38	*/
	39
	40	void sun4m_init_smp(void);
	41	void sun4d_init_smp(void);
	42
	43	void smp_callin(void);
	44	void smp_boot_cpus(void);
	45	void smp_store_cpu_info(int);
	46
	47	struct seq_file;
	48	void smp_bogo(struct seq_file *);
	49	void smp_info(struct seq_file *);
	50
66e4f8c0	51	BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
f5e706ad SR	52	BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
	53	BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
	54	BTFIXUPDEF_BLACKBOX(load_current)
	55
66e4f8c0	56	#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
f5e706ad	57
66e4f8c0	58	static inline void xc0(smpfunc_t func) { smp_cross_call(func, cpu_online_map, 0, 0, 0, 0); }
f5e706ad	59	static inline void xc1(smpfunc_t func, unsigned long arg1)
66e4f8c0	60	{ smp_cross_call(func, cpu_online_map, arg1, 0, 0, 0); }
f5e706ad	61	static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
66e4f8c0	62	{ smp_cross_call(func, cpu_online_map, arg1, arg2, 0, 0); }
f5e706ad SR	63	static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
f5e706ad SR	64	unsigned long arg3)
66e4f8c0	65	{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, 0); }
f5e706ad SR	66	static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
f5e706ad SR	67	unsigned long arg3, unsigned long arg4)
66e4f8c0	68	{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, arg4); }
f5e706ad SR	69
	70	static inline int smp_call_function(void (func)(void info), void *info, int wait)
	71	{
	72	xc1((smpfunc_t)func, (unsigned long)info);
	73	return 0;
	74	}
	75
66e4f8c0 DM	76	static inline int smp_call_function_single(int cpuid, void (func) (void info),
	77	void *info, int wait)
	78	{
	79	smp_cross_call((smpfunc_t)func, cpumask_of_cpu(cpuid),
	80	(unsigned long) info, 0, 0, 0);
	81	return 0;
	82	}
	83
f5e706ad SR	84	static inline int cpu_logical_map(int cpu)
	85	{
	86	return cpu;
	87	}
	88
	89	static inline int hard_smp4m_processor_id(void)
	90	{
	91	int cpuid;
	92
	93	__asm__ __volatile__("rd %%tbr, %0\n\t"
	94	"srl %0, 12, %0\n\t"
	95	"and %0, 3, %0\n\t" :
	96	"=&r" (cpuid));
	97	return cpuid;
	98	}
	99
	100	static inline int hard_smp4d_processor_id(void)
	101	{
	102	int cpuid;
	103
	104	__asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
	105	"=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
	106	return cpuid;
	107	}
	108
8401707f KE	109	extern inline int hard_smpleon_processor_id(void)
	110	{
	111	int cpuid;
	112	__asm__ __volatile__("rd %%asr17,%0\n\t"
	113	"srl %0,28,%0" :
	114	"=&r" (cpuid) : );
	115	return cpuid;
	116	}
	117
f5e706ad SR	118	#ifndef MODULE
	119	static inline int hard_smp_processor_id(void)
	120	{
	121	int cpuid;
	122
	123	/* Black box - sun4m
	124	__asm__ __volatile__("rd %%tbr, %0\n\t"
	125	"srl %0, 12, %0\n\t"
	126	"and %0, 3, %0\n\t" :
	127	"=&r" (cpuid));
	128	- sun4d
	129	__asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
	130	"nop; nop" :
	131	"=&r" (cpuid));
	132	See btfixup.h and btfixupprep.c to understand how a blackbox works.
	133	*/
	134	__asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
	135	"sethi %%hi(boot_cpu_id), %0\n\t"
	136	"ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
	137	"=&r" (cpuid));
	138	return cpuid;
	139	}
	140	#else
	141	static inline int hard_smp_processor_id(void)
	142	{
	143	int cpuid;
	144
	145	__asm__ __volatile__("mov %%o7, %%g1\n\t"
	146	"call ___f___hard_smp_processor_id\n\t"
	147	" nop\n\t"
	148	"mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
	149	return cpuid;
	150	}
	151	#endif
	152
	153	#define raw_smp_processor_id() (current_thread_info()->cpu)
	154
	155	#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
	156	#define prof_counter(__cpu) cpu_data(__cpu).counter
	157
	158	void smp_setup_cpu_possible_map(void);
	159
	160	#endif /* !(__ASSEMBLY__) */
	161
	162	/* Sparc specific messages. */
	163	#define MSG_CROSS_CALL 0x0005 /* run func on cpus */
	164
	165	/* Empirical PROM processor mailbox constants. If the per-cpu mailbox
	166	* contains something other than one of these then the ipi is from
	167	* Linux's active_kernel_processor. This facility exists so that
	168	* the boot monitor can capture all the other cpus when one catches
	169	* a watchdog reset or the user enters the monitor using L1-A keys.
	170	*/
	171	#define MBOX_STOPCPU 0xFB
	172	#define MBOX_IDLECPU 0xFC
	173	#define MBOX_IDLECPU2 0xFD
	174	#define MBOX_STOPCPU2 0xFE
	175
	176	#else /* SMP */
	177
	178	#define hard_smp_processor_id() 0
	179	#define smp_setup_cpu_possible_map() do { } while (0)
	180
	181	#endif /* !(SMP) */
f5e706ad	182	#endif /* !(_SPARC_SMP_H) */