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f5e706ad SR |
1 | #ifndef _SPARC64_TLBFLUSH_H |
2 | #define _SPARC64_TLBFLUSH_H | |
3 | ||
4 | #include <linux/mm.h> | |
5 | #include <asm/mmu_context.h> | |
6 | ||
7 | /* TSB flush operations. */ | |
90f08e39 PZ |
8 | |
9 | #define TLB_BATCH_NR 192 | |
10 | ||
11 | struct tlb_batch { | |
12 | struct mm_struct *mm; | |
13 | unsigned long tlb_nr; | |
f36391d2 | 14 | unsigned long active; |
90f08e39 PZ |
15 | unsigned long vaddrs[TLB_BATCH_NR]; |
16 | }; | |
17 | ||
f5e706ad | 18 | extern void flush_tsb_kernel_range(unsigned long start, unsigned long end); |
90f08e39 | 19 | extern void flush_tsb_user(struct tlb_batch *tb); |
f36391d2 | 20 | extern void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr); |
f5e706ad SR |
21 | |
22 | /* TLB flush operations. */ | |
23 | ||
f36391d2 DM |
24 | static inline void flush_tlb_mm(struct mm_struct *mm) |
25 | { | |
26 | } | |
27 | ||
28 | static inline void flush_tlb_page(struct vm_area_struct *vma, | |
29 | unsigned long vmaddr) | |
30 | { | |
31 | } | |
32 | ||
33 | static inline void flush_tlb_range(struct vm_area_struct *vma, | |
34 | unsigned long start, unsigned long end) | |
35 | { | |
36 | } | |
37 | ||
38 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
f5e706ad | 39 | |
f36391d2 DM |
40 | extern void flush_tlb_pending(void); |
41 | extern void arch_enter_lazy_mmu_mode(void); | |
42 | extern void arch_leave_lazy_mmu_mode(void); | |
43 | #define arch_flush_lazy_mmu_mode() do {} while (0) | |
f5e706ad SR |
44 | |
45 | /* Local cpu only. */ | |
46 | extern void __flush_tlb_all(void); | |
f36391d2 | 47 | extern void __flush_tlb_page(unsigned long context, unsigned long vaddr); |
f5e706ad SR |
48 | extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end); |
49 | ||
50 | #ifndef CONFIG_SMP | |
51 | ||
52 | #define flush_tlb_kernel_range(start,end) \ | |
53 | do { flush_tsb_kernel_range(start,end); \ | |
54 | __flush_tlb_kernel_range(start,end); \ | |
55 | } while (0) | |
56 | ||
f36391d2 DM |
57 | static inline void global_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr) |
58 | { | |
59 | __flush_tlb_page(CTX_HWBITS(mm->context), vaddr); | |
60 | } | |
61 | ||
f5e706ad SR |
62 | #else /* CONFIG_SMP */ |
63 | ||
64 | extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end); | |
f36391d2 | 65 | extern void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr); |
f5e706ad SR |
66 | |
67 | #define flush_tlb_kernel_range(start, end) \ | |
68 | do { flush_tsb_kernel_range(start,end); \ | |
69 | smp_flush_tlb_kernel_range(start, end); \ | |
70 | } while (0) | |
71 | ||
f36391d2 DM |
72 | #define global_flush_tlb_page(mm, vaddr) \ |
73 | smp_flush_tlb_page(mm, vaddr) | |
74 | ||
f5e706ad SR |
75 | #endif /* ! CONFIG_SMP */ |
76 | ||
77 | #endif /* _SPARC64_TLBFLUSH_H */ |