Commit | Line | Data |
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1da177e4 LT |
1 | /* cpu.c: Dinky routines to look for the kind of Sparc cpu |
2 | * we are on. | |
3 | * | |
ba4962d7 | 4 | * Copyright (C) 1996, 2007, 2008 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
5 | */ |
6 | ||
1da177e4 LT |
7 | #include <linux/kernel.h> |
8 | #include <linux/init.h> | |
9 | #include <linux/sched.h> | |
10 | #include <linux/smp.h> | |
11 | #include <asm/asi.h> | |
12 | #include <asm/system.h> | |
13 | #include <asm/fpumacro.h> | |
14 | #include <asm/cpudata.h> | |
12816ab3 | 15 | #include <asm/spitfire.h> |
6c70b6fc | 16 | #include <asm/oplib.h> |
1da177e4 | 17 | |
3d5ae6b6 | 18 | #include "entry.h" |
53ae3419 | 19 | #include "kernel.h" |
3d5ae6b6 | 20 | |
1da177e4 LT |
21 | DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; |
22 | ||
ba4962d7 DM |
23 | struct cpu_chip_info { |
24 | unsigned short manuf; | |
25 | unsigned short impl; | |
26 | const char *cpu_name; | |
27 | const char *fp_name; | |
1da177e4 LT |
28 | }; |
29 | ||
ba4962d7 DM |
30 | static const struct cpu_chip_info cpu_chips[] = { |
31 | { | |
32 | .manuf = 0x17, | |
33 | .impl = 0x10, | |
34 | .cpu_name = "TI UltraSparc I (SpitFire)", | |
35 | .fp_name = "UltraSparc I integrated FPU", | |
36 | }, | |
37 | { | |
38 | .manuf = 0x22, | |
39 | .impl = 0x10, | |
40 | .cpu_name = "TI UltraSparc I (SpitFire)", | |
41 | .fp_name = "UltraSparc I integrated FPU", | |
42 | }, | |
43 | { | |
44 | .manuf = 0x17, | |
45 | .impl = 0x11, | |
46 | .cpu_name = "TI UltraSparc II (BlackBird)", | |
47 | .fp_name = "UltraSparc II integrated FPU", | |
48 | }, | |
49 | { | |
50 | .manuf = 0x17, | |
51 | .impl = 0x12, | |
52 | .cpu_name = "TI UltraSparc IIi (Sabre)", | |
53 | .fp_name = "UltraSparc IIi integrated FPU", | |
54 | }, | |
55 | { | |
56 | .manuf = 0x17, | |
57 | .impl = 0x13, | |
58 | .cpu_name = "TI UltraSparc IIe (Hummingbird)", | |
59 | .fp_name = "UltraSparc IIe integrated FPU", | |
60 | }, | |
61 | { | |
62 | .manuf = 0x3e, | |
63 | .impl = 0x14, | |
64 | .cpu_name = "TI UltraSparc III (Cheetah)", | |
65 | .fp_name = "UltraSparc III integrated FPU", | |
66 | }, | |
67 | { | |
68 | .manuf = 0x3e, | |
69 | .impl = 0x15, | |
70 | .cpu_name = "TI UltraSparc III+ (Cheetah+)", | |
71 | .fp_name = "UltraSparc III+ integrated FPU", | |
72 | }, | |
73 | { | |
74 | .manuf = 0x3e, | |
75 | .impl = 0x16, | |
76 | .cpu_name = "TI UltraSparc IIIi (Jalapeno)", | |
77 | .fp_name = "UltraSparc IIIi integrated FPU", | |
78 | }, | |
79 | { | |
80 | .manuf = 0x3e, | |
81 | .impl = 0x18, | |
82 | .cpu_name = "TI UltraSparc IV (Jaguar)", | |
83 | .fp_name = "UltraSparc IV integrated FPU", | |
84 | }, | |
85 | { | |
86 | .manuf = 0x3e, | |
87 | .impl = 0x19, | |
88 | .cpu_name = "TI UltraSparc IV+ (Panther)", | |
89 | .fp_name = "UltraSparc IV+ integrated FPU", | |
90 | }, | |
91 | { | |
92 | .manuf = 0x3e, | |
93 | .impl = 0x22, | |
94 | .cpu_name = "TI UltraSparc IIIi+ (Serrano)", | |
95 | .fp_name = "UltraSparc IIIi+ integrated FPU", | |
96 | }, | |
1da177e4 LT |
97 | }; |
98 | ||
ba4962d7 | 99 | #define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips) |
1da177e4 | 100 | |
ba4962d7 DM |
101 | const char *sparc_cpu_type; |
102 | const char *sparc_fpu_type; | |
1da177e4 | 103 | |
68c9f9fd DM |
104 | static void __init sun4v_cpu_probe(void) |
105 | { | |
6c70b6fc DM |
106 | switch (sun4v_chip_type) { |
107 | case SUN4V_CHIP_NIAGARA1: | |
68c9f9fd DM |
108 | sparc_cpu_type = "UltraSparc T1 (Niagara)"; |
109 | sparc_fpu_type = "UltraSparc T1 integrated FPU"; | |
6c70b6fc DM |
110 | break; |
111 | ||
112 | case SUN4V_CHIP_NIAGARA2: | |
68c9f9fd DM |
113 | sparc_cpu_type = "UltraSparc T2 (Niagara2)"; |
114 | sparc_fpu_type = "UltraSparc T2 integrated FPU"; | |
6c70b6fc DM |
115 | break; |
116 | ||
117 | default: | |
118 | printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n", | |
119 | prom_cpu_compatible); | |
120 | sparc_cpu_type = "Unknown SUN4V CPU"; | |
121 | sparc_fpu_type = "Unknown SUN4V FPU"; | |
122 | break; | |
123 | } | |
68c9f9fd DM |
124 | } |
125 | ||
ba4962d7 DM |
126 | static const struct cpu_chip_info * __init find_cpu_chip(unsigned short manuf, |
127 | unsigned short impl) | |
1da177e4 | 128 | { |
1da177e4 | 129 | int i; |
d82ace7d | 130 | |
ba4962d7 DM |
131 | for (i = 0; i < ARRAY_SIZE(cpu_chips); i++) { |
132 | const struct cpu_chip_info *p = &cpu_chips[i]; | |
1da177e4 | 133 | |
ba4962d7 DM |
134 | if (p->manuf == manuf && p->impl == impl) |
135 | return p; | |
1da177e4 | 136 | } |
ba4962d7 DM |
137 | return NULL; |
138 | } | |
1da177e4 | 139 | |
ba4962d7 DM |
140 | static int __init cpu_type_probe(void) |
141 | { | |
142 | if (tlb_type == hypervisor) { | |
143 | sun4v_cpu_probe(); | |
144 | } else { | |
145 | unsigned long ver, manuf, impl; | |
146 | const struct cpu_chip_info *p; | |
147 | ||
148 | __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver)); | |
149 | ||
150 | manuf = ((ver >> 48) & 0xffff); | |
151 | impl = ((ver >> 32) & 0xffff); | |
152 | ||
153 | p = find_cpu_chip(manuf, impl); | |
154 | if (p) { | |
155 | sparc_cpu_type = p->cpu_name; | |
156 | sparc_fpu_type = p->fp_name; | |
157 | } else { | |
158 | printk(KERN_ERR "CPU: Unknown chip, manuf[%lx] impl[%lx]\n", | |
159 | manuf, impl); | |
160 | sparc_cpu_type = "Unknown CPU"; | |
161 | sparc_fpu_type = "Unknown FPU"; | |
1da177e4 LT |
162 | } |
163 | } | |
ba4962d7 | 164 | return 0; |
1da177e4 | 165 | } |
ba4962d7 DM |
166 | |
167 | arch_initcall(cpu_type_probe); |