Commit | Line | Data |
---|---|---|
b00dc837 | 1 | /* |
1da177e4 LT |
2 | * dtlb_prot.S: DTLB protection trap strategy. |
3 | * This is included directly into the trap table. | |
4 | * | |
5 | * Copyright (C) 1996,1998 David S. Miller (davem@redhat.com) | |
6 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@ultra.linux.cz) | |
7 | */ | |
8 | ||
9 | /* Ways we can get here: | |
10 | * | |
11 | * [TL == 0] 1) User stores to readonly pages. | |
12 | * [TL == 0] 2) Nucleus stores to user readonly pages. | |
13 | * [TL > 0] 3) Nucleus stores to user readonly stack frame. | |
14 | */ | |
15 | ||
16 | /* PROT ** ICACHE line 1: User DTLB protection trap */ | |
c9c10830 DM |
17 | mov TLB_SFSR, %g1 |
18 | stxa %g0, [%g1] ASI_DMMU ! Clear FaultValid bit | |
19 | membar #Sync ! Synchronize stores | |
20 | rdpr %pstate, %g5 ! Move into alt-globals | |
1da177e4 | 21 | wrpr %g5, PSTATE_AG|PSTATE_MG, %pstate |
c9c10830 | 22 | rdpr %tl, %g1 ! Need a winfixup? |
1da177e4 | 23 | cmp %g1, 1 ! Trap level >1? |
c9c10830 | 24 | mov TLB_TAG_ACCESS, %g4 ! For reload of vaddr |
1da177e4 LT |
25 | |
26 | /* PROT ** ICACHE line 2: More real fault processing */ | |
27 | bgu,pn %xcc, winfix_trampoline ! Yes, perform winfixup | |
28 | ldxa [%g4] ASI_DMMU, %g5 ! Put tagaccess in %g5 | |
29 | ba,pt %xcc, sparc64_realfault_common ! Nope, normal fault | |
30 | mov FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4 | |
31 | nop | |
32 | nop | |
33 | nop | |
34 | nop | |
35 | ||
36 | /* PROT ** ICACHE line 3: Unused... */ | |
37 | nop | |
38 | nop | |
39 | nop | |
40 | nop | |
41 | nop | |
42 | nop | |
43 | nop | |
44 | nop | |
45 | ||
46 | /* PROT ** ICACHE line 4: Unused... */ | |
47 | nop | |
48 | nop | |
49 | nop | |
50 | nop | |
51 | nop | |
52 | nop | |
53 | nop | |
54 | nop |