projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 3d5ae6b6 DM |
1 | #ifndef _ENTRY_H |
| 2 | #define _ENTRY_H | |
| 3 | ||
| bfdf9ebc | 4 | #include <linux/kernel.h> |
| 99cd2201 | 5 | #include <linux/types.h> |
| bfdf9ebc | 6 | #include <linux/init.h> |
| 3d5ae6b6 | 7 | |
| 3d5ae6b6 DM |
8 | extern void __init per_cpu_patch(void); |
| 9 | extern void __init sun4v_patch(void); | |
| 10 | extern void __init boot_cpu_id_too_large(int cpu); | |
| 11 | extern unsigned int dcache_parity_tl1_occurred; | |
| 12 | extern unsigned int icache_parity_tl1_occurred; | |
| 13 | ||
| 207ddd0a DM |
14 | extern asmlinkage void update_perfctrs(void); |
| 15 | extern asmlinkage void sparc_breakpoint(struct pt_regs *regs); | |
| cf3d7c1e DM |
16 | extern void timer_interrupt(int irq, struct pt_regs *regs); |
| 17 | ||
| 062ea6d3 DM |
18 | extern void do_notify_resume(struct pt_regs *regs, |
| 19 | unsigned long orig_i0, | |
| 062ea6d3 DM |
20 | unsigned long thread_info_flags); |
| 21 | ||
| fe06ccaa DM |
22 | extern asmlinkage int syscall_trace_enter(struct pt_regs *regs); |
| 23 | extern asmlinkage void syscall_trace_leave(struct pt_regs *regs); | |
| bfdf9ebc | 24 | |
| 99cd2201 DM |
25 | extern void bad_trap_tl1(struct pt_regs *regs, long lvl); |
| 26 | ||
| 27 | extern void do_fpe_common(struct pt_regs *regs); | |
| 28 | extern void do_fpieee(struct pt_regs *regs); | |
| 29 | extern void do_fpother(struct pt_regs *regs); | |
| 30 | extern void do_tof(struct pt_regs *regs); | |
| 31 | extern void do_div0(struct pt_regs *regs); | |
| 32 | extern void do_illegal_instruction(struct pt_regs *regs); | |
| 33 | extern void mem_address_unaligned(struct pt_regs *regs, | |
| 34 | unsigned long sfar, | |
| 35 | unsigned long sfsr); | |
| 36 | extern void sun4v_do_mna(struct pt_regs *regs, | |
| 37 | unsigned long addr, | |
| 38 | unsigned long type_ctx); | |
| 39 | extern void do_privop(struct pt_regs *regs); | |
| 40 | extern void do_privact(struct pt_regs *regs); | |
| 41 | extern void do_cee(struct pt_regs *regs); | |
| 42 | extern void do_cee_tl1(struct pt_regs *regs); | |
| 43 | extern void do_dae_tl1(struct pt_regs *regs); | |
| 44 | extern void do_iae_tl1(struct pt_regs *regs); | |
| 45 | extern void do_div0_tl1(struct pt_regs *regs); | |
| 46 | extern void do_fpdis_tl1(struct pt_regs *regs); | |
| 47 | extern void do_fpieee_tl1(struct pt_regs *regs); | |
| 48 | extern void do_fpother_tl1(struct pt_regs *regs); | |
| 49 | extern void do_ill_tl1(struct pt_regs *regs); | |
| 50 | extern void do_irq_tl1(struct pt_regs *regs); | |
| 51 | extern void do_lddfmna_tl1(struct pt_regs *regs); | |
| 52 | extern void do_stdfmna_tl1(struct pt_regs *regs); | |
| 53 | extern void do_paw(struct pt_regs *regs); | |
| 54 | extern void do_paw_tl1(struct pt_regs *regs); | |
| 55 | extern void do_vaw(struct pt_regs *regs); | |
| 56 | extern void do_vaw_tl1(struct pt_regs *regs); | |
| 57 | extern void do_tof_tl1(struct pt_regs *regs); | |
| 58 | extern void do_getpsr(struct pt_regs *regs); | |
| 59 | ||
| 60 | extern void spitfire_insn_access_exception(struct pt_regs *regs, | |
| 61 | unsigned long sfsr, | |
| 62 | unsigned long sfar); | |
| 63 | extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs, | |
| 64 | unsigned long sfsr, | |
| 65 | unsigned long sfar); | |
| 66 | extern void spitfire_data_access_exception(struct pt_regs *regs, | |
| 67 | unsigned long sfsr, | |
| 68 | unsigned long sfar); | |
| 69 | extern void spitfire_data_access_exception_tl1(struct pt_regs *regs, | |
| 70 | unsigned long sfsr, | |
| 71 | unsigned long sfar); | |
| 72 | extern void spitfire_access_error(struct pt_regs *regs, | |
| 73 | unsigned long status_encoded, | |
| 74 | unsigned long afar); | |
| 75 | ||
| 76 | extern void cheetah_fecc_handler(struct pt_regs *regs, | |
| 77 | unsigned long afsr, | |
| 78 | unsigned long afar); | |
| 79 | extern void cheetah_cee_handler(struct pt_regs *regs, | |
| 80 | unsigned long afsr, | |
| 81 | unsigned long afar); | |
| 82 | extern void cheetah_deferred_handler(struct pt_regs *regs, | |
| 83 | unsigned long afsr, | |
| 84 | unsigned long afar); | |
| 85 | extern void cheetah_plus_parity_error(int type, struct pt_regs *regs); | |
| 86 | ||
| 87 | extern void sun4v_insn_access_exception(struct pt_regs *regs, | |
| 88 | unsigned long addr, | |
| 89 | unsigned long type_ctx); | |
| 90 | extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs, | |
| 91 | unsigned long addr, | |
| 92 | unsigned long type_ctx); | |
| 93 | extern void sun4v_data_access_exception(struct pt_regs *regs, | |
| 94 | unsigned long addr, | |
| 95 | unsigned long type_ctx); | |
| 96 | extern void sun4v_data_access_exception_tl1(struct pt_regs *regs, | |
| 97 | unsigned long addr, | |
| 98 | unsigned long type_ctx); | |
| 99 | extern void sun4v_resum_error(struct pt_regs *regs, | |
| 100 | unsigned long offset); | |
| 101 | extern void sun4v_resum_overflow(struct pt_regs *regs); | |
| 102 | extern void sun4v_nonresum_error(struct pt_regs *regs, | |
| 103 | unsigned long offset); | |
| 104 | extern void sun4v_nonresum_overflow(struct pt_regs *regs); | |
| 105 | ||
| 106 | extern unsigned long sun4v_err_itlb_vaddr; | |
| 107 | extern unsigned long sun4v_err_itlb_ctx; | |
| 108 | extern unsigned long sun4v_err_itlb_pte; | |
| 109 | extern unsigned long sun4v_err_itlb_error; | |
| 110 | ||
| 111 | extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl); | |
| 112 | ||
| 113 | extern unsigned long sun4v_err_dtlb_vaddr; | |
| 114 | extern unsigned long sun4v_err_dtlb_ctx; | |
| 115 | extern unsigned long sun4v_err_dtlb_pte; | |
| 116 | extern unsigned long sun4v_err_dtlb_error; | |
| 117 | ||
| 118 | extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl); | |
| 119 | extern void hypervisor_tlbop_error(unsigned long err, | |
| 120 | unsigned long op); | |
| 121 | extern void hypervisor_tlbop_error_xcall(unsigned long err, | |
| 122 | unsigned long op); | |
| 123 | ||
| 124 | /* WARNING: The error trap handlers in assembly know the precise | |
| 125 | * layout of the following structure. | |
| 126 | * | |
| 127 | * C-level handlers in traps.c use this information to log the | |
| 128 | * error and then determine how to recover (if possible). | |
| 129 | */ | |
| 130 | struct cheetah_err_info { | |
| 131 | /*0x00*/u64 afsr; | |
| 132 | /*0x08*/u64 afar; | |
| 133 | ||
| 134 | /* D-cache state */ | |
| 135 | /*0x10*/u64 dcache_data[4]; /* The actual data */ | |
| 136 | /*0x30*/u64 dcache_index; /* D-cache index */ | |
| 137 | /*0x38*/u64 dcache_tag; /* D-cache tag/valid */ | |
| 138 | /*0x40*/u64 dcache_utag; /* D-cache microtag */ | |
| 139 | /*0x48*/u64 dcache_stag; /* D-cache snooptag */ | |
| 140 | ||
| 141 | /* I-cache state */ | |
| 142 | /*0x50*/u64 icache_data[8]; /* The actual insns + predecode */ | |
| 143 | /*0x90*/u64 icache_index; /* I-cache index */ | |
| 144 | /*0x98*/u64 icache_tag; /* I-cache phys tag */ | |
| 145 | /*0xa0*/u64 icache_utag; /* I-cache microtag */ | |
| 146 | /*0xa8*/u64 icache_stag; /* I-cache snooptag */ | |
| 147 | /*0xb0*/u64 icache_upper; /* I-cache upper-tag */ | |
| 148 | /*0xb8*/u64 icache_lower; /* I-cache lower-tag */ | |
| 149 | ||
| 150 | /* E-cache state */ | |
| 151 | /*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */ | |
| 152 | /*0xe0*/u64 ecache_index; /* E-cache index */ | |
| 153 | /*0xe8*/u64 ecache_tag; /* E-cache tag/state */ | |
| 154 | ||
| 155 | /*0xf0*/u64 __pad[32 - 30]; | |
| 156 | }; | |
| 157 | #define CHAFSR_INVALID ((u64)-1L) | |
| 158 | ||
| 159 | /* This is allocated at boot time based upon the largest hardware | |
| 160 | * cpu ID in the system. We allocate two entries per cpu, one for | |
| 161 | * TL==0 logging and one for TL >= 1 logging. | |
| 162 | */ | |
| 163 | extern struct cheetah_err_info *cheetah_error_log; | |
| 164 | ||
| d91aa123 DM |
165 | /* UPA nodes send interrupt packet to UltraSparc with first data reg |
| 166 | * value low 5 (7 on Starfire) bits holding the IRQ identifier being | |
| 167 | * delivered. We must translate this into a non-vector IRQ so we can | |
| 168 | * set the softint on this cpu. | |
| 169 | * | |
| 170 | * To make processing these packets efficient and race free we use | |
| 171 | * an array of irq buckets below. The interrupt vector handler in | |
| 172 | * entry.S feeds incoming packets into per-cpu pil-indexed lists. | |
| 173 | * | |
| 174 | * If you make changes to ino_bucket, please update hand coded assembler | |
| 175 | * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S | |
| 176 | */ | |
| 177 | struct ino_bucket { | |
| 178 | /*0x00*/unsigned long __irq_chain_pa; | |
| 179 | ||
| 180 | /* Virtual interrupt number assigned to this INO. */ | |
| 181 | /*0x08*/unsigned int __virt_irq; | |
| 182 | /*0x0c*/unsigned int __pad; | |
| 183 | }; | |
| 184 | ||
| 185 | extern struct ino_bucket *ivector_table; | |
| 186 | extern unsigned long ivector_table_pa; | |
| 187 | ||
| 188 | extern void handler_irq(int irq, struct pt_regs *regs); | |
| 189 | extern void init_irqwork_curcpu(void); | |
| 190 | extern void __cpuinit sun4v_register_mondo_queues(int this_cpu); | |
| 191 | ||
| 3d5ae6b6 | 192 | #endif /* _ENTRY_H */ |