sparc64: Fix cpu strand yielding.
[deliverable/linux.git] / arch / sparc / kernel / entry.h
CommitLineData
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1#ifndef _ENTRY_H
2#define _ENTRY_H
3
bfdf9ebc 4#include <linux/kernel.h>
99cd2201 5#include <linux/types.h>
bfdf9ebc 6#include <linux/init.h>
3d5ae6b6 7
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8/* irq */
9extern void handler_irq(int irq, struct pt_regs *regs);
10
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11#ifdef CONFIG_SPARC32
12/* traps */
13extern void do_hw_interrupt(struct pt_regs *regs, unsigned long type);
14extern void do_illegal_instruction(struct pt_regs *regs, unsigned long pc,
15 unsigned long npc, unsigned long psr);
16
17extern void do_priv_instruction(struct pt_regs *regs, unsigned long pc,
18 unsigned long npc, unsigned long psr);
19extern void do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc,
20 unsigned long npc,
21 unsigned long psr);
22extern void do_fpd_trap(struct pt_regs *regs, unsigned long pc,
23 unsigned long npc, unsigned long psr);
24extern void do_fpe_trap(struct pt_regs *regs, unsigned long pc,
25 unsigned long npc, unsigned long psr);
26extern void handle_tag_overflow(struct pt_regs *regs, unsigned long pc,
27 unsigned long npc, unsigned long psr);
28extern void handle_watchpoint(struct pt_regs *regs, unsigned long pc,
29 unsigned long npc, unsigned long psr);
30extern void handle_reg_access(struct pt_regs *regs, unsigned long pc,
31 unsigned long npc, unsigned long psr);
32extern void handle_cp_disabled(struct pt_regs *regs, unsigned long pc,
33 unsigned long npc, unsigned long psr);
34extern void handle_cp_exception(struct pt_regs *regs, unsigned long pc,
35 unsigned long npc, unsigned long psr);
36
37
38
39/* entry.S */
40extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
41 void *fpqueue, unsigned long *fpqdepth);
42extern void fpload(unsigned long *fpregs, unsigned long *fsr);
43
44#else /* CONFIG_SPARC32 */
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45
46#include <asm/trap_block.h>
47
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48struct popc_3insn_patch_entry {
49 unsigned int addr;
50 unsigned int insns[3];
51};
52extern struct popc_3insn_patch_entry __popc_3insn_patch,
53 __popc_3insn_patch_end;
54
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55struct popc_6insn_patch_entry {
56 unsigned int addr;
57 unsigned int insns[6];
58};
59extern struct popc_6insn_patch_entry __popc_6insn_patch,
60 __popc_6insn_patch_end;
61
3d5ae6b6 62extern void __init per_cpu_patch(void);
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63extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
64 struct sun4v_1insn_patch_entry *);
65extern void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
66 struct sun4v_2insn_patch_entry *);
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67extern void __init sun4v_patch(void);
68extern void __init boot_cpu_id_too_large(int cpu);
69extern unsigned int dcache_parity_tl1_occurred;
70extern unsigned int icache_parity_tl1_occurred;
71
207ddd0a 72extern asmlinkage void sparc_breakpoint(struct pt_regs *regs);
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73extern void timer_interrupt(int irq, struct pt_regs *regs);
74
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75extern void do_notify_resume(struct pt_regs *regs,
76 unsigned long orig_i0,
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77 unsigned long thread_info_flags);
78
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79extern asmlinkage int syscall_trace_enter(struct pt_regs *regs);
80extern asmlinkage void syscall_trace_leave(struct pt_regs *regs);
bfdf9ebc 81
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82extern void bad_trap_tl1(struct pt_regs *regs, long lvl);
83
84extern void do_fpe_common(struct pt_regs *regs);
85extern void do_fpieee(struct pt_regs *regs);
86extern void do_fpother(struct pt_regs *regs);
87extern void do_tof(struct pt_regs *regs);
88extern void do_div0(struct pt_regs *regs);
89extern void do_illegal_instruction(struct pt_regs *regs);
90extern void mem_address_unaligned(struct pt_regs *regs,
91 unsigned long sfar,
92 unsigned long sfsr);
93extern void sun4v_do_mna(struct pt_regs *regs,
94 unsigned long addr,
95 unsigned long type_ctx);
96extern void do_privop(struct pt_regs *regs);
97extern void do_privact(struct pt_regs *regs);
98extern void do_cee(struct pt_regs *regs);
99extern void do_cee_tl1(struct pt_regs *regs);
100extern void do_dae_tl1(struct pt_regs *regs);
101extern void do_iae_tl1(struct pt_regs *regs);
102extern void do_div0_tl1(struct pt_regs *regs);
103extern void do_fpdis_tl1(struct pt_regs *regs);
104extern void do_fpieee_tl1(struct pt_regs *regs);
105extern void do_fpother_tl1(struct pt_regs *regs);
106extern void do_ill_tl1(struct pt_regs *regs);
107extern void do_irq_tl1(struct pt_regs *regs);
108extern void do_lddfmna_tl1(struct pt_regs *regs);
109extern void do_stdfmna_tl1(struct pt_regs *regs);
110extern void do_paw(struct pt_regs *regs);
111extern void do_paw_tl1(struct pt_regs *regs);
112extern void do_vaw(struct pt_regs *regs);
113extern void do_vaw_tl1(struct pt_regs *regs);
114extern void do_tof_tl1(struct pt_regs *regs);
115extern void do_getpsr(struct pt_regs *regs);
116
117extern void spitfire_insn_access_exception(struct pt_regs *regs,
118 unsigned long sfsr,
119 unsigned long sfar);
120extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
121 unsigned long sfsr,
122 unsigned long sfar);
123extern void spitfire_data_access_exception(struct pt_regs *regs,
124 unsigned long sfsr,
125 unsigned long sfar);
126extern void spitfire_data_access_exception_tl1(struct pt_regs *regs,
127 unsigned long sfsr,
128 unsigned long sfar);
129extern void spitfire_access_error(struct pt_regs *regs,
130 unsigned long status_encoded,
131 unsigned long afar);
132
133extern void cheetah_fecc_handler(struct pt_regs *regs,
134 unsigned long afsr,
135 unsigned long afar);
136extern void cheetah_cee_handler(struct pt_regs *regs,
137 unsigned long afsr,
138 unsigned long afar);
139extern void cheetah_deferred_handler(struct pt_regs *regs,
140 unsigned long afsr,
141 unsigned long afar);
142extern void cheetah_plus_parity_error(int type, struct pt_regs *regs);
143
144extern void sun4v_insn_access_exception(struct pt_regs *regs,
145 unsigned long addr,
146 unsigned long type_ctx);
147extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
148 unsigned long addr,
149 unsigned long type_ctx);
150extern void sun4v_data_access_exception(struct pt_regs *regs,
151 unsigned long addr,
152 unsigned long type_ctx);
153extern void sun4v_data_access_exception_tl1(struct pt_regs *regs,
154 unsigned long addr,
155 unsigned long type_ctx);
156extern void sun4v_resum_error(struct pt_regs *regs,
157 unsigned long offset);
158extern void sun4v_resum_overflow(struct pt_regs *regs);
159extern void sun4v_nonresum_error(struct pt_regs *regs,
160 unsigned long offset);
161extern void sun4v_nonresum_overflow(struct pt_regs *regs);
162
163extern unsigned long sun4v_err_itlb_vaddr;
164extern unsigned long sun4v_err_itlb_ctx;
165extern unsigned long sun4v_err_itlb_pte;
166extern unsigned long sun4v_err_itlb_error;
167
168extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
169
170extern unsigned long sun4v_err_dtlb_vaddr;
171extern unsigned long sun4v_err_dtlb_ctx;
172extern unsigned long sun4v_err_dtlb_pte;
173extern unsigned long sun4v_err_dtlb_error;
174
175extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
176extern void hypervisor_tlbop_error(unsigned long err,
177 unsigned long op);
178extern void hypervisor_tlbop_error_xcall(unsigned long err,
179 unsigned long op);
180
181/* WARNING: The error trap handlers in assembly know the precise
182 * layout of the following structure.
183 *
184 * C-level handlers in traps.c use this information to log the
185 * error and then determine how to recover (if possible).
186 */
187struct cheetah_err_info {
188/*0x00*/u64 afsr;
189/*0x08*/u64 afar;
190
191 /* D-cache state */
192/*0x10*/u64 dcache_data[4]; /* The actual data */
193/*0x30*/u64 dcache_index; /* D-cache index */
194/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
195/*0x40*/u64 dcache_utag; /* D-cache microtag */
196/*0x48*/u64 dcache_stag; /* D-cache snooptag */
197
198 /* I-cache state */
199/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
200/*0x90*/u64 icache_index; /* I-cache index */
201/*0x98*/u64 icache_tag; /* I-cache phys tag */
202/*0xa0*/u64 icache_utag; /* I-cache microtag */
203/*0xa8*/u64 icache_stag; /* I-cache snooptag */
204/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
205/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
206
207 /* E-cache state */
208/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
209/*0xe0*/u64 ecache_index; /* E-cache index */
210/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
211
212/*0xf0*/u64 __pad[32 - 30];
213};
214#define CHAFSR_INVALID ((u64)-1L)
215
216/* This is allocated at boot time based upon the largest hardware
217 * cpu ID in the system. We allocate two entries per cpu, one for
218 * TL==0 logging and one for TL >= 1 logging.
219 */
220extern struct cheetah_err_info *cheetah_error_log;
221
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222/* UPA nodes send interrupt packet to UltraSparc with first data reg
223 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
224 * delivered. We must translate this into a non-vector IRQ so we can
225 * set the softint on this cpu.
226 *
227 * To make processing these packets efficient and race free we use
228 * an array of irq buckets below. The interrupt vector handler in
229 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
230 *
231 * If you make changes to ino_bucket, please update hand coded assembler
232 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
233 */
234struct ino_bucket {
235/*0x00*/unsigned long __irq_chain_pa;
236
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237 /* Interrupt number assigned to this INO. */
238/*0x08*/unsigned int __irq;
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239/*0x0c*/unsigned int __pad;
240};
241
242extern struct ino_bucket *ivector_table;
243extern unsigned long ivector_table_pa;
244
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245extern void init_irqwork_curcpu(void);
246extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);
247
8d74e32a 248#endif /* CONFIG_SPARC32 */
3d5ae6b6 249#endif /* _ENTRY_H */
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