Commit | Line | Data |
---|---|---|
88278ca2 | 1 | /* |
1da177e4 LT |
2 | * ioport.c: Simple io mapping allocator. |
3 | * | |
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | |
5 | * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
6 | * | |
7 | * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev. | |
8 | * | |
9 | * 2000/01/29 | |
10 | * <rth> zait: as long as pci_alloc_consistent produces something addressable, | |
11 | * things are ok. | |
12 | * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a | |
13 | * pointer into the big page mapping | |
14 | * <rth> zait: so what? | |
15 | * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page())) | |
16 | * <zaitcev> Hmm | |
17 | * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())). | |
18 | * So far so good. | |
19 | * <zaitcev> Now, driver calls pci_free_consistent(with result of | |
20 | * remap_it_my_way()). | |
21 | * <zaitcev> How do you find the address to pass to free_pages()? | |
22 | * <rth> zait: walk the page tables? It's only two or three level after all. | |
23 | * <rth> zait: you have to walk them anyway to remove the mapping. | |
24 | * <zaitcev> Hmm | |
25 | * <zaitcev> Sounds reasonable | |
26 | */ | |
27 | ||
3ca9fab4 | 28 | #include <linux/module.h> |
1da177e4 LT |
29 | #include <linux/sched.h> |
30 | #include <linux/kernel.h> | |
31 | #include <linux/errno.h> | |
32 | #include <linux/types.h> | |
33 | #include <linux/ioport.h> | |
34 | #include <linux/mm.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/pci.h> /* struct pci_dev */ | |
37 | #include <linux/proc_fs.h> | |
e7a088f9 | 38 | #include <linux/seq_file.h> |
0912a5db | 39 | #include <linux/scatterlist.h> |
764f2579 | 40 | #include <linux/of_device.h> |
1da177e4 LT |
41 | |
42 | #include <asm/io.h> | |
43 | #include <asm/vaddrs.h> | |
44 | #include <asm/oplib.h> | |
576c352e | 45 | #include <asm/prom.h> |
1da177e4 LT |
46 | #include <asm/page.h> |
47 | #include <asm/pgalloc.h> | |
48 | #include <asm/dma.h> | |
e0039348 DM |
49 | #include <asm/iommu.h> |
50 | #include <asm/io-unit.h> | |
8401707f | 51 | #include <asm/leon.h> |
1da177e4 | 52 | |
d894d964 DM |
53 | const struct sparc32_dma_ops *sparc32_dma_ops; |
54 | ||
d81f087f KG |
55 | /* This function must make sure that caches and memory are coherent after DMA |
56 | * On LEON systems without cache snooping it flushes the entire D-CACHE. | |
57 | */ | |
d81f087f KG |
58 | static inline void dma_make_coherent(unsigned long pa, unsigned long len) |
59 | { | |
95835335 SR |
60 | if (sparc_cpu_model == sparc_leon) { |
61 | if (!sparc_leon3_snooping_enabled()) | |
62 | leon_flush_dcache_all(); | |
63 | } | |
d81f087f | 64 | } |
1da177e4 | 65 | |
1da177e4 LT |
66 | static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz); |
67 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
68 | unsigned long size, char *name); | |
69 | static void _sparc_free_io(struct resource *res); | |
70 | ||
c61c65cd AB |
71 | static void register_proc_sparc_ioport(void); |
72 | ||
1da177e4 LT |
73 | /* This points to the next to use virtual memory for DVMA mappings */ |
74 | static struct resource _sparc_dvma = { | |
75 | .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1 | |
76 | }; | |
77 | /* This points to the start of I/O mappings, cluable from outside. */ | |
78 | /*ext*/ struct resource sparc_iomap = { | |
79 | .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1 | |
80 | }; | |
81 | ||
82 | /* | |
83 | * Our mini-allocator... | |
84 | * Boy this is gross! We need it because we must map I/O for | |
85 | * timers and interrupt controller before the kmalloc is available. | |
86 | */ | |
87 | ||
88 | #define XNMLN 15 | |
89 | #define XNRES 10 /* SS-10 uses 8 */ | |
90 | ||
91 | struct xresource { | |
92 | struct resource xres; /* Must be first */ | |
93 | int xflag; /* 1 == used */ | |
94 | char xname[XNMLN+1]; | |
95 | }; | |
96 | ||
97 | static struct xresource xresv[XNRES]; | |
98 | ||
99 | static struct xresource *xres_alloc(void) { | |
100 | struct xresource *xrp; | |
101 | int n; | |
102 | ||
103 | xrp = xresv; | |
104 | for (n = 0; n < XNRES; n++) { | |
105 | if (xrp->xflag == 0) { | |
106 | xrp->xflag = 1; | |
107 | return xrp; | |
108 | } | |
109 | xrp++; | |
110 | } | |
111 | return NULL; | |
112 | } | |
113 | ||
114 | static void xres_free(struct xresource *xrp) { | |
115 | xrp->xflag = 0; | |
116 | } | |
117 | ||
118 | /* | |
119 | * These are typically used in PCI drivers | |
120 | * which are trying to be cross-platform. | |
121 | * | |
122 | * Bus type is always zero on IIep. | |
123 | */ | |
124 | void __iomem *ioremap(unsigned long offset, unsigned long size) | |
125 | { | |
126 | char name[14]; | |
127 | ||
128 | sprintf(name, "phys_%08x", (u32)offset); | |
129 | return _sparc_alloc_io(0, offset, size, name); | |
130 | } | |
6943f3da | 131 | EXPORT_SYMBOL(ioremap); |
1da177e4 LT |
132 | |
133 | /* | |
134 | * Comlimentary to ioremap(). | |
135 | */ | |
136 | void iounmap(volatile void __iomem *virtual) | |
137 | { | |
138 | unsigned long vaddr = (unsigned long) virtual & PAGE_MASK; | |
139 | struct resource *res; | |
140 | ||
a0e997c2 GU |
141 | /* |
142 | * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case. | |
143 | * This probably warrants some sort of hashing. | |
144 | */ | |
145 | if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) { | |
1da177e4 LT |
146 | printk("free_io/iounmap: cannot free %lx\n", vaddr); |
147 | return; | |
148 | } | |
149 | _sparc_free_io(res); | |
150 | ||
151 | if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) { | |
152 | xres_free((struct xresource *)res); | |
153 | } else { | |
154 | kfree(res); | |
155 | } | |
156 | } | |
6943f3da | 157 | EXPORT_SYMBOL(iounmap); |
1da177e4 | 158 | |
3ca9fab4 DM |
159 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, |
160 | unsigned long size, char *name) | |
161 | { | |
162 | return _sparc_alloc_io(res->flags & 0xF, | |
163 | res->start + offset, | |
164 | size, name); | |
165 | } | |
166 | EXPORT_SYMBOL(of_ioremap); | |
167 | ||
e3a411a3 | 168 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 DM |
169 | { |
170 | iounmap(base); | |
171 | } | |
172 | EXPORT_SYMBOL(of_iounmap); | |
173 | ||
1da177e4 LT |
174 | /* |
175 | * Meat of mapping | |
176 | */ | |
177 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
178 | unsigned long size, char *name) | |
179 | { | |
180 | static int printed_full; | |
181 | struct xresource *xres; | |
182 | struct resource *res; | |
183 | char *tack; | |
184 | int tlen; | |
185 | void __iomem *va; /* P3 diag */ | |
186 | ||
187 | if (name == NULL) name = "???"; | |
188 | ||
189 | if ((xres = xres_alloc()) != 0) { | |
190 | tack = xres->xname; | |
191 | res = &xres->xres; | |
192 | } else { | |
193 | if (!printed_full) { | |
194 | printk("ioremap: done with statics, switching to malloc\n"); | |
195 | printed_full = 1; | |
196 | } | |
197 | tlen = strlen(name); | |
198 | tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL); | |
199 | if (tack == NULL) return NULL; | |
200 | memset(tack, 0, sizeof(struct resource)); | |
201 | res = (struct resource *) tack; | |
202 | tack += sizeof (struct resource); | |
203 | } | |
204 | ||
205 | strlcpy(tack, name, XNMLN+1); | |
206 | res->name = tack; | |
207 | ||
208 | va = _sparc_ioremap(res, busno, phys, size); | |
209 | /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */ | |
210 | return va; | |
211 | } | |
212 | ||
213 | /* | |
214 | */ | |
215 | static void __iomem * | |
216 | _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz) | |
217 | { | |
218 | unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK); | |
219 | ||
220 | if (allocate_resource(&sparc_iomap, res, | |
221 | (offset + sz + PAGE_SIZE-1) & PAGE_MASK, | |
222 | sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) { | |
223 | /* Usually we cannot see printks in this case. */ | |
224 | prom_printf("alloc_io_res(%s): cannot occupy\n", | |
225 | (res->name != NULL)? res->name: "???"); | |
226 | prom_halt(); | |
227 | } | |
228 | ||
229 | pa &= PAGE_MASK; | |
9701b264 | 230 | srmmu_mapiorange(bus, pa, res->start, resource_size(res)); |
1da177e4 | 231 | |
d75fc8bb | 232 | return (void __iomem *)(unsigned long)(res->start + offset); |
1da177e4 LT |
233 | } |
234 | ||
235 | /* | |
236 | * Comlimentary to _sparc_ioremap(). | |
237 | */ | |
238 | static void _sparc_free_io(struct resource *res) | |
239 | { | |
240 | unsigned long plen; | |
241 | ||
28f65c11 | 242 | plen = resource_size(res); |
30d4d1ff | 243 | BUG_ON((plen & (PAGE_SIZE-1)) != 0); |
9701b264 | 244 | srmmu_unmapiorange(res->start, plen); |
1da177e4 LT |
245 | release_resource(res); |
246 | } | |
247 | ||
248 | #ifdef CONFIG_SBUS | |
249 | ||
63237eeb | 250 | void sbus_set_sbus64(struct device *dev, int x) |
8fae097d | 251 | { |
1da177e4 LT |
252 | printk("sbus_set_sbus64: unsupported\n"); |
253 | } | |
6943f3da | 254 | EXPORT_SYMBOL(sbus_set_sbus64); |
1da177e4 LT |
255 | |
256 | /* | |
257 | * Allocate a chunk of memory suitable for DMA. | |
258 | * Typically devices use them for control blocks. | |
259 | * CPU may access them without any explicit flushing. | |
1da177e4 | 260 | */ |
ee664a92 | 261 | static void *sbus_alloc_coherent(struct device *dev, size_t len, |
c416258a AP |
262 | dma_addr_t *dma_addrp, gfp_t gfp, |
263 | struct dma_attrs *attrs) | |
1da177e4 | 264 | { |
cd4cd730 | 265 | struct platform_device *op = to_platform_device(dev); |
5c8345bb | 266 | unsigned long len_total = PAGE_ALIGN(len); |
1da177e4 LT |
267 | unsigned long va; |
268 | struct resource *res; | |
269 | int order; | |
270 | ||
efad798b | 271 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
272 | if (len <= 0) { |
273 | return NULL; | |
274 | } | |
275 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
276 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
277 | return NULL; | |
278 | } | |
279 | ||
280 | order = get_order(len_total); | |
f3d48f03 | 281 | if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0) |
1da177e4 LT |
282 | goto err_nopages; |
283 | ||
c80892d1 | 284 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) |
1da177e4 | 285 | goto err_nomem; |
1da177e4 LT |
286 | |
287 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
288 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
289 | printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total); | |
290 | goto err_nova; | |
291 | } | |
5c8345bb | 292 | |
d894d964 | 293 | // XXX The sbus_map_dma_area does this for us below, see comments. |
9701b264 | 294 | // srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total); |
1da177e4 LT |
295 | /* |
296 | * XXX That's where sdev would be used. Currently we load | |
297 | * all iommu tables with the same translations. | |
298 | */ | |
d894d964 | 299 | if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0) |
1da177e4 LT |
300 | goto err_noiommu; |
301 | ||
61c7a080 | 302 | res->name = op->dev.of_node->name; |
4cfbd7eb | 303 | |
d75fc8bb | 304 | return (void *)(unsigned long)res->start; |
1da177e4 LT |
305 | |
306 | err_noiommu: | |
307 | release_resource(res); | |
308 | err_nova: | |
1da177e4 | 309 | kfree(res); |
0c7c6a3c KG |
310 | err_nomem: |
311 | free_pages(va, order); | |
1da177e4 LT |
312 | err_nopages: |
313 | return NULL; | |
314 | } | |
315 | ||
ee664a92 | 316 | static void sbus_free_coherent(struct device *dev, size_t n, void *p, |
c416258a | 317 | dma_addr_t ba, struct dma_attrs *attrs) |
1da177e4 LT |
318 | { |
319 | struct resource *res; | |
320 | struct page *pgv; | |
321 | ||
a0e997c2 | 322 | if ((res = lookup_resource(&_sparc_dvma, |
1da177e4 LT |
323 | (unsigned long)p)) == NULL) { |
324 | printk("sbus_free_consistent: cannot free %p\n", p); | |
325 | return; | |
326 | } | |
327 | ||
328 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
329 | printk("sbus_free_consistent: unaligned va %p\n", p); | |
330 | return; | |
331 | } | |
332 | ||
5c8345bb | 333 | n = PAGE_ALIGN(n); |
28f65c11 | 334 | if (resource_size(res) != n) { |
ee664a92 | 335 | printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n", |
28f65c11 | 336 | (long)resource_size(res), n); |
1da177e4 LT |
337 | return; |
338 | } | |
339 | ||
340 | release_resource(res); | |
341 | kfree(res); | |
342 | ||
aba945e7 | 343 | pgv = virt_to_page(p); |
d894d964 | 344 | sbus_unmap_dma_area(dev, ba, n); |
1da177e4 LT |
345 | |
346 | __free_pages(pgv, get_order(n)); | |
347 | } | |
348 | ||
349 | /* | |
350 | * Map a chunk of memory so that devices can see it. | |
351 | * CPU view of this memory may be inconsistent with | |
352 | * a device view and explicit flushing is necessary. | |
353 | */ | |
ee664a92 FT |
354 | static dma_addr_t sbus_map_page(struct device *dev, struct page *page, |
355 | unsigned long offset, size_t len, | |
356 | enum dma_data_direction dir, | |
357 | struct dma_attrs *attrs) | |
1da177e4 | 358 | { |
c2c07dbd FT |
359 | void *va = page_address(page) + offset; |
360 | ||
efad798b | 361 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
362 | if (len <= 0) { |
363 | return 0; | |
364 | } | |
365 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
366 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
367 | return 0; | |
368 | } | |
260489fa | 369 | return mmu_get_scsi_one(dev, va, len); |
1da177e4 LT |
370 | } |
371 | ||
ee664a92 FT |
372 | static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, |
373 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
1da177e4 | 374 | { |
260489fa | 375 | mmu_release_scsi_one(dev, ba, n); |
1da177e4 LT |
376 | } |
377 | ||
ee664a92 FT |
378 | static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, |
379 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
1da177e4 | 380 | { |
260489fa | 381 | mmu_get_scsi_sgl(dev, sg, n); |
1da177e4 LT |
382 | return n; |
383 | } | |
384 | ||
ee664a92 FT |
385 | static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, |
386 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
1da177e4 | 387 | { |
260489fa | 388 | mmu_release_scsi_sgl(dev, sg, n); |
1da177e4 LT |
389 | } |
390 | ||
ee664a92 FT |
391 | static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
392 | int n, enum dma_data_direction dir) | |
1da177e4 | 393 | { |
ee664a92 | 394 | BUG(); |
1da177e4 LT |
395 | } |
396 | ||
ee664a92 FT |
397 | static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
398 | int n, enum dma_data_direction dir) | |
1da177e4 | 399 | { |
ee664a92 | 400 | BUG(); |
1da177e4 LT |
401 | } |
402 | ||
ee664a92 | 403 | struct dma_map_ops sbus_dma_ops = { |
c416258a AP |
404 | .alloc = sbus_alloc_coherent, |
405 | .free = sbus_free_coherent, | |
ee664a92 FT |
406 | .map_page = sbus_map_page, |
407 | .unmap_page = sbus_unmap_page, | |
408 | .map_sg = sbus_map_sg, | |
409 | .unmap_sg = sbus_unmap_sg, | |
410 | .sync_sg_for_cpu = sbus_sync_sg_for_cpu, | |
411 | .sync_sg_for_device = sbus_sync_sg_for_device, | |
412 | }; | |
413 | ||
f8e4d32c | 414 | static int __init sparc_register_ioport(void) |
576c352e | 415 | { |
576c352e DM |
416 | register_proc_sparc_ioport(); |
417 | ||
576c352e | 418 | return 0; |
576c352e DM |
419 | } |
420 | ||
f8e4d32c DM |
421 | arch_initcall(sparc_register_ioport); |
422 | ||
1da177e4 LT |
423 | #endif /* CONFIG_SBUS */ |
424 | ||
18304746 | 425 | |
1da177e4 LT |
426 | /* Allocate and map kernel buffer using consistent mode DMA for a device. |
427 | * hwdev should be valid struct pci_dev pointer for PCI devices. | |
428 | */ | |
ee664a92 | 429 | static void *pci32_alloc_coherent(struct device *dev, size_t len, |
c416258a AP |
430 | dma_addr_t *pba, gfp_t gfp, |
431 | struct dma_attrs *attrs) | |
1da177e4 | 432 | { |
5c8345bb | 433 | unsigned long len_total = PAGE_ALIGN(len); |
7feee249 | 434 | void *va; |
1da177e4 LT |
435 | struct resource *res; |
436 | int order; | |
437 | ||
438 | if (len == 0) { | |
439 | return NULL; | |
440 | } | |
441 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
442 | return NULL; | |
443 | } | |
444 | ||
445 | order = get_order(len_total); | |
7feee249 KG |
446 | va = (void *) __get_free_pages(GFP_KERNEL, order); |
447 | if (va == NULL) { | |
1da177e4 | 448 | printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT); |
7feee249 | 449 | goto err_nopages; |
1da177e4 LT |
450 | } |
451 | ||
c80892d1 | 452 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) { |
1da177e4 | 453 | printk("pci_alloc_consistent: no core\n"); |
7feee249 | 454 | goto err_nomem; |
1da177e4 | 455 | } |
1da177e4 LT |
456 | |
457 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
458 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
459 | printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total); | |
7feee249 | 460 | goto err_nova; |
1da177e4 | 461 | } |
9701b264 | 462 | srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total); |
1da177e4 LT |
463 | |
464 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ | |
465 | return (void *) res->start; | |
7feee249 KG |
466 | |
467 | err_nova: | |
468 | kfree(res); | |
469 | err_nomem: | |
470 | free_pages((unsigned long)va, order); | |
471 | err_nopages: | |
472 | return NULL; | |
1da177e4 LT |
473 | } |
474 | ||
475 | /* Free and unmap a consistent DMA buffer. | |
476 | * cpu_addr is what was returned from pci_alloc_consistent, | |
477 | * size must be the same as what as passed into pci_alloc_consistent, | |
478 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | |
479 | * | |
d1a78c32 | 480 | * References to the memory and mappings associated with cpu_addr/dma_addr |
1da177e4 LT |
481 | * past this call are illegal. |
482 | */ | |
ee664a92 | 483 | static void pci32_free_coherent(struct device *dev, size_t n, void *p, |
c416258a | 484 | dma_addr_t ba, struct dma_attrs *attrs) |
1da177e4 LT |
485 | { |
486 | struct resource *res; | |
1da177e4 | 487 | |
a0e997c2 | 488 | if ((res = lookup_resource(&_sparc_dvma, |
1da177e4 LT |
489 | (unsigned long)p)) == NULL) { |
490 | printk("pci_free_consistent: cannot free %p\n", p); | |
491 | return; | |
492 | } | |
493 | ||
494 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
495 | printk("pci_free_consistent: unaligned va %p\n", p); | |
496 | return; | |
497 | } | |
498 | ||
5c8345bb | 499 | n = PAGE_ALIGN(n); |
28f65c11 | 500 | if (resource_size(res) != n) { |
1da177e4 | 501 | printk("pci_free_consistent: region 0x%lx asked 0x%lx\n", |
28f65c11 | 502 | (long)resource_size(res), (long)n); |
1da177e4 LT |
503 | return; |
504 | } | |
505 | ||
d81f087f | 506 | dma_make_coherent(ba, n); |
9701b264 | 507 | srmmu_unmapiorange((unsigned long)p, n); |
1da177e4 LT |
508 | |
509 | release_resource(res); | |
510 | kfree(res); | |
d81f087f | 511 | free_pages((unsigned long)phys_to_virt(ba), get_order(n)); |
1da177e4 | 512 | } |
1da177e4 LT |
513 | |
514 | /* | |
515 | * Same as pci_map_single, but with pages. | |
516 | */ | |
ee664a92 FT |
517 | static dma_addr_t pci32_map_page(struct device *dev, struct page *page, |
518 | unsigned long offset, size_t size, | |
519 | enum dma_data_direction dir, | |
520 | struct dma_attrs *attrs) | |
1da177e4 | 521 | { |
1da177e4 LT |
522 | /* IIep is write-through, not flushing. */ |
523 | return page_to_phys(page) + offset; | |
524 | } | |
1da177e4 | 525 | |
b8682cef KG |
526 | static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size, |
527 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
528 | { | |
529 | if (dir != PCI_DMA_TODEVICE) | |
d81f087f | 530 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
b8682cef KG |
531 | } |
532 | ||
1da177e4 LT |
533 | /* Map a set of buffers described by scatterlist in streaming |
534 | * mode for DMA. This is the scather-gather version of the | |
535 | * above pci_map_single interface. Here the scatter gather list | |
536 | * elements are each tagged with the appropriate dma address | |
537 | * and length. They are obtained via sg_dma_{address,length}(SG). | |
538 | * | |
539 | * NOTE: An implementation may be able to use a smaller number of | |
540 | * DMA address/length pairs than there are SG table elements. | |
541 | * (for example via virtual mapping capabilities) | |
542 | * The routine returns the number of addr/length pairs actually | |
543 | * used, at most nents. | |
544 | * | |
545 | * Device ownership issues as mentioned above for pci_map_single are | |
546 | * the same here. | |
547 | */ | |
ee664a92 FT |
548 | static int pci32_map_sg(struct device *device, struct scatterlist *sgl, |
549 | int nents, enum dma_data_direction dir, | |
550 | struct dma_attrs *attrs) | |
1da177e4 | 551 | { |
0912a5db | 552 | struct scatterlist *sg; |
1da177e4 LT |
553 | int n; |
554 | ||
1da177e4 | 555 | /* IIep is write-through, not flushing. */ |
0912a5db | 556 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 557 | sg->dma_address = sg_phys(sg); |
aa83a26a | 558 | sg->dma_length = sg->length; |
1da177e4 LT |
559 | } |
560 | return nents; | |
561 | } | |
562 | ||
563 | /* Unmap a set of streaming mode DMA translations. | |
564 | * Again, cpu read rules concerning calls here are the same as for | |
565 | * pci_unmap_single() above. | |
566 | */ | |
ee664a92 FT |
567 | static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl, |
568 | int nents, enum dma_data_direction dir, | |
569 | struct dma_attrs *attrs) | |
1da177e4 | 570 | { |
0912a5db | 571 | struct scatterlist *sg; |
1da177e4 LT |
572 | int n; |
573 | ||
ee664a92 | 574 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 575 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 576 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
577 | } |
578 | } | |
579 | } | |
580 | ||
581 | /* Make physical memory consistent for a single | |
582 | * streaming mode DMA translation before or after a transfer. | |
583 | * | |
584 | * If you perform a pci_map_single() but wish to interrogate the | |
585 | * buffer using the cpu, yet do not wish to teardown the PCI dma | |
586 | * mapping, you must call this function before doing so. At the | |
587 | * next point you give the PCI dma address back to the card, you | |
588 | * must first perform a pci_dma_sync_for_device, and then the | |
589 | * device again owns the buffer. | |
590 | */ | |
ee664a92 FT |
591 | static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba, |
592 | size_t size, enum dma_data_direction dir) | |
1da177e4 | 593 | { |
ee664a92 | 594 | if (dir != PCI_DMA_TODEVICE) { |
d81f087f | 595 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
1da177e4 LT |
596 | } |
597 | } | |
598 | ||
ee664a92 FT |
599 | static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba, |
600 | size_t size, enum dma_data_direction dir) | |
1da177e4 | 601 | { |
ee664a92 | 602 | if (dir != PCI_DMA_TODEVICE) { |
d81f087f | 603 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
1da177e4 LT |
604 | } |
605 | } | |
606 | ||
607 | /* Make physical memory consistent for a set of streaming | |
608 | * mode DMA translations after a transfer. | |
609 | * | |
610 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | |
611 | * same rules and usage. | |
612 | */ | |
ee664a92 FT |
613 | static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, |
614 | int nents, enum dma_data_direction dir) | |
1da177e4 | 615 | { |
0912a5db | 616 | struct scatterlist *sg; |
1da177e4 LT |
617 | int n; |
618 | ||
ee664a92 | 619 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 620 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 621 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
622 | } |
623 | } | |
624 | } | |
625 | ||
ee664a92 FT |
626 | static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl, |
627 | int nents, enum dma_data_direction dir) | |
1da177e4 | 628 | { |
0912a5db | 629 | struct scatterlist *sg; |
1da177e4 LT |
630 | int n; |
631 | ||
ee664a92 | 632 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 633 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 634 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
635 | } |
636 | } | |
637 | } | |
ee664a92 FT |
638 | |
639 | struct dma_map_ops pci32_dma_ops = { | |
c416258a AP |
640 | .alloc = pci32_alloc_coherent, |
641 | .free = pci32_free_coherent, | |
ee664a92 | 642 | .map_page = pci32_map_page, |
b8682cef | 643 | .unmap_page = pci32_unmap_page, |
ee664a92 FT |
644 | .map_sg = pci32_map_sg, |
645 | .unmap_sg = pci32_unmap_sg, | |
646 | .sync_single_for_cpu = pci32_sync_single_for_cpu, | |
647 | .sync_single_for_device = pci32_sync_single_for_device, | |
648 | .sync_sg_for_cpu = pci32_sync_sg_for_cpu, | |
649 | .sync_sg_for_device = pci32_sync_sg_for_device, | |
650 | }; | |
651 | EXPORT_SYMBOL(pci32_dma_ops); | |
652 | ||
87e677c4 SR |
653 | /* leon re-uses pci32_dma_ops */ |
654 | struct dma_map_ops *leon_dma_ops = &pci32_dma_ops; | |
d4511e69 | 655 | EXPORT_SYMBOL(leon_dma_ops); |
18304746 | 656 | |
d4511e69 | 657 | struct dma_map_ops *dma_ops = &sbus_dma_ops; |
18304746 KG |
658 | EXPORT_SYMBOL(dma_ops); |
659 | ||
1da177e4 | 660 | |
451d7400 FT |
661 | /* |
662 | * Return whether the given PCI device DMA address mask can be | |
663 | * supported properly. For example, if your device can only drive the | |
664 | * low 24-bits during PCI bus mastering, then you would pass | |
665 | * 0x00ffffff as the mask to this function. | |
666 | */ | |
667 | int dma_supported(struct device *dev, u64 mask) | |
668 | { | |
bf70053c | 669 | if (dev_is_pci(dev)) |
451d7400 | 670 | return 1; |
bf70053c | 671 | |
451d7400 FT |
672 | return 0; |
673 | } | |
674 | EXPORT_SYMBOL(dma_supported); | |
675 | ||
1da177e4 LT |
676 | #ifdef CONFIG_PROC_FS |
677 | ||
e7a088f9 | 678 | static int sparc_io_proc_show(struct seq_file *m, void *v) |
1da177e4 | 679 | { |
e7a088f9 | 680 | struct resource *root = m->private, *r; |
1da177e4 LT |
681 | const char *nm; |
682 | ||
e7a088f9 | 683 | for (r = root->child; r != NULL; r = r->sibling) { |
1da177e4 | 684 | if ((nm = r->name) == 0) nm = "???"; |
e7a088f9 | 685 | seq_printf(m, "%016llx-%016llx: %s\n", |
685143ac GKH |
686 | (unsigned long long)r->start, |
687 | (unsigned long long)r->end, nm); | |
1da177e4 LT |
688 | } |
689 | ||
e7a088f9 | 690 | return 0; |
1da177e4 LT |
691 | } |
692 | ||
e7a088f9 AD |
693 | static int sparc_io_proc_open(struct inode *inode, struct file *file) |
694 | { | |
d9dda78b | 695 | return single_open(file, sparc_io_proc_show, PDE_DATA(inode)); |
e7a088f9 AD |
696 | } |
697 | ||
698 | static const struct file_operations sparc_io_proc_fops = { | |
699 | .owner = THIS_MODULE, | |
700 | .open = sparc_io_proc_open, | |
701 | .read = seq_read, | |
702 | .llseek = seq_lseek, | |
703 | .release = single_release, | |
704 | }; | |
1da177e4 LT |
705 | #endif /* CONFIG_PROC_FS */ |
706 | ||
c61c65cd | 707 | static void register_proc_sparc_ioport(void) |
1da177e4 LT |
708 | { |
709 | #ifdef CONFIG_PROC_FS | |
e7a088f9 AD |
710 | proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap); |
711 | proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma); | |
1da177e4 LT |
712 | #endif |
713 | } |