Commit | Line | Data |
---|---|---|
88278ca2 | 1 | /* |
1da177e4 LT |
2 | * ioport.c: Simple io mapping allocator. |
3 | * | |
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | |
5 | * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
6 | * | |
7 | * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev. | |
8 | * | |
9 | * 2000/01/29 | |
10 | * <rth> zait: as long as pci_alloc_consistent produces something addressable, | |
11 | * things are ok. | |
12 | * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a | |
13 | * pointer into the big page mapping | |
14 | * <rth> zait: so what? | |
15 | * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page())) | |
16 | * <zaitcev> Hmm | |
17 | * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())). | |
18 | * So far so good. | |
19 | * <zaitcev> Now, driver calls pci_free_consistent(with result of | |
20 | * remap_it_my_way()). | |
21 | * <zaitcev> How do you find the address to pass to free_pages()? | |
22 | * <rth> zait: walk the page tables? It's only two or three level after all. | |
23 | * <rth> zait: you have to walk them anyway to remove the mapping. | |
24 | * <zaitcev> Hmm | |
25 | * <zaitcev> Sounds reasonable | |
26 | */ | |
27 | ||
3ca9fab4 | 28 | #include <linux/module.h> |
1da177e4 LT |
29 | #include <linux/sched.h> |
30 | #include <linux/kernel.h> | |
31 | #include <linux/errno.h> | |
32 | #include <linux/types.h> | |
33 | #include <linux/ioport.h> | |
34 | #include <linux/mm.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/pci.h> /* struct pci_dev */ | |
37 | #include <linux/proc_fs.h> | |
0912a5db | 38 | #include <linux/scatterlist.h> |
764f2579 | 39 | #include <linux/of_device.h> |
1da177e4 LT |
40 | |
41 | #include <asm/io.h> | |
42 | #include <asm/vaddrs.h> | |
43 | #include <asm/oplib.h> | |
576c352e DM |
44 | #include <asm/prom.h> |
45 | #include <asm/sbus.h> | |
1da177e4 LT |
46 | #include <asm/page.h> |
47 | #include <asm/pgalloc.h> | |
48 | #include <asm/dma.h> | |
e0039348 DM |
49 | #include <asm/iommu.h> |
50 | #include <asm/io-unit.h> | |
1da177e4 | 51 | |
944c67df DM |
52 | #include "dma.h" |
53 | ||
1da177e4 LT |
54 | #define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */ |
55 | ||
c61c65cd AB |
56 | static struct resource *_sparc_find_resource(struct resource *r, |
57 | unsigned long); | |
1da177e4 LT |
58 | |
59 | static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz); | |
60 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
61 | unsigned long size, char *name); | |
62 | static void _sparc_free_io(struct resource *res); | |
63 | ||
c61c65cd AB |
64 | static void register_proc_sparc_ioport(void); |
65 | ||
1da177e4 LT |
66 | /* This points to the next to use virtual memory for DVMA mappings */ |
67 | static struct resource _sparc_dvma = { | |
68 | .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1 | |
69 | }; | |
70 | /* This points to the start of I/O mappings, cluable from outside. */ | |
71 | /*ext*/ struct resource sparc_iomap = { | |
72 | .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1 | |
73 | }; | |
74 | ||
75 | /* | |
76 | * Our mini-allocator... | |
77 | * Boy this is gross! We need it because we must map I/O for | |
78 | * timers and interrupt controller before the kmalloc is available. | |
79 | */ | |
80 | ||
81 | #define XNMLN 15 | |
82 | #define XNRES 10 /* SS-10 uses 8 */ | |
83 | ||
84 | struct xresource { | |
85 | struct resource xres; /* Must be first */ | |
86 | int xflag; /* 1 == used */ | |
87 | char xname[XNMLN+1]; | |
88 | }; | |
89 | ||
90 | static struct xresource xresv[XNRES]; | |
91 | ||
92 | static struct xresource *xres_alloc(void) { | |
93 | struct xresource *xrp; | |
94 | int n; | |
95 | ||
96 | xrp = xresv; | |
97 | for (n = 0; n < XNRES; n++) { | |
98 | if (xrp->xflag == 0) { | |
99 | xrp->xflag = 1; | |
100 | return xrp; | |
101 | } | |
102 | xrp++; | |
103 | } | |
104 | return NULL; | |
105 | } | |
106 | ||
107 | static void xres_free(struct xresource *xrp) { | |
108 | xrp->xflag = 0; | |
109 | } | |
110 | ||
111 | /* | |
112 | * These are typically used in PCI drivers | |
113 | * which are trying to be cross-platform. | |
114 | * | |
115 | * Bus type is always zero on IIep. | |
116 | */ | |
117 | void __iomem *ioremap(unsigned long offset, unsigned long size) | |
118 | { | |
119 | char name[14]; | |
120 | ||
121 | sprintf(name, "phys_%08x", (u32)offset); | |
122 | return _sparc_alloc_io(0, offset, size, name); | |
123 | } | |
124 | ||
125 | /* | |
126 | * Comlimentary to ioremap(). | |
127 | */ | |
128 | void iounmap(volatile void __iomem *virtual) | |
129 | { | |
130 | unsigned long vaddr = (unsigned long) virtual & PAGE_MASK; | |
131 | struct resource *res; | |
132 | ||
133 | if ((res = _sparc_find_resource(&sparc_iomap, vaddr)) == NULL) { | |
134 | printk("free_io/iounmap: cannot free %lx\n", vaddr); | |
135 | return; | |
136 | } | |
137 | _sparc_free_io(res); | |
138 | ||
139 | if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) { | |
140 | xres_free((struct xresource *)res); | |
141 | } else { | |
142 | kfree(res); | |
143 | } | |
144 | } | |
145 | ||
146 | /* | |
147 | */ | |
148 | void __iomem *sbus_ioremap(struct resource *phyres, unsigned long offset, | |
149 | unsigned long size, char *name) | |
150 | { | |
151 | return _sparc_alloc_io(phyres->flags & 0xF, | |
152 | phyres->start + offset, size, name); | |
153 | } | |
154 | ||
3ca9fab4 DM |
155 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, |
156 | unsigned long size, char *name) | |
157 | { | |
158 | return _sparc_alloc_io(res->flags & 0xF, | |
159 | res->start + offset, | |
160 | size, name); | |
161 | } | |
162 | EXPORT_SYMBOL(of_ioremap); | |
163 | ||
e3a411a3 | 164 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 DM |
165 | { |
166 | iounmap(base); | |
167 | } | |
168 | EXPORT_SYMBOL(of_iounmap); | |
169 | ||
1da177e4 LT |
170 | /* |
171 | */ | |
172 | void sbus_iounmap(volatile void __iomem *addr, unsigned long size) | |
173 | { | |
174 | iounmap(addr); | |
175 | } | |
176 | ||
177 | /* | |
178 | * Meat of mapping | |
179 | */ | |
180 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
181 | unsigned long size, char *name) | |
182 | { | |
183 | static int printed_full; | |
184 | struct xresource *xres; | |
185 | struct resource *res; | |
186 | char *tack; | |
187 | int tlen; | |
188 | void __iomem *va; /* P3 diag */ | |
189 | ||
190 | if (name == NULL) name = "???"; | |
191 | ||
192 | if ((xres = xres_alloc()) != 0) { | |
193 | tack = xres->xname; | |
194 | res = &xres->xres; | |
195 | } else { | |
196 | if (!printed_full) { | |
197 | printk("ioremap: done with statics, switching to malloc\n"); | |
198 | printed_full = 1; | |
199 | } | |
200 | tlen = strlen(name); | |
201 | tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL); | |
202 | if (tack == NULL) return NULL; | |
203 | memset(tack, 0, sizeof(struct resource)); | |
204 | res = (struct resource *) tack; | |
205 | tack += sizeof (struct resource); | |
206 | } | |
207 | ||
208 | strlcpy(tack, name, XNMLN+1); | |
209 | res->name = tack; | |
210 | ||
211 | va = _sparc_ioremap(res, busno, phys, size); | |
212 | /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */ | |
213 | return va; | |
214 | } | |
215 | ||
216 | /* | |
217 | */ | |
218 | static void __iomem * | |
219 | _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz) | |
220 | { | |
221 | unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK); | |
222 | ||
223 | if (allocate_resource(&sparc_iomap, res, | |
224 | (offset + sz + PAGE_SIZE-1) & PAGE_MASK, | |
225 | sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) { | |
226 | /* Usually we cannot see printks in this case. */ | |
227 | prom_printf("alloc_io_res(%s): cannot occupy\n", | |
228 | (res->name != NULL)? res->name: "???"); | |
229 | prom_halt(); | |
230 | } | |
231 | ||
232 | pa &= PAGE_MASK; | |
233 | sparc_mapiorange(bus, pa, res->start, res->end - res->start + 1); | |
234 | ||
d75fc8bb | 235 | return (void __iomem *)(unsigned long)(res->start + offset); |
1da177e4 LT |
236 | } |
237 | ||
238 | /* | |
239 | * Comlimentary to _sparc_ioremap(). | |
240 | */ | |
241 | static void _sparc_free_io(struct resource *res) | |
242 | { | |
243 | unsigned long plen; | |
244 | ||
245 | plen = res->end - res->start + 1; | |
30d4d1ff | 246 | BUG_ON((plen & (PAGE_SIZE-1)) != 0); |
1da177e4 LT |
247 | sparc_unmapiorange(res->start, plen); |
248 | release_resource(res); | |
249 | } | |
250 | ||
251 | #ifdef CONFIG_SBUS | |
252 | ||
63237eeb | 253 | void sbus_set_sbus64(struct device *dev, int x) |
8fae097d | 254 | { |
1da177e4 LT |
255 | printk("sbus_set_sbus64: unsupported\n"); |
256 | } | |
257 | ||
8fae097d DM |
258 | extern unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq); |
259 | void __init sbus_fill_device_irq(struct sbus_dev *sdev) | |
260 | { | |
261 | struct linux_prom_irqs irqs[PROMINTR_MAX]; | |
262 | int len; | |
263 | ||
264 | len = prom_getproperty(sdev->prom_node, "intr", | |
265 | (char *)irqs, sizeof(irqs)); | |
266 | if (len != -1) { | |
267 | sdev->num_irqs = len / 8; | |
268 | if (sdev->num_irqs == 0) { | |
269 | sdev->irqs[0] = 0; | |
270 | } else if (sparc_cpu_model == sun4d) { | |
271 | for (len = 0; len < sdev->num_irqs; len++) | |
272 | sdev->irqs[len] = | |
273 | sun4d_build_irq(sdev, irqs[len].pri); | |
274 | } else { | |
275 | for (len = 0; len < sdev->num_irqs; len++) | |
276 | sdev->irqs[len] = irqs[len].pri; | |
277 | } | |
278 | } else { | |
279 | int interrupts[PROMINTR_MAX]; | |
280 | ||
281 | /* No "intr" node found-- check for "interrupts" node. | |
282 | * This node contains SBus interrupt levels, not IPLs | |
283 | * as in "intr", and no vector values. We convert | |
284 | * SBus interrupt levels to PILs (platform specific). | |
285 | */ | |
286 | len = prom_getproperty(sdev->prom_node, "interrupts", | |
287 | (char *)interrupts, sizeof(interrupts)); | |
288 | if (len == -1) { | |
289 | sdev->irqs[0] = 0; | |
290 | sdev->num_irqs = 0; | |
291 | } else { | |
292 | sdev->num_irqs = len / sizeof(int); | |
293 | for (len = 0; len < sdev->num_irqs; len++) { | |
294 | sdev->irqs[len] = | |
295 | sbint_to_irq(sdev, interrupts[len]); | |
296 | } | |
297 | } | |
298 | } | |
299 | } | |
300 | ||
1da177e4 LT |
301 | /* |
302 | * Allocate a chunk of memory suitable for DMA. | |
303 | * Typically devices use them for control blocks. | |
304 | * CPU may access them without any explicit flushing. | |
1da177e4 | 305 | */ |
7a715f46 | 306 | void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp) |
1da177e4 | 307 | { |
7a715f46 | 308 | struct of_device *op = to_of_device(dev); |
1da177e4 LT |
309 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; |
310 | unsigned long va; | |
311 | struct resource *res; | |
312 | int order; | |
313 | ||
efad798b | 314 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
315 | if (len <= 0) { |
316 | return NULL; | |
317 | } | |
318 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
319 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
320 | return NULL; | |
321 | } | |
322 | ||
323 | order = get_order(len_total); | |
f3d48f03 | 324 | if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0) |
1da177e4 LT |
325 | goto err_nopages; |
326 | ||
c80892d1 | 327 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) |
1da177e4 | 328 | goto err_nomem; |
1da177e4 LT |
329 | |
330 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
331 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
332 | printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total); | |
333 | goto err_nova; | |
334 | } | |
335 | mmu_inval_dma_area(va, len_total); | |
336 | // XXX The mmu_map_dma_area does this for us below, see comments. | |
337 | // sparc_mapiorange(0, virt_to_phys(va), res->start, len_total); | |
338 | /* | |
339 | * XXX That's where sdev would be used. Currently we load | |
340 | * all iommu tables with the same translations. | |
341 | */ | |
342 | if (mmu_map_dma_area(dma_addrp, va, res->start, len_total) != 0) | |
343 | goto err_noiommu; | |
344 | ||
7a715f46 | 345 | res->name = op->node->name; |
4cfbd7eb | 346 | |
d75fc8bb | 347 | return (void *)(unsigned long)res->start; |
1da177e4 LT |
348 | |
349 | err_noiommu: | |
350 | release_resource(res); | |
351 | err_nova: | |
352 | free_pages(va, order); | |
353 | err_nomem: | |
354 | kfree(res); | |
355 | err_nopages: | |
356 | return NULL; | |
357 | } | |
358 | ||
7a715f46 | 359 | void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba) |
1da177e4 LT |
360 | { |
361 | struct resource *res; | |
362 | struct page *pgv; | |
363 | ||
364 | if ((res = _sparc_find_resource(&_sparc_dvma, | |
365 | (unsigned long)p)) == NULL) { | |
366 | printk("sbus_free_consistent: cannot free %p\n", p); | |
367 | return; | |
368 | } | |
369 | ||
370 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
371 | printk("sbus_free_consistent: unaligned va %p\n", p); | |
372 | return; | |
373 | } | |
374 | ||
375 | n = (n + PAGE_SIZE-1) & PAGE_MASK; | |
376 | if ((res->end-res->start)+1 != n) { | |
377 | printk("sbus_free_consistent: region 0x%lx asked 0x%lx\n", | |
378 | (long)((res->end-res->start)+1), n); | |
379 | return; | |
380 | } | |
381 | ||
382 | release_resource(res); | |
383 | kfree(res); | |
384 | ||
385 | /* mmu_inval_dma_area(va, n); */ /* it's consistent, isn't it */ | |
aba945e7 | 386 | pgv = virt_to_page(p); |
1da177e4 LT |
387 | mmu_unmap_dma_area(ba, n); |
388 | ||
389 | __free_pages(pgv, get_order(n)); | |
390 | } | |
391 | ||
392 | /* | |
393 | * Map a chunk of memory so that devices can see it. | |
394 | * CPU view of this memory may be inconsistent with | |
395 | * a device view and explicit flushing is necessary. | |
396 | */ | |
7a715f46 | 397 | dma_addr_t sbus_map_single(struct device *dev, void *va, size_t len, int direction) |
1da177e4 | 398 | { |
efad798b | 399 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
400 | if (len <= 0) { |
401 | return 0; | |
402 | } | |
403 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
404 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
405 | return 0; | |
406 | } | |
260489fa | 407 | return mmu_get_scsi_one(dev, va, len); |
1da177e4 LT |
408 | } |
409 | ||
7a715f46 | 410 | void sbus_unmap_single(struct device *dev, dma_addr_t ba, size_t n, int direction) |
1da177e4 | 411 | { |
260489fa | 412 | mmu_release_scsi_one(dev, ba, n); |
1da177e4 LT |
413 | } |
414 | ||
7a715f46 | 415 | int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction) |
1da177e4 | 416 | { |
260489fa | 417 | mmu_get_scsi_sgl(dev, sg, n); |
1da177e4 LT |
418 | |
419 | /* | |
420 | * XXX sparc64 can return a partial length here. sun4c should do this | |
421 | * but it currently panics if it can't fulfill the request - Anton | |
422 | */ | |
423 | return n; | |
424 | } | |
425 | ||
7a715f46 | 426 | void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, int direction) |
1da177e4 | 427 | { |
260489fa | 428 | mmu_release_scsi_sgl(dev, sg, n); |
1da177e4 LT |
429 | } |
430 | ||
7a715f46 | 431 | void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba, size_t size, int direction) |
1da177e4 | 432 | { |
1da177e4 LT |
433 | } |
434 | ||
7a715f46 | 435 | void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba, size_t size, int direction) |
1da177e4 | 436 | { |
1da177e4 LT |
437 | } |
438 | ||
576c352e DM |
439 | /* Support code for sbus_init(). */ |
440 | /* | |
441 | * XXX This functions appears to be a distorted version of | |
442 | * prom_sbus_ranges_init(), with all sun4d stuff cut away. | |
443 | * Ask DaveM what is going on here, how is sun4d supposed to work... XXX | |
444 | */ | |
445 | /* added back sun4d patch from Thomas Bogendoerfer - should be OK (crn) */ | |
446 | void __init sbus_arch_bus_ranges_init(struct device_node *pn, struct sbus_bus *sbus) | |
447 | { | |
448 | int parent_node = pn->node; | |
449 | ||
450 | if (sparc_cpu_model == sun4d) { | |
451 | struct linux_prom_ranges iounit_ranges[PROMREG_MAX]; | |
452 | int num_iounit_ranges, len; | |
453 | ||
454 | len = prom_getproperty(parent_node, "ranges", | |
455 | (char *) iounit_ranges, | |
456 | sizeof (iounit_ranges)); | |
457 | if (len != -1) { | |
458 | num_iounit_ranges = | |
459 | (len / sizeof(struct linux_prom_ranges)); | |
460 | prom_adjust_ranges(sbus->sbus_ranges, | |
461 | sbus->num_sbus_ranges, | |
462 | iounit_ranges, num_iounit_ranges); | |
463 | } | |
464 | } | |
465 | } | |
466 | ||
467 | void __init sbus_setup_iommu(struct sbus_bus *sbus, struct device_node *dp) | |
468 | { | |
5932ef07 | 469 | #ifndef CONFIG_SUN4 |
576c352e DM |
470 | struct device_node *parent = dp->parent; |
471 | ||
472 | if (sparc_cpu_model != sun4d && | |
473 | parent != NULL && | |
e0039348 DM |
474 | !strcmp(parent->name, "iommu")) |
475 | iommu_init(parent, sbus); | |
576c352e | 476 | |
e0039348 DM |
477 | if (sparc_cpu_model == sun4d) |
478 | iounit_init(sbus); | |
5932ef07 | 479 | #endif |
576c352e DM |
480 | } |
481 | ||
482 | void __init sbus_setup_arch_props(struct sbus_bus *sbus, struct device_node *dp) | |
483 | { | |
484 | if (sparc_cpu_model == sun4d) { | |
485 | struct device_node *parent = dp->parent; | |
486 | ||
487 | sbus->devid = of_getintprop_default(parent, "device-id", 0); | |
488 | sbus->board = of_getintprop_default(parent, "board#", 0); | |
489 | } | |
490 | } | |
491 | ||
492 | int __init sbus_arch_preinit(void) | |
493 | { | |
576c352e DM |
494 | register_proc_sparc_ioport(); |
495 | ||
496 | #ifdef CONFIG_SUN4 | |
497 | { | |
498 | extern void sun4_dvma_init(void); | |
499 | sun4_dvma_init(); | |
500 | } | |
501 | return 1; | |
502 | #else | |
503 | return 0; | |
504 | #endif | |
505 | } | |
506 | ||
507 | void __init sbus_arch_postinit(void) | |
508 | { | |
509 | if (sparc_cpu_model == sun4d) { | |
510 | extern void sun4d_init_sbi_irq(void); | |
511 | sun4d_init_sbi_irq(); | |
512 | } | |
513 | } | |
1da177e4 LT |
514 | #endif /* CONFIG_SBUS */ |
515 | ||
516 | #ifdef CONFIG_PCI | |
517 | ||
518 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | |
519 | * hwdev should be valid struct pci_dev pointer for PCI devices. | |
520 | */ | |
521 | void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba) | |
522 | { | |
523 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; | |
524 | unsigned long va; | |
525 | struct resource *res; | |
526 | int order; | |
527 | ||
528 | if (len == 0) { | |
529 | return NULL; | |
530 | } | |
531 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
532 | return NULL; | |
533 | } | |
534 | ||
535 | order = get_order(len_total); | |
536 | va = __get_free_pages(GFP_KERNEL, order); | |
537 | if (va == 0) { | |
538 | printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT); | |
539 | return NULL; | |
540 | } | |
541 | ||
c80892d1 | 542 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) { |
1da177e4 LT |
543 | free_pages(va, order); |
544 | printk("pci_alloc_consistent: no core\n"); | |
545 | return NULL; | |
546 | } | |
1da177e4 LT |
547 | |
548 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
549 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
550 | printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total); | |
551 | free_pages(va, order); | |
552 | kfree(res); | |
553 | return NULL; | |
554 | } | |
555 | mmu_inval_dma_area(va, len_total); | |
556 | #if 0 | |
557 | /* P3 */ printk("pci_alloc_consistent: kva %lx uncva %lx phys %lx size %lx\n", | |
558 | (long)va, (long)res->start, (long)virt_to_phys(va), len_total); | |
559 | #endif | |
560 | sparc_mapiorange(0, virt_to_phys(va), res->start, len_total); | |
561 | ||
562 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ | |
563 | return (void *) res->start; | |
564 | } | |
565 | ||
566 | /* Free and unmap a consistent DMA buffer. | |
567 | * cpu_addr is what was returned from pci_alloc_consistent, | |
568 | * size must be the same as what as passed into pci_alloc_consistent, | |
569 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | |
570 | * | |
d1a78c32 | 571 | * References to the memory and mappings associated with cpu_addr/dma_addr |
1da177e4 LT |
572 | * past this call are illegal. |
573 | */ | |
574 | void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba) | |
575 | { | |
576 | struct resource *res; | |
577 | unsigned long pgp; | |
578 | ||
579 | if ((res = _sparc_find_resource(&_sparc_dvma, | |
580 | (unsigned long)p)) == NULL) { | |
581 | printk("pci_free_consistent: cannot free %p\n", p); | |
582 | return; | |
583 | } | |
584 | ||
585 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
586 | printk("pci_free_consistent: unaligned va %p\n", p); | |
587 | return; | |
588 | } | |
589 | ||
590 | n = (n + PAGE_SIZE-1) & PAGE_MASK; | |
591 | if ((res->end-res->start)+1 != n) { | |
592 | printk("pci_free_consistent: region 0x%lx asked 0x%lx\n", | |
593 | (long)((res->end-res->start)+1), (long)n); | |
594 | return; | |
595 | } | |
596 | ||
597 | pgp = (unsigned long) phys_to_virt(ba); /* bus_to_virt actually */ | |
598 | mmu_inval_dma_area(pgp, n); | |
599 | sparc_unmapiorange((unsigned long)p, n); | |
600 | ||
601 | release_resource(res); | |
602 | kfree(res); | |
603 | ||
604 | free_pages(pgp, get_order(n)); | |
605 | } | |
606 | ||
607 | /* Map a single buffer of the indicated size for DMA in streaming mode. | |
608 | * The 32-bit bus address to use is returned. | |
609 | * | |
610 | * Once the device is given the dma address, the device owns this memory | |
611 | * until either pci_unmap_single or pci_dma_sync_single_* is performed. | |
612 | */ | |
613 | dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, | |
614 | int direction) | |
615 | { | |
30d4d1ff | 616 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
617 | /* IIep is write-through, not flushing. */ |
618 | return virt_to_phys(ptr); | |
619 | } | |
620 | ||
621 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | |
622 | * must match what was provided for in a previous pci_map_single call. All | |
623 | * other usages are undefined. | |
624 | * | |
625 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
626 | * whatever the device wrote there. | |
627 | */ | |
628 | void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t ba, size_t size, | |
629 | int direction) | |
630 | { | |
30d4d1ff | 631 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
632 | if (direction != PCI_DMA_TODEVICE) { |
633 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | |
634 | (size + PAGE_SIZE-1) & PAGE_MASK); | |
635 | } | |
636 | } | |
637 | ||
638 | /* | |
639 | * Same as pci_map_single, but with pages. | |
640 | */ | |
641 | dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, | |
642 | unsigned long offset, size_t size, int direction) | |
643 | { | |
30d4d1ff | 644 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
645 | /* IIep is write-through, not flushing. */ |
646 | return page_to_phys(page) + offset; | |
647 | } | |
648 | ||
649 | void pci_unmap_page(struct pci_dev *hwdev, | |
650 | dma_addr_t dma_address, size_t size, int direction) | |
651 | { | |
30d4d1ff | 652 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
653 | /* mmu_inval_dma_area XXX */ |
654 | } | |
655 | ||
656 | /* Map a set of buffers described by scatterlist in streaming | |
657 | * mode for DMA. This is the scather-gather version of the | |
658 | * above pci_map_single interface. Here the scatter gather list | |
659 | * elements are each tagged with the appropriate dma address | |
660 | * and length. They are obtained via sg_dma_{address,length}(SG). | |
661 | * | |
662 | * NOTE: An implementation may be able to use a smaller number of | |
663 | * DMA address/length pairs than there are SG table elements. | |
664 | * (for example via virtual mapping capabilities) | |
665 | * The routine returns the number of addr/length pairs actually | |
666 | * used, at most nents. | |
667 | * | |
668 | * Device ownership issues as mentioned above for pci_map_single are | |
669 | * the same here. | |
670 | */ | |
0912a5db | 671 | int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, |
1da177e4 LT |
672 | int direction) |
673 | { | |
0912a5db | 674 | struct scatterlist *sg; |
1da177e4 LT |
675 | int n; |
676 | ||
30d4d1ff | 677 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 678 | /* IIep is write-through, not flushing. */ |
0912a5db | 679 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 JA |
680 | BUG_ON(page_address(sg_page(sg)) == NULL); |
681 | sg->dvma_address = virt_to_phys(sg_virt(sg)); | |
1da177e4 | 682 | sg->dvma_length = sg->length; |
1da177e4 LT |
683 | } |
684 | return nents; | |
685 | } | |
686 | ||
687 | /* Unmap a set of streaming mode DMA translations. | |
688 | * Again, cpu read rules concerning calls here are the same as for | |
689 | * pci_unmap_single() above. | |
690 | */ | |
0912a5db | 691 | void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, |
1da177e4 LT |
692 | int direction) |
693 | { | |
0912a5db | 694 | struct scatterlist *sg; |
1da177e4 LT |
695 | int n; |
696 | ||
30d4d1ff | 697 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 698 | if (direction != PCI_DMA_TODEVICE) { |
0912a5db | 699 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 | 700 | BUG_ON(page_address(sg_page(sg)) == NULL); |
1da177e4 | 701 | mmu_inval_dma_area( |
58b053e4 | 702 | (unsigned long) page_address(sg_page(sg)), |
1da177e4 | 703 | (sg->length + PAGE_SIZE-1) & PAGE_MASK); |
1da177e4 LT |
704 | } |
705 | } | |
706 | } | |
707 | ||
708 | /* Make physical memory consistent for a single | |
709 | * streaming mode DMA translation before or after a transfer. | |
710 | * | |
711 | * If you perform a pci_map_single() but wish to interrogate the | |
712 | * buffer using the cpu, yet do not wish to teardown the PCI dma | |
713 | * mapping, you must call this function before doing so. At the | |
714 | * next point you give the PCI dma address back to the card, you | |
715 | * must first perform a pci_dma_sync_for_device, and then the | |
716 | * device again owns the buffer. | |
717 | */ | |
718 | void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | |
719 | { | |
30d4d1ff | 720 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
721 | if (direction != PCI_DMA_TODEVICE) { |
722 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | |
723 | (size + PAGE_SIZE-1) & PAGE_MASK); | |
724 | } | |
725 | } | |
726 | ||
727 | void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | |
728 | { | |
30d4d1ff | 729 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 LT |
730 | if (direction != PCI_DMA_TODEVICE) { |
731 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | |
732 | (size + PAGE_SIZE-1) & PAGE_MASK); | |
733 | } | |
734 | } | |
735 | ||
736 | /* Make physical memory consistent for a set of streaming | |
737 | * mode DMA translations after a transfer. | |
738 | * | |
739 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | |
740 | * same rules and usage. | |
741 | */ | |
0912a5db | 742 | void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) |
1da177e4 | 743 | { |
0912a5db | 744 | struct scatterlist *sg; |
1da177e4 LT |
745 | int n; |
746 | ||
30d4d1ff | 747 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 748 | if (direction != PCI_DMA_TODEVICE) { |
0912a5db | 749 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 | 750 | BUG_ON(page_address(sg_page(sg)) == NULL); |
1da177e4 | 751 | mmu_inval_dma_area( |
58b053e4 | 752 | (unsigned long) page_address(sg_page(sg)), |
1da177e4 | 753 | (sg->length + PAGE_SIZE-1) & PAGE_MASK); |
1da177e4 LT |
754 | } |
755 | } | |
756 | } | |
757 | ||
0912a5db | 758 | void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) |
1da177e4 | 759 | { |
0912a5db | 760 | struct scatterlist *sg; |
1da177e4 LT |
761 | int n; |
762 | ||
30d4d1ff | 763 | BUG_ON(direction == PCI_DMA_NONE); |
1da177e4 | 764 | if (direction != PCI_DMA_TODEVICE) { |
0912a5db | 765 | for_each_sg(sgl, sg, nents, n) { |
58b053e4 | 766 | BUG_ON(page_address(sg_page(sg)) == NULL); |
1da177e4 | 767 | mmu_inval_dma_area( |
58b053e4 | 768 | (unsigned long) page_address(sg_page(sg)), |
1da177e4 | 769 | (sg->length + PAGE_SIZE-1) & PAGE_MASK); |
1da177e4 LT |
770 | } |
771 | } | |
772 | } | |
773 | #endif /* CONFIG_PCI */ | |
774 | ||
775 | #ifdef CONFIG_PROC_FS | |
776 | ||
777 | static int | |
778 | _sparc_io_get_info(char *buf, char **start, off_t fpos, int length, int *eof, | |
779 | void *data) | |
780 | { | |
781 | char *p = buf, *e = buf + length; | |
782 | struct resource *r; | |
783 | const char *nm; | |
784 | ||
785 | for (r = ((struct resource *)data)->child; r != NULL; r = r->sibling) { | |
786 | if (p + 32 >= e) /* Better than nothing */ | |
787 | break; | |
788 | if ((nm = r->name) == 0) nm = "???"; | |
685143ac GKH |
789 | p += sprintf(p, "%016llx-%016llx: %s\n", |
790 | (unsigned long long)r->start, | |
791 | (unsigned long long)r->end, nm); | |
1da177e4 LT |
792 | } |
793 | ||
794 | return p-buf; | |
795 | } | |
796 | ||
797 | #endif /* CONFIG_PROC_FS */ | |
798 | ||
799 | /* | |
800 | * This is a version of find_resource and it belongs to kernel/resource.c. | |
801 | * Until we have agreement with Linus and Martin, it lingers here. | |
802 | * | |
803 | * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case. | |
804 | * This probably warrants some sort of hashing. | |
805 | */ | |
c61c65cd AB |
806 | static struct resource *_sparc_find_resource(struct resource *root, |
807 | unsigned long hit) | |
1da177e4 LT |
808 | { |
809 | struct resource *tmp; | |
810 | ||
811 | for (tmp = root->child; tmp != 0; tmp = tmp->sibling) { | |
812 | if (tmp->start <= hit && tmp->end >= hit) | |
813 | return tmp; | |
814 | } | |
815 | return NULL; | |
816 | } | |
817 | ||
c61c65cd | 818 | static void register_proc_sparc_ioport(void) |
1da177e4 LT |
819 | { |
820 | #ifdef CONFIG_PROC_FS | |
821 | create_proc_read_entry("io_map",0,NULL,_sparc_io_get_info,&sparc_iomap); | |
822 | create_proc_read_entry("dvma_map",0,NULL,_sparc_io_get_info,&_sparc_dvma); | |
823 | #endif | |
824 | } |