Commit | Line | Data |
---|---|---|
88278ca2 | 1 | /* |
1da177e4 LT |
2 | * ioport.c: Simple io mapping allocator. |
3 | * | |
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | |
5 | * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
6 | * | |
7 | * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev. | |
8 | * | |
9 | * 2000/01/29 | |
10 | * <rth> zait: as long as pci_alloc_consistent produces something addressable, | |
11 | * things are ok. | |
12 | * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a | |
13 | * pointer into the big page mapping | |
14 | * <rth> zait: so what? | |
15 | * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page())) | |
16 | * <zaitcev> Hmm | |
17 | * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())). | |
18 | * So far so good. | |
19 | * <zaitcev> Now, driver calls pci_free_consistent(with result of | |
20 | * remap_it_my_way()). | |
21 | * <zaitcev> How do you find the address to pass to free_pages()? | |
22 | * <rth> zait: walk the page tables? It's only two or three level after all. | |
23 | * <rth> zait: you have to walk them anyway to remove the mapping. | |
24 | * <zaitcev> Hmm | |
25 | * <zaitcev> Sounds reasonable | |
26 | */ | |
27 | ||
3ca9fab4 | 28 | #include <linux/module.h> |
1da177e4 LT |
29 | #include <linux/sched.h> |
30 | #include <linux/kernel.h> | |
31 | #include <linux/errno.h> | |
32 | #include <linux/types.h> | |
33 | #include <linux/ioport.h> | |
34 | #include <linux/mm.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/pci.h> /* struct pci_dev */ | |
37 | #include <linux/proc_fs.h> | |
e7a088f9 | 38 | #include <linux/seq_file.h> |
0912a5db | 39 | #include <linux/scatterlist.h> |
764f2579 | 40 | #include <linux/of_device.h> |
1da177e4 LT |
41 | |
42 | #include <asm/io.h> | |
43 | #include <asm/vaddrs.h> | |
44 | #include <asm/oplib.h> | |
576c352e | 45 | #include <asm/prom.h> |
1da177e4 LT |
46 | #include <asm/page.h> |
47 | #include <asm/pgalloc.h> | |
48 | #include <asm/dma.h> | |
e0039348 DM |
49 | #include <asm/iommu.h> |
50 | #include <asm/io-unit.h> | |
8401707f | 51 | #include <asm/leon.h> |
1da177e4 | 52 | |
d81f087f KG |
53 | /* This function must make sure that caches and memory are coherent after DMA |
54 | * On LEON systems without cache snooping it flushes the entire D-CACHE. | |
55 | */ | |
1b192740 | 56 | #ifndef CONFIG_SPARC_LEON |
d81f087f KG |
57 | static inline void dma_make_coherent(unsigned long pa, unsigned long len) |
58 | { | |
59 | } | |
1b192740 | 60 | #else |
d81f087f | 61 | static inline void dma_make_coherent(unsigned long pa, unsigned long len) |
1b192740 KG |
62 | { |
63 | if (!sparc_leon3_snooping_enabled()) | |
64 | leon_flush_dcache_all(); | |
65 | } | |
8401707f | 66 | #endif |
1da177e4 | 67 | |
1da177e4 LT |
68 | static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz); |
69 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
70 | unsigned long size, char *name); | |
71 | static void _sparc_free_io(struct resource *res); | |
72 | ||
c61c65cd AB |
73 | static void register_proc_sparc_ioport(void); |
74 | ||
1da177e4 LT |
75 | /* This points to the next to use virtual memory for DVMA mappings */ |
76 | static struct resource _sparc_dvma = { | |
77 | .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1 | |
78 | }; | |
79 | /* This points to the start of I/O mappings, cluable from outside. */ | |
80 | /*ext*/ struct resource sparc_iomap = { | |
81 | .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1 | |
82 | }; | |
83 | ||
84 | /* | |
85 | * Our mini-allocator... | |
86 | * Boy this is gross! We need it because we must map I/O for | |
87 | * timers and interrupt controller before the kmalloc is available. | |
88 | */ | |
89 | ||
90 | #define XNMLN 15 | |
91 | #define XNRES 10 /* SS-10 uses 8 */ | |
92 | ||
93 | struct xresource { | |
94 | struct resource xres; /* Must be first */ | |
95 | int xflag; /* 1 == used */ | |
96 | char xname[XNMLN+1]; | |
97 | }; | |
98 | ||
99 | static struct xresource xresv[XNRES]; | |
100 | ||
101 | static struct xresource *xres_alloc(void) { | |
102 | struct xresource *xrp; | |
103 | int n; | |
104 | ||
105 | xrp = xresv; | |
106 | for (n = 0; n < XNRES; n++) { | |
107 | if (xrp->xflag == 0) { | |
108 | xrp->xflag = 1; | |
109 | return xrp; | |
110 | } | |
111 | xrp++; | |
112 | } | |
113 | return NULL; | |
114 | } | |
115 | ||
116 | static void xres_free(struct xresource *xrp) { | |
117 | xrp->xflag = 0; | |
118 | } | |
119 | ||
120 | /* | |
121 | * These are typically used in PCI drivers | |
122 | * which are trying to be cross-platform. | |
123 | * | |
124 | * Bus type is always zero on IIep. | |
125 | */ | |
126 | void __iomem *ioremap(unsigned long offset, unsigned long size) | |
127 | { | |
128 | char name[14]; | |
129 | ||
130 | sprintf(name, "phys_%08x", (u32)offset); | |
131 | return _sparc_alloc_io(0, offset, size, name); | |
132 | } | |
6943f3da | 133 | EXPORT_SYMBOL(ioremap); |
1da177e4 LT |
134 | |
135 | /* | |
136 | * Comlimentary to ioremap(). | |
137 | */ | |
138 | void iounmap(volatile void __iomem *virtual) | |
139 | { | |
140 | unsigned long vaddr = (unsigned long) virtual & PAGE_MASK; | |
141 | struct resource *res; | |
142 | ||
a0e997c2 GU |
143 | /* |
144 | * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case. | |
145 | * This probably warrants some sort of hashing. | |
146 | */ | |
147 | if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) { | |
1da177e4 LT |
148 | printk("free_io/iounmap: cannot free %lx\n", vaddr); |
149 | return; | |
150 | } | |
151 | _sparc_free_io(res); | |
152 | ||
153 | if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) { | |
154 | xres_free((struct xresource *)res); | |
155 | } else { | |
156 | kfree(res); | |
157 | } | |
158 | } | |
6943f3da | 159 | EXPORT_SYMBOL(iounmap); |
1da177e4 | 160 | |
3ca9fab4 DM |
161 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, |
162 | unsigned long size, char *name) | |
163 | { | |
164 | return _sparc_alloc_io(res->flags & 0xF, | |
165 | res->start + offset, | |
166 | size, name); | |
167 | } | |
168 | EXPORT_SYMBOL(of_ioremap); | |
169 | ||
e3a411a3 | 170 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 DM |
171 | { |
172 | iounmap(base); | |
173 | } | |
174 | EXPORT_SYMBOL(of_iounmap); | |
175 | ||
1da177e4 LT |
176 | /* |
177 | * Meat of mapping | |
178 | */ | |
179 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, | |
180 | unsigned long size, char *name) | |
181 | { | |
182 | static int printed_full; | |
183 | struct xresource *xres; | |
184 | struct resource *res; | |
185 | char *tack; | |
186 | int tlen; | |
187 | void __iomem *va; /* P3 diag */ | |
188 | ||
189 | if (name == NULL) name = "???"; | |
190 | ||
191 | if ((xres = xres_alloc()) != 0) { | |
192 | tack = xres->xname; | |
193 | res = &xres->xres; | |
194 | } else { | |
195 | if (!printed_full) { | |
196 | printk("ioremap: done with statics, switching to malloc\n"); | |
197 | printed_full = 1; | |
198 | } | |
199 | tlen = strlen(name); | |
200 | tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL); | |
201 | if (tack == NULL) return NULL; | |
202 | memset(tack, 0, sizeof(struct resource)); | |
203 | res = (struct resource *) tack; | |
204 | tack += sizeof (struct resource); | |
205 | } | |
206 | ||
207 | strlcpy(tack, name, XNMLN+1); | |
208 | res->name = tack; | |
209 | ||
210 | va = _sparc_ioremap(res, busno, phys, size); | |
211 | /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */ | |
212 | return va; | |
213 | } | |
214 | ||
215 | /* | |
216 | */ | |
217 | static void __iomem * | |
218 | _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz) | |
219 | { | |
220 | unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK); | |
221 | ||
222 | if (allocate_resource(&sparc_iomap, res, | |
223 | (offset + sz + PAGE_SIZE-1) & PAGE_MASK, | |
224 | sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) { | |
225 | /* Usually we cannot see printks in this case. */ | |
226 | prom_printf("alloc_io_res(%s): cannot occupy\n", | |
227 | (res->name != NULL)? res->name: "???"); | |
228 | prom_halt(); | |
229 | } | |
230 | ||
231 | pa &= PAGE_MASK; | |
28f65c11 | 232 | sparc_mapiorange(bus, pa, res->start, resource_size(res)); |
1da177e4 | 233 | |
d75fc8bb | 234 | return (void __iomem *)(unsigned long)(res->start + offset); |
1da177e4 LT |
235 | } |
236 | ||
237 | /* | |
238 | * Comlimentary to _sparc_ioremap(). | |
239 | */ | |
240 | static void _sparc_free_io(struct resource *res) | |
241 | { | |
242 | unsigned long plen; | |
243 | ||
28f65c11 | 244 | plen = resource_size(res); |
30d4d1ff | 245 | BUG_ON((plen & (PAGE_SIZE-1)) != 0); |
1da177e4 LT |
246 | sparc_unmapiorange(res->start, plen); |
247 | release_resource(res); | |
248 | } | |
249 | ||
250 | #ifdef CONFIG_SBUS | |
251 | ||
63237eeb | 252 | void sbus_set_sbus64(struct device *dev, int x) |
8fae097d | 253 | { |
1da177e4 LT |
254 | printk("sbus_set_sbus64: unsupported\n"); |
255 | } | |
6943f3da | 256 | EXPORT_SYMBOL(sbus_set_sbus64); |
1da177e4 LT |
257 | |
258 | /* | |
259 | * Allocate a chunk of memory suitable for DMA. | |
260 | * Typically devices use them for control blocks. | |
261 | * CPU may access them without any explicit flushing. | |
1da177e4 | 262 | */ |
ee664a92 | 263 | static void *sbus_alloc_coherent(struct device *dev, size_t len, |
c416258a AP |
264 | dma_addr_t *dma_addrp, gfp_t gfp, |
265 | struct dma_attrs *attrs) | |
1da177e4 | 266 | { |
cd4cd730 | 267 | struct platform_device *op = to_platform_device(dev); |
5c8345bb | 268 | unsigned long len_total = PAGE_ALIGN(len); |
1da177e4 LT |
269 | unsigned long va; |
270 | struct resource *res; | |
271 | int order; | |
272 | ||
efad798b | 273 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
274 | if (len <= 0) { |
275 | return NULL; | |
276 | } | |
277 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
278 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
279 | return NULL; | |
280 | } | |
281 | ||
282 | order = get_order(len_total); | |
f3d48f03 | 283 | if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0) |
1da177e4 LT |
284 | goto err_nopages; |
285 | ||
c80892d1 | 286 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) |
1da177e4 | 287 | goto err_nomem; |
1da177e4 LT |
288 | |
289 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
290 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
291 | printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total); | |
292 | goto err_nova; | |
293 | } | |
5c8345bb | 294 | |
1da177e4 LT |
295 | // XXX The mmu_map_dma_area does this for us below, see comments. |
296 | // sparc_mapiorange(0, virt_to_phys(va), res->start, len_total); | |
297 | /* | |
298 | * XXX That's where sdev would be used. Currently we load | |
299 | * all iommu tables with the same translations. | |
300 | */ | |
4b1c5df2 | 301 | if (mmu_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0) |
1da177e4 LT |
302 | goto err_noiommu; |
303 | ||
61c7a080 | 304 | res->name = op->dev.of_node->name; |
4cfbd7eb | 305 | |
d75fc8bb | 306 | return (void *)(unsigned long)res->start; |
1da177e4 LT |
307 | |
308 | err_noiommu: | |
309 | release_resource(res); | |
310 | err_nova: | |
1da177e4 | 311 | kfree(res); |
0c7c6a3c KG |
312 | err_nomem: |
313 | free_pages(va, order); | |
1da177e4 LT |
314 | err_nopages: |
315 | return NULL; | |
316 | } | |
317 | ||
ee664a92 | 318 | static void sbus_free_coherent(struct device *dev, size_t n, void *p, |
c416258a | 319 | dma_addr_t ba, struct dma_attrs *attrs) |
1da177e4 LT |
320 | { |
321 | struct resource *res; | |
322 | struct page *pgv; | |
323 | ||
a0e997c2 | 324 | if ((res = lookup_resource(&_sparc_dvma, |
1da177e4 LT |
325 | (unsigned long)p)) == NULL) { |
326 | printk("sbus_free_consistent: cannot free %p\n", p); | |
327 | return; | |
328 | } | |
329 | ||
330 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
331 | printk("sbus_free_consistent: unaligned va %p\n", p); | |
332 | return; | |
333 | } | |
334 | ||
5c8345bb | 335 | n = PAGE_ALIGN(n); |
28f65c11 | 336 | if (resource_size(res) != n) { |
ee664a92 | 337 | printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n", |
28f65c11 | 338 | (long)resource_size(res), n); |
1da177e4 LT |
339 | return; |
340 | } | |
341 | ||
342 | release_resource(res); | |
343 | kfree(res); | |
344 | ||
aba945e7 | 345 | pgv = virt_to_page(p); |
4b1c5df2 | 346 | mmu_unmap_dma_area(dev, ba, n); |
1da177e4 LT |
347 | |
348 | __free_pages(pgv, get_order(n)); | |
349 | } | |
350 | ||
351 | /* | |
352 | * Map a chunk of memory so that devices can see it. | |
353 | * CPU view of this memory may be inconsistent with | |
354 | * a device view and explicit flushing is necessary. | |
355 | */ | |
ee664a92 FT |
356 | static dma_addr_t sbus_map_page(struct device *dev, struct page *page, |
357 | unsigned long offset, size_t len, | |
358 | enum dma_data_direction dir, | |
359 | struct dma_attrs *attrs) | |
1da177e4 | 360 | { |
c2c07dbd FT |
361 | void *va = page_address(page) + offset; |
362 | ||
efad798b | 363 | /* XXX why are some lengths signed, others unsigned? */ |
1da177e4 LT |
364 | if (len <= 0) { |
365 | return 0; | |
366 | } | |
367 | /* XXX So what is maxphys for us and how do drivers know it? */ | |
368 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
369 | return 0; | |
370 | } | |
260489fa | 371 | return mmu_get_scsi_one(dev, va, len); |
1da177e4 LT |
372 | } |
373 | ||
ee664a92 FT |
374 | static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, |
375 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
1da177e4 | 376 | { |
260489fa | 377 | mmu_release_scsi_one(dev, ba, n); |
1da177e4 LT |
378 | } |
379 | ||
ee664a92 FT |
380 | static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, |
381 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
1da177e4 | 382 | { |
260489fa | 383 | mmu_get_scsi_sgl(dev, sg, n); |
1da177e4 LT |
384 | return n; |
385 | } | |
386 | ||
ee664a92 FT |
387 | static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, |
388 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
1da177e4 | 389 | { |
260489fa | 390 | mmu_release_scsi_sgl(dev, sg, n); |
1da177e4 LT |
391 | } |
392 | ||
ee664a92 FT |
393 | static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
394 | int n, enum dma_data_direction dir) | |
1da177e4 | 395 | { |
ee664a92 | 396 | BUG(); |
1da177e4 LT |
397 | } |
398 | ||
ee664a92 FT |
399 | static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
400 | int n, enum dma_data_direction dir) | |
1da177e4 | 401 | { |
ee664a92 | 402 | BUG(); |
1da177e4 LT |
403 | } |
404 | ||
ee664a92 | 405 | struct dma_map_ops sbus_dma_ops = { |
c416258a AP |
406 | .alloc = sbus_alloc_coherent, |
407 | .free = sbus_free_coherent, | |
ee664a92 FT |
408 | .map_page = sbus_map_page, |
409 | .unmap_page = sbus_unmap_page, | |
410 | .map_sg = sbus_map_sg, | |
411 | .unmap_sg = sbus_unmap_sg, | |
412 | .sync_sg_for_cpu = sbus_sync_sg_for_cpu, | |
413 | .sync_sg_for_device = sbus_sync_sg_for_device, | |
414 | }; | |
415 | ||
f8e4d32c | 416 | static int __init sparc_register_ioport(void) |
576c352e | 417 | { |
576c352e DM |
418 | register_proc_sparc_ioport(); |
419 | ||
576c352e | 420 | return 0; |
576c352e DM |
421 | } |
422 | ||
f8e4d32c DM |
423 | arch_initcall(sparc_register_ioport); |
424 | ||
1da177e4 LT |
425 | #endif /* CONFIG_SBUS */ |
426 | ||
18304746 KG |
427 | |
428 | /* LEON reuses PCI DMA ops */ | |
429 | #if defined(CONFIG_PCI) || defined(CONFIG_SPARC_LEON) | |
1da177e4 LT |
430 | |
431 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | |
432 | * hwdev should be valid struct pci_dev pointer for PCI devices. | |
433 | */ | |
ee664a92 | 434 | static void *pci32_alloc_coherent(struct device *dev, size_t len, |
c416258a AP |
435 | dma_addr_t *pba, gfp_t gfp, |
436 | struct dma_attrs *attrs) | |
1da177e4 | 437 | { |
5c8345bb | 438 | unsigned long len_total = PAGE_ALIGN(len); |
7feee249 | 439 | void *va; |
1da177e4 LT |
440 | struct resource *res; |
441 | int order; | |
442 | ||
443 | if (len == 0) { | |
444 | return NULL; | |
445 | } | |
446 | if (len > 256*1024) { /* __get_free_pages() limit */ | |
447 | return NULL; | |
448 | } | |
449 | ||
450 | order = get_order(len_total); | |
7feee249 KG |
451 | va = (void *) __get_free_pages(GFP_KERNEL, order); |
452 | if (va == NULL) { | |
1da177e4 | 453 | printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT); |
7feee249 | 454 | goto err_nopages; |
1da177e4 LT |
455 | } |
456 | ||
c80892d1 | 457 | if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) { |
1da177e4 | 458 | printk("pci_alloc_consistent: no core\n"); |
7feee249 | 459 | goto err_nomem; |
1da177e4 | 460 | } |
1da177e4 LT |
461 | |
462 | if (allocate_resource(&_sparc_dvma, res, len_total, | |
463 | _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { | |
464 | printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total); | |
7feee249 | 465 | goto err_nova; |
1da177e4 | 466 | } |
1da177e4 LT |
467 | sparc_mapiorange(0, virt_to_phys(va), res->start, len_total); |
468 | ||
469 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ | |
470 | return (void *) res->start; | |
7feee249 KG |
471 | |
472 | err_nova: | |
473 | kfree(res); | |
474 | err_nomem: | |
475 | free_pages((unsigned long)va, order); | |
476 | err_nopages: | |
477 | return NULL; | |
1da177e4 LT |
478 | } |
479 | ||
480 | /* Free and unmap a consistent DMA buffer. | |
481 | * cpu_addr is what was returned from pci_alloc_consistent, | |
482 | * size must be the same as what as passed into pci_alloc_consistent, | |
483 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | |
484 | * | |
d1a78c32 | 485 | * References to the memory and mappings associated with cpu_addr/dma_addr |
1da177e4 LT |
486 | * past this call are illegal. |
487 | */ | |
ee664a92 | 488 | static void pci32_free_coherent(struct device *dev, size_t n, void *p, |
c416258a | 489 | dma_addr_t ba, struct dma_attrs *attrs) |
1da177e4 LT |
490 | { |
491 | struct resource *res; | |
1da177e4 | 492 | |
a0e997c2 | 493 | if ((res = lookup_resource(&_sparc_dvma, |
1da177e4 LT |
494 | (unsigned long)p)) == NULL) { |
495 | printk("pci_free_consistent: cannot free %p\n", p); | |
496 | return; | |
497 | } | |
498 | ||
499 | if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { | |
500 | printk("pci_free_consistent: unaligned va %p\n", p); | |
501 | return; | |
502 | } | |
503 | ||
5c8345bb | 504 | n = PAGE_ALIGN(n); |
28f65c11 | 505 | if (resource_size(res) != n) { |
1da177e4 | 506 | printk("pci_free_consistent: region 0x%lx asked 0x%lx\n", |
28f65c11 | 507 | (long)resource_size(res), (long)n); |
1da177e4 LT |
508 | return; |
509 | } | |
510 | ||
d81f087f | 511 | dma_make_coherent(ba, n); |
1da177e4 LT |
512 | sparc_unmapiorange((unsigned long)p, n); |
513 | ||
514 | release_resource(res); | |
515 | kfree(res); | |
d81f087f | 516 | free_pages((unsigned long)phys_to_virt(ba), get_order(n)); |
1da177e4 | 517 | } |
1da177e4 LT |
518 | |
519 | /* | |
520 | * Same as pci_map_single, but with pages. | |
521 | */ | |
ee664a92 FT |
522 | static dma_addr_t pci32_map_page(struct device *dev, struct page *page, |
523 | unsigned long offset, size_t size, | |
524 | enum dma_data_direction dir, | |
525 | struct dma_attrs *attrs) | |
1da177e4 | 526 | { |
1da177e4 LT |
527 | /* IIep is write-through, not flushing. */ |
528 | return page_to_phys(page) + offset; | |
529 | } | |
1da177e4 | 530 | |
b8682cef KG |
531 | static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size, |
532 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
533 | { | |
534 | if (dir != PCI_DMA_TODEVICE) | |
d81f087f | 535 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
b8682cef KG |
536 | } |
537 | ||
1da177e4 LT |
538 | /* Map a set of buffers described by scatterlist in streaming |
539 | * mode for DMA. This is the scather-gather version of the | |
540 | * above pci_map_single interface. Here the scatter gather list | |
541 | * elements are each tagged with the appropriate dma address | |
542 | * and length. They are obtained via sg_dma_{address,length}(SG). | |
543 | * | |
544 | * NOTE: An implementation may be able to use a smaller number of | |
545 | * DMA address/length pairs than there are SG table elements. | |
546 | * (for example via virtual mapping capabilities) | |
547 | * The routine returns the number of addr/length pairs actually | |
548 | * used, at most nents. | |
549 | * | |
550 | * Device ownership issues as mentioned above for pci_map_single are | |
551 | * the same here. | |
552 | */ | |
ee664a92 FT |
553 | static int pci32_map_sg(struct device *device, struct scatterlist *sgl, |
554 | int nents, enum dma_data_direction dir, | |
555 | struct dma_attrs *attrs) | |
1da177e4 | 556 | { |
0912a5db | 557 | struct scatterlist *sg; |
1da177e4 LT |
558 | int n; |
559 | ||
1da177e4 | 560 | /* IIep is write-through, not flushing. */ |
0912a5db | 561 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 562 | sg->dma_address = sg_phys(sg); |
aa83a26a | 563 | sg->dma_length = sg->length; |
1da177e4 LT |
564 | } |
565 | return nents; | |
566 | } | |
567 | ||
568 | /* Unmap a set of streaming mode DMA translations. | |
569 | * Again, cpu read rules concerning calls here are the same as for | |
570 | * pci_unmap_single() above. | |
571 | */ | |
ee664a92 FT |
572 | static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl, |
573 | int nents, enum dma_data_direction dir, | |
574 | struct dma_attrs *attrs) | |
1da177e4 | 575 | { |
0912a5db | 576 | struct scatterlist *sg; |
1da177e4 LT |
577 | int n; |
578 | ||
ee664a92 | 579 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 580 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 581 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
582 | } |
583 | } | |
584 | } | |
585 | ||
586 | /* Make physical memory consistent for a single | |
587 | * streaming mode DMA translation before or after a transfer. | |
588 | * | |
589 | * If you perform a pci_map_single() but wish to interrogate the | |
590 | * buffer using the cpu, yet do not wish to teardown the PCI dma | |
591 | * mapping, you must call this function before doing so. At the | |
592 | * next point you give the PCI dma address back to the card, you | |
593 | * must first perform a pci_dma_sync_for_device, and then the | |
594 | * device again owns the buffer. | |
595 | */ | |
ee664a92 FT |
596 | static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba, |
597 | size_t size, enum dma_data_direction dir) | |
1da177e4 | 598 | { |
ee664a92 | 599 | if (dir != PCI_DMA_TODEVICE) { |
d81f087f | 600 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
1da177e4 LT |
601 | } |
602 | } | |
603 | ||
ee664a92 FT |
604 | static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba, |
605 | size_t size, enum dma_data_direction dir) | |
1da177e4 | 606 | { |
ee664a92 | 607 | if (dir != PCI_DMA_TODEVICE) { |
d81f087f | 608 | dma_make_coherent(ba, PAGE_ALIGN(size)); |
1da177e4 LT |
609 | } |
610 | } | |
611 | ||
612 | /* Make physical memory consistent for a set of streaming | |
613 | * mode DMA translations after a transfer. | |
614 | * | |
615 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | |
616 | * same rules and usage. | |
617 | */ | |
ee664a92 FT |
618 | static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, |
619 | int nents, enum dma_data_direction dir) | |
1da177e4 | 620 | { |
0912a5db | 621 | struct scatterlist *sg; |
1da177e4 LT |
622 | int n; |
623 | ||
ee664a92 | 624 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 625 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 626 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
627 | } |
628 | } | |
629 | } | |
630 | ||
ee664a92 FT |
631 | static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl, |
632 | int nents, enum dma_data_direction dir) | |
1da177e4 | 633 | { |
0912a5db | 634 | struct scatterlist *sg; |
1da177e4 LT |
635 | int n; |
636 | ||
ee664a92 | 637 | if (dir != PCI_DMA_TODEVICE) { |
0912a5db | 638 | for_each_sg(sgl, sg, nents, n) { |
d81f087f | 639 | dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length)); |
1da177e4 LT |
640 | } |
641 | } | |
642 | } | |
ee664a92 FT |
643 | |
644 | struct dma_map_ops pci32_dma_ops = { | |
c416258a AP |
645 | .alloc = pci32_alloc_coherent, |
646 | .free = pci32_free_coherent, | |
ee664a92 | 647 | .map_page = pci32_map_page, |
b8682cef | 648 | .unmap_page = pci32_unmap_page, |
ee664a92 FT |
649 | .map_sg = pci32_map_sg, |
650 | .unmap_sg = pci32_unmap_sg, | |
651 | .sync_single_for_cpu = pci32_sync_single_for_cpu, | |
652 | .sync_single_for_device = pci32_sync_single_for_device, | |
653 | .sync_sg_for_cpu = pci32_sync_sg_for_cpu, | |
654 | .sync_sg_for_device = pci32_sync_sg_for_device, | |
655 | }; | |
656 | EXPORT_SYMBOL(pci32_dma_ops); | |
657 | ||
18304746 KG |
658 | #endif /* CONFIG_PCI || CONFIG_SPARC_LEON */ |
659 | ||
660 | #ifdef CONFIG_SPARC_LEON | |
661 | struct dma_map_ops *dma_ops = &pci32_dma_ops; | |
662 | #elif defined(CONFIG_SBUS) | |
663 | struct dma_map_ops *dma_ops = &sbus_dma_ops; | |
664 | #endif | |
665 | ||
666 | EXPORT_SYMBOL(dma_ops); | |
667 | ||
1da177e4 | 668 | |
451d7400 FT |
669 | /* |
670 | * Return whether the given PCI device DMA address mask can be | |
671 | * supported properly. For example, if your device can only drive the | |
672 | * low 24-bits during PCI bus mastering, then you would pass | |
673 | * 0x00ffffff as the mask to this function. | |
674 | */ | |
675 | int dma_supported(struct device *dev, u64 mask) | |
676 | { | |
677 | #ifdef CONFIG_PCI | |
678 | if (dev->bus == &pci_bus_type) | |
679 | return 1; | |
680 | #endif | |
681 | return 0; | |
682 | } | |
683 | EXPORT_SYMBOL(dma_supported); | |
684 | ||
1da177e4 LT |
685 | #ifdef CONFIG_PROC_FS |
686 | ||
e7a088f9 | 687 | static int sparc_io_proc_show(struct seq_file *m, void *v) |
1da177e4 | 688 | { |
e7a088f9 | 689 | struct resource *root = m->private, *r; |
1da177e4 LT |
690 | const char *nm; |
691 | ||
e7a088f9 | 692 | for (r = root->child; r != NULL; r = r->sibling) { |
1da177e4 | 693 | if ((nm = r->name) == 0) nm = "???"; |
e7a088f9 | 694 | seq_printf(m, "%016llx-%016llx: %s\n", |
685143ac GKH |
695 | (unsigned long long)r->start, |
696 | (unsigned long long)r->end, nm); | |
1da177e4 LT |
697 | } |
698 | ||
e7a088f9 | 699 | return 0; |
1da177e4 LT |
700 | } |
701 | ||
e7a088f9 AD |
702 | static int sparc_io_proc_open(struct inode *inode, struct file *file) |
703 | { | |
704 | return single_open(file, sparc_io_proc_show, PDE(inode)->data); | |
705 | } | |
706 | ||
707 | static const struct file_operations sparc_io_proc_fops = { | |
708 | .owner = THIS_MODULE, | |
709 | .open = sparc_io_proc_open, | |
710 | .read = seq_read, | |
711 | .llseek = seq_lseek, | |
712 | .release = single_release, | |
713 | }; | |
1da177e4 LT |
714 | #endif /* CONFIG_PROC_FS */ |
715 | ||
c61c65cd | 716 | static void register_proc_sparc_ioport(void) |
1da177e4 LT |
717 | { |
718 | #ifdef CONFIG_PROC_FS | |
e7a088f9 AD |
719 | proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap); |
720 | proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma); | |
1da177e4 LT |
721 | #endif |
722 | } |