[PATCH] sparc32 pt_regs fixes
[deliverable/linux.git] / arch / sparc / kernel / irq.c
CommitLineData
1da177e4
LT
1/* $Id: irq.c,v 1.114 2001/12/11 04:55:51 davem Exp $
2 * arch/sparc/kernel/irq.c: Interrupt request handling routines. On the
3 * Sparc the IRQ's are basically 'cast in stone'
4 * and you are supposed to probe the prom's device
5 * node trees to find out who's got which IRQ.
6 *
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
9 * Copyright (C) 1995,2002 Pete A. Zaitcev (zaitcev@yahoo.com)
10 * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
11 * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
12 */
13
1da177e4
LT
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/ptrace.h>
17#include <linux/errno.h>
18#include <linux/linkage.h>
19#include <linux/kernel_stat.h>
20#include <linux/signal.h>
21#include <linux/sched.h>
22#include <linux/interrupt.h>
23#include <linux/slab.h>
24#include <linux/random.h>
25#include <linux/init.h>
26#include <linux/smp.h>
27#include <linux/smp_lock.h>
28#include <linux/delay.h>
29#include <linux/threads.h>
30#include <linux/spinlock.h>
31#include <linux/seq_file.h>
32
33#include <asm/ptrace.h>
34#include <asm/processor.h>
35#include <asm/system.h>
36#include <asm/psr.h>
37#include <asm/smp.h>
38#include <asm/vaddrs.h>
39#include <asm/timer.h>
40#include <asm/openprom.h>
41#include <asm/oplib.h>
42#include <asm/traps.h>
43#include <asm/irq.h>
44#include <asm/io.h>
45#include <asm/pgalloc.h>
46#include <asm/pgtable.h>
47#include <asm/pcic.h>
48#include <asm/cacheflush.h>
0d84438d 49#include <asm/irq_regs.h>
1da177e4
LT
50
51#ifdef CONFIG_SMP
52#define SMP_NOP2 "nop; nop;\n\t"
53#define SMP_NOP3 "nop; nop; nop;\n\t"
54#else
55#define SMP_NOP2
56#define SMP_NOP3
57#endif /* SMP */
58unsigned long __local_irq_save(void)
59{
60 unsigned long retval;
61 unsigned long tmp;
62
63 __asm__ __volatile__(
64 "rd %%psr, %0\n\t"
65 SMP_NOP3 /* Sun4m + Cypress + SMP bug */
66 "or %0, %2, %1\n\t"
67 "wr %1, 0, %%psr\n\t"
68 "nop; nop; nop\n"
69 : "=&r" (retval), "=r" (tmp)
70 : "i" (PSR_PIL)
71 : "memory");
72
73 return retval;
74}
75
76void local_irq_enable(void)
77{
78 unsigned long tmp;
79
80 __asm__ __volatile__(
81 "rd %%psr, %0\n\t"
82 SMP_NOP3 /* Sun4m + Cypress + SMP bug */
83 "andn %0, %1, %0\n\t"
84 "wr %0, 0, %%psr\n\t"
85 "nop; nop; nop\n"
86 : "=&r" (tmp)
87 : "i" (PSR_PIL)
88 : "memory");
89}
90
91void local_irq_restore(unsigned long old_psr)
92{
93 unsigned long tmp;
94
95 __asm__ __volatile__(
96 "rd %%psr, %0\n\t"
97 "and %2, %1, %2\n\t"
98 SMP_NOP2 /* Sun4m + Cypress + SMP bug */
99 "andn %0, %1, %0\n\t"
100 "wr %0, %2, %%psr\n\t"
101 "nop; nop; nop\n"
102 : "=&r" (tmp)
103 : "i" (PSR_PIL), "r" (old_psr)
104 : "memory");
105}
106
107EXPORT_SYMBOL(__local_irq_save);
108EXPORT_SYMBOL(local_irq_enable);
109EXPORT_SYMBOL(local_irq_restore);
110
111/*
112 * Dave Redman (djhr@tadpole.co.uk)
113 *
114 * IRQ numbers.. These are no longer restricted to 15..
115 *
116 * this is done to enable SBUS cards and onboard IO to be masked
117 * correctly. using the interrupt level isn't good enough.
118 *
119 * For example:
120 * A device interrupting at sbus level6 and the Floppy both come in
121 * at IRQ11, but enabling and disabling them requires writing to
122 * different bits in the SLAVIO/SEC.
123 *
124 * As a result of these changes sun4m machines could now support
125 * directed CPU interrupts using the existing enable/disable irq code
126 * with tweaks.
127 *
128 */
129
130static void irq_panic(void)
131{
132 extern char *cputypval;
133 prom_printf("machine: %s doesn't have irq handlers defined!\n",cputypval);
134 prom_halt();
135}
136
0d84438d
AV
137void (*sparc_init_timers)(irqreturn_t (*)(int, void *)) =
138 (void (*)(irqreturn_t (*)(int, void *))) irq_panic;
1da177e4
LT
139
140/*
141 * Dave Redman (djhr@tadpole.co.uk)
142 *
143 * There used to be extern calls and hard coded values here.. very sucky!
144 * instead, because some of the devices attach very early, I do something
145 * equally sucky but at least we'll never try to free statically allocated
146 * space or call kmalloc before kmalloc_init :(.
147 *
148 * In fact it's the timer10 that attaches first.. then timer14
149 * then kmalloc_init is called.. then the tty interrupts attach.
150 * hmmm....
151 *
152 */
153#define MAX_STATIC_ALLOC 4
154struct irqaction static_irqaction[MAX_STATIC_ALLOC];
155int static_irq_count;
156
a54123e2
BB
157struct {
158 struct irqaction *action;
159 int flags;
160} sparc_irq[NR_IRQS];
161#define SPARC_IRQ_INPROGRESS 1
1da177e4
LT
162
163/* Used to protect the IRQ action lists */
164DEFINE_SPINLOCK(irq_action_lock);
165
166int show_interrupts(struct seq_file *p, void *v)
167{
168 int i = *(loff_t *) v;
169 struct irqaction * action;
170 unsigned long flags;
171#ifdef CONFIG_SMP
172 int j;
173#endif
174
175 if (sparc_cpu_model == sun4d) {
176 extern int show_sun4d_interrupts(struct seq_file *, void *);
177
178 return show_sun4d_interrupts(p, v);
179 }
180 spin_lock_irqsave(&irq_action_lock, flags);
181 if (i < NR_IRQS) {
a54123e2 182 action = sparc_irq[i].action;
1da177e4
LT
183 if (!action)
184 goto out_unlock;
185 seq_printf(p, "%3d: ", i);
186#ifndef CONFIG_SMP
187 seq_printf(p, "%10u ", kstat_irqs(i));
188#else
394e3902
AM
189 for_each_online_cpu(j) {
190 seq_printf(p, "%10u ",
a54123e2 191 kstat_cpu(j).irqs[i]);
1da177e4
LT
192 }
193#endif
194 seq_printf(p, " %c %s",
67413202 195 (action->flags & IRQF_DISABLED) ? '+' : ' ',
1da177e4
LT
196 action->name);
197 for (action=action->next; action; action = action->next) {
198 seq_printf(p, ",%s %s",
67413202 199 (action->flags & IRQF_DISABLED) ? " +" : "",
1da177e4
LT
200 action->name);
201 }
202 seq_putc(p, '\n');
203 }
204out_unlock:
205 spin_unlock_irqrestore(&irq_action_lock, flags);
206 return 0;
207}
208
209void free_irq(unsigned int irq, void *dev_id)
210{
211 struct irqaction * action;
a54123e2 212 struct irqaction **actionp;
1da177e4
LT
213 unsigned long flags;
214 unsigned int cpu_irq;
215
216 if (sparc_cpu_model == sun4d) {
217 extern void sun4d_free_irq(unsigned int, void *);
218
219 sun4d_free_irq(irq, dev_id);
220 return;
221 }
222 cpu_irq = irq & (NR_IRQS - 1);
223 if (cpu_irq > 14) { /* 14 irq levels on the sparc */
224 printk("Trying to free bogus IRQ %d\n", irq);
225 return;
226 }
227
228 spin_lock_irqsave(&irq_action_lock, flags);
229
a54123e2
BB
230 actionp = &sparc_irq[cpu_irq].action;
231 action = *actionp;
1da177e4
LT
232
233 if (!action->handler) {
234 printk("Trying to free free IRQ%d\n",irq);
235 goto out_unlock;
236 }
237 if (dev_id) {
238 for (; action; action = action->next) {
239 if (action->dev_id == dev_id)
240 break;
a54123e2 241 actionp = &action->next;
1da177e4
LT
242 }
243 if (!action) {
244 printk("Trying to free free shared IRQ%d\n",irq);
245 goto out_unlock;
246 }
67413202 247 } else if (action->flags & IRQF_SHARED) {
1da177e4
LT
248 printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
249 goto out_unlock;
250 }
251 if (action->flags & SA_STATIC_ALLOC)
252 {
253 /* This interrupt is marked as specially allocated
254 * so it is a bad idea to free it.
255 */
256 printk("Attempt to free statically allocated IRQ%d (%s)\n",
257 irq, action->name);
258 goto out_unlock;
259 }
a54123e2
BB
260
261 *actionp = action->next;
1da177e4
LT
262
263 spin_unlock_irqrestore(&irq_action_lock, flags);
264
265 synchronize_irq(irq);
266
267 spin_lock_irqsave(&irq_action_lock, flags);
268
269 kfree(action);
270
a54123e2 271 if (!sparc_irq[cpu_irq].action)
1da177e4
LT
272 disable_irq(irq);
273
274out_unlock:
275 spin_unlock_irqrestore(&irq_action_lock, flags);
276}
277
278EXPORT_SYMBOL(free_irq);
279
280/*
281 * This is called when we want to synchronize with
282 * interrupts. We may for example tell a device to
283 * stop sending interrupts: but to make sure there
284 * are no interrupts that are executing on another
285 * CPU we need to call this function.
286 */
287#ifdef CONFIG_SMP
288void synchronize_irq(unsigned int irq)
289{
a54123e2
BB
290 unsigned int cpu_irq;
291
292 cpu_irq = irq & (NR_IRQS - 1);
293 while (sparc_irq[cpu_irq].flags & SPARC_IRQ_INPROGRESS)
294 cpu_relax();
1da177e4
LT
295}
296#endif /* SMP */
297
298void unexpected_irq(int irq, void *dev_id, struct pt_regs * regs)
299{
300 int i;
301 struct irqaction * action;
302 unsigned int cpu_irq;
303
304 cpu_irq = irq & (NR_IRQS - 1);
a54123e2 305 action = sparc_irq[cpu_irq].action;
1da177e4
LT
306
307 printk("IO device interrupt, irq = %d\n", irq);
308 printk("PC = %08lx NPC = %08lx FP=%08lx\n", regs->pc,
309 regs->npc, regs->u_regs[14]);
310 if (action) {
311 printk("Expecting: ");
312 for (i = 0; i < 16; i++)
313 if (action->handler)
314 printk("[%s:%d:0x%x] ", action->name,
315 (int) i, (unsigned int) action->handler);
316 }
317 printk("AIEEE\n");
318 panic("bogus interrupt received");
319}
320
321void handler_irq(int irq, struct pt_regs * regs)
322{
0d84438d 323 struct pt_regs *old_regs;
1da177e4
LT
324 struct irqaction * action;
325 int cpu = smp_processor_id();
326#ifdef CONFIG_SMP
327 extern void smp4m_irq_rotate(int cpu);
328#endif
329
0d84438d 330 old_regs = set_irq_regs(regs);
1da177e4
LT
331 irq_enter();
332 disable_pil_irq(irq);
333#ifdef CONFIG_SMP
334 /* Only rotate on lower priority IRQ's (scsi, ethernet, etc.). */
198c167c 335 if((sparc_cpu_model==sun4m) && (irq < 10))
1da177e4
LT
336 smp4m_irq_rotate(cpu);
337#endif
a54123e2
BB
338 action = sparc_irq[irq].action;
339 sparc_irq[irq].flags |= SPARC_IRQ_INPROGRESS;
1da177e4
LT
340 kstat_cpu(cpu).irqs[irq]++;
341 do {
342 if (!action || !action->handler)
343 unexpected_irq(irq, NULL, regs);
0d84438d 344 action->handler(irq, action->dev_id);
1da177e4
LT
345 action = action->next;
346 } while (action);
a54123e2 347 sparc_irq[irq].flags &= ~SPARC_IRQ_INPROGRESS;
1da177e4
LT
348 enable_pil_irq(irq);
349 irq_exit();
0d84438d 350 set_irq_regs(old_regs);
1da177e4
LT
351}
352
353#ifdef CONFIG_BLK_DEV_FD
0d84438d 354extern void floppy_interrupt(int irq, void *dev_id)
1da177e4
LT
355
356void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs)
357{
0d84438d 358 struct pt_regs *old_regs;
1da177e4
LT
359 int cpu = smp_processor_id();
360
0d84438d 361 old_regs = set_irq_regs(regs);
1da177e4
LT
362 disable_pil_irq(irq);
363 irq_enter();
364 kstat_cpu(cpu).irqs[irq]++;
0d84438d 365 floppy_interrupt(irq, dev_id);
1da177e4
LT
366 irq_exit();
367 enable_pil_irq(irq);
0d84438d 368 set_irq_regs(old_regs);
1da177e4
LT
369 // XXX Eek, it's totally changed with preempt_count() and such
370 // if (softirq_pending(cpu))
371 // do_softirq();
372}
373#endif
374
375/* Fast IRQ's on the Sparc can only have one routine attached to them,
376 * thus no sharing possible.
377 */
378int request_fast_irq(unsigned int irq,
0d84438d 379 irqreturn_t (*handler)(int, void *),
1da177e4
LT
380 unsigned long irqflags, const char *devname)
381{
382 struct irqaction *action;
383 unsigned long flags;
384 unsigned int cpu_irq;
385 int ret;
386#ifdef CONFIG_SMP
387 struct tt_entry *trap_table;
388 extern struct tt_entry trapbase_cpu1, trapbase_cpu2, trapbase_cpu3;
389#endif
390
391 cpu_irq = irq & (NR_IRQS - 1);
392 if(cpu_irq > 14) {
393 ret = -EINVAL;
394 goto out;
395 }
396 if(!handler) {
397 ret = -EINVAL;
398 goto out;
399 }
400
401 spin_lock_irqsave(&irq_action_lock, flags);
402
a54123e2 403 action = sparc_irq[cpu_irq].action;
1da177e4 404 if(action) {
67413202 405 if(action->flags & IRQF_SHARED)
1da177e4 406 panic("Trying to register fast irq when already shared.\n");
67413202 407 if(irqflags & IRQF_SHARED)
1da177e4
LT
408 panic("Trying to register fast irq as shared.\n");
409
410 /* Anyway, someone already owns it so cannot be made fast. */
411 printk("request_fast_irq: Trying to register yet already owned.\n");
412 ret = -EBUSY;
413 goto out_unlock;
414 }
415
416 /* If this is flagged as statically allocated then we use our
417 * private struct which is never freed.
418 */
419 if (irqflags & SA_STATIC_ALLOC) {
420 if (static_irq_count < MAX_STATIC_ALLOC)
421 action = &static_irqaction[static_irq_count++];
422 else
423 printk("Fast IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n",
424 irq, devname);
425 }
426
427 if (action == NULL)
428 action = (struct irqaction *)kmalloc(sizeof(struct irqaction),
429 GFP_ATOMIC);
430
431 if (!action) {
432 ret = -ENOMEM;
433 goto out_unlock;
434 }
435
436 /* Dork with trap table if we get this far. */
437#define INSTANTIATE(table) \
438 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_one = SPARC_RD_PSR_L0; \
439 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two = \
440 SPARC_BRANCH((unsigned long) handler, \
441 (unsigned long) &table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two);\
442 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_three = SPARC_RD_WIM_L3; \
443 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_four = SPARC_NOP;
444
445 INSTANTIATE(sparc_ttable)
446#ifdef CONFIG_SMP
447 trap_table = &trapbase_cpu1; INSTANTIATE(trap_table)
448 trap_table = &trapbase_cpu2; INSTANTIATE(trap_table)
449 trap_table = &trapbase_cpu3; INSTANTIATE(trap_table)
450#endif
451#undef INSTANTIATE
452 /*
453 * XXX Correct thing whould be to flush only I- and D-cache lines
454 * which contain the handler in question. But as of time of the
455 * writing we have no CPU-neutral interface to fine-grained flushes.
456 */
457 flush_cache_all();
458
459 action->handler = handler;
460 action->flags = irqflags;
461 cpus_clear(action->mask);
462 action->name = devname;
463 action->dev_id = NULL;
464 action->next = NULL;
465
a54123e2 466 sparc_irq[cpu_irq].action = action;
1da177e4
LT
467
468 enable_irq(irq);
469
470 ret = 0;
471out_unlock:
472 spin_unlock_irqrestore(&irq_action_lock, flags);
473out:
474 return ret;
475}
476
477int request_irq(unsigned int irq,
0d84438d 478 irqreturn_t (*handler)(int, void *),
1da177e4
LT
479 unsigned long irqflags, const char * devname, void *dev_id)
480{
a54123e2 481 struct irqaction * action, **actionp;
1da177e4
LT
482 unsigned long flags;
483 unsigned int cpu_irq;
484 int ret;
485
486 if (sparc_cpu_model == sun4d) {
487 extern int sun4d_request_irq(unsigned int,
0d84438d 488 irqreturn_t (*)(int, void *),
1da177e4
LT
489 unsigned long, const char *, void *);
490 return sun4d_request_irq(irq, handler, irqflags, devname, dev_id);
491 }
492 cpu_irq = irq & (NR_IRQS - 1);
493 if(cpu_irq > 14) {
494 ret = -EINVAL;
495 goto out;
496 }
497 if (!handler) {
498 ret = -EINVAL;
499 goto out;
500 }
501
502 spin_lock_irqsave(&irq_action_lock, flags);
503
a54123e2
BB
504 actionp = &sparc_irq[cpu_irq].action;
505 action = *actionp;
1da177e4 506 if (action) {
67413202 507 if (!(action->flags & IRQF_SHARED) || !(irqflags & IRQF_SHARED)) {
1da177e4
LT
508 ret = -EBUSY;
509 goto out_unlock;
510 }
67413202 511 if ((action->flags & IRQF_DISABLED) != (irqflags & IRQF_DISABLED)) {
1da177e4
LT
512 printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
513 ret = -EBUSY;
514 goto out_unlock;
a54123e2
BB
515 }
516 for ( ; action; action = *actionp)
517 actionp = &action->next;
1da177e4
LT
518 }
519
520 /* If this is flagged as statically allocated then we use our
521 * private struct which is never freed.
522 */
523 if (irqflags & SA_STATIC_ALLOC) {
524 if (static_irq_count < MAX_STATIC_ALLOC)
525 action = &static_irqaction[static_irq_count++];
526 else
527 printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname);
528 }
529
530 if (action == NULL)
531 action = (struct irqaction *)kmalloc(sizeof(struct irqaction),
532 GFP_ATOMIC);
533
534 if (!action) {
535 ret = -ENOMEM;
536 goto out_unlock;
537 }
538
539 action->handler = handler;
540 action->flags = irqflags;
541 cpus_clear(action->mask);
542 action->name = devname;
543 action->next = NULL;
544 action->dev_id = dev_id;
545
a54123e2 546 *actionp = action;
1da177e4
LT
547
548 enable_irq(irq);
549
550 ret = 0;
551out_unlock:
552 spin_unlock_irqrestore(&irq_action_lock, flags);
553out:
554 return ret;
555}
556
557EXPORT_SYMBOL(request_irq);
558
559/* We really don't need these at all on the Sparc. We only have
560 * stubs here because they are exported to modules.
561 */
562unsigned long probe_irq_on(void)
563{
564 return 0;
565}
566
567EXPORT_SYMBOL(probe_irq_on);
568
569int probe_irq_off(unsigned long mask)
570{
571 return 0;
572}
573
574EXPORT_SYMBOL(probe_irq_off);
575
576/* djhr
577 * This could probably be made indirect too and assigned in the CPU
578 * bits of the code. That would be much nicer I think and would also
579 * fit in with the idea of being able to tune your kernel for your machine
580 * by removing unrequired machine and device support.
581 *
582 */
583
584void __init init_IRQ(void)
585{
586 extern void sun4c_init_IRQ( void );
587 extern void sun4m_init_IRQ( void );
588 extern void sun4d_init_IRQ( void );
589
590 switch(sparc_cpu_model) {
591 case sun4c:
592 case sun4:
593 sun4c_init_IRQ();
594 break;
595
596 case sun4m:
597#ifdef CONFIG_PCI
598 pcic_probe();
599 if (pcic_present()) {
600 sun4m_pci_init_IRQ();
601 break;
602 }
603#endif
604 sun4m_init_IRQ();
605 break;
606
607 case sun4d:
608 sun4d_init_IRQ();
609 break;
610
611 default:
612 prom_printf("Cannot initialize IRQ's on this Sun machine...");
613 break;
614 }
615 btfixup();
616}
617
618void init_irq_proc(void)
619{
620 /* For now, nothing... */
621}
This page took 0.17489 seconds and 5 git commands to generate.