Commit | Line | Data |
---|---|---|
5213a780 KE |
1 | /* |
2 | * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB | |
3 | * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB | |
4 | */ | |
5 | ||
6 | #include <linux/kernel.h> | |
7 | #include <linux/module.h> | |
8 | #include <linux/errno.h> | |
9 | #include <linux/mutex.h> | |
5213a780 KE |
10 | #include <linux/of.h> |
11 | #include <linux/of_platform.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/of_device.h> | |
8401707f | 14 | |
5213a780 KE |
15 | #include <asm/oplib.h> |
16 | #include <asm/timer.h> | |
17 | #include <asm/prom.h> | |
18 | #include <asm/leon.h> | |
19 | #include <asm/leon_amba.h> | |
8401707f KE |
20 | #include <asm/traps.h> |
21 | #include <asm/cacheflush.h> | |
5213a780 KE |
22 | |
23 | #include "prom.h" | |
24 | #include "irq.h" | |
25 | ||
53aea7ca DH |
26 | struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */ |
27 | struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */ | |
5213a780 KE |
28 | struct amba_apb_device leon_percpu_timer_dev[16]; |
29 | ||
30 | int leondebug_irq_disable; | |
31 | int leon_debug_irqout; | |
32 | static int dummy_master_l10_counter; | |
7279b82c | 33 | unsigned long amba_system_id; |
5213a780 | 34 | |
53aea7ca | 35 | unsigned long leon3_gptimer_irq; /* interrupt controller irq number */ |
2791c1a4 | 36 | unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */ |
5213a780 KE |
37 | unsigned int sparc_leon_eirq; |
38 | #define LEON_IMASK ((&leon3_irqctrl_regs->mask[0])) | |
39 | ||
40 | /* Return the IRQ of the pending IRQ on the extended IRQ controller */ | |
41 | int sparc_leon_eirq_get(int eirq, int cpu) | |
42 | { | |
43 | return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f; | |
44 | } | |
45 | ||
46 | irqreturn_t sparc_leon_eirq_isr(int dummy, void *dev_id) | |
47 | { | |
48 | printk(KERN_ERR "sparc_leon_eirq_isr: ERROR EXTENDED IRQ\n"); | |
49 | return IRQ_HANDLED; | |
50 | } | |
51 | ||
52 | /* The extended IRQ controller has been found, this function registers it */ | |
53 | void sparc_leon_eirq_register(int eirq) | |
54 | { | |
55 | int irq; | |
56 | ||
57 | /* Register a "BAD" handler for this interrupt, it should never happen */ | |
58 | irq = request_irq(eirq, sparc_leon_eirq_isr, | |
59 | (IRQF_DISABLED | SA_STATIC_ALLOC), "extirq", NULL); | |
60 | ||
61 | if (irq) { | |
62 | printk(KERN_ERR | |
63 | "sparc_leon_eirq_register: unable to attach IRQ%d\n", | |
64 | eirq); | |
65 | } else { | |
66 | sparc_leon_eirq = eirq; | |
67 | } | |
68 | ||
69 | } | |
70 | ||
71 | static inline unsigned long get_irqmask(unsigned int irq) | |
72 | { | |
73 | unsigned long mask; | |
74 | ||
75 | if (!irq || ((irq > 0xf) && !sparc_leon_eirq) | |
76 | || ((irq > 0x1f) && sparc_leon_eirq)) { | |
77 | printk(KERN_ERR | |
78 | "leon_get_irqmask: false irq number: %d\n", irq); | |
79 | mask = 0; | |
80 | } else { | |
81 | mask = LEON_HARD_INT(irq); | |
82 | } | |
83 | return mask; | |
84 | } | |
85 | ||
86 | static void leon_enable_irq(unsigned int irq_nr) | |
87 | { | |
88 | unsigned long mask, flags; | |
89 | mask = get_irqmask(irq_nr); | |
90 | local_irq_save(flags); | |
91 | LEON3_BYPASS_STORE_PA(LEON_IMASK, | |
92 | (LEON3_BYPASS_LOAD_PA(LEON_IMASK) | (mask))); | |
93 | local_irq_restore(flags); | |
94 | } | |
95 | ||
96 | static void leon_disable_irq(unsigned int irq_nr) | |
97 | { | |
98 | unsigned long mask, flags; | |
99 | mask = get_irqmask(irq_nr); | |
100 | local_irq_save(flags); | |
101 | LEON3_BYPASS_STORE_PA(LEON_IMASK, | |
102 | (LEON3_BYPASS_LOAD_PA(LEON_IMASK) & ~(mask))); | |
103 | local_irq_restore(flags); | |
104 | ||
105 | } | |
106 | ||
107 | void __init leon_init_timers(irq_handler_t counter_fn) | |
108 | { | |
109 | int irq; | |
2791c1a4 | 110 | struct device_node *rootnp, *np, *nnp; |
53aea7ca DH |
111 | struct property *pp; |
112 | int len; | |
e2305e37 | 113 | int cpu, icsel; |
2791c1a4 | 114 | int ampopts; |
5213a780 KE |
115 | |
116 | leondebug_irq_disable = 0; | |
117 | leon_debug_irqout = 0; | |
118 | master_l10_counter = (unsigned int *)&dummy_master_l10_counter; | |
119 | dummy_master_l10_counter = 0; | |
120 | ||
53aea7ca DH |
121 | rootnp = of_find_node_by_path("/ambapp0"); |
122 | if (!rootnp) | |
123 | goto bad; | |
7279b82c DH |
124 | |
125 | /* Find System ID: GRLIB build ID and optional CHIP ID */ | |
126 | pp = of_find_property(rootnp, "systemid", &len); | |
127 | if (pp) | |
128 | amba_system_id = *(unsigned long *)pp->value; | |
129 | ||
130 | /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */ | |
53aea7ca | 131 | np = of_find_node_by_name(rootnp, "GAISLER_IRQMP"); |
9742e72c DH |
132 | if (!np) { |
133 | np = of_find_node_by_name(rootnp, "01_00d"); | |
134 | if (!np) | |
135 | goto bad; | |
136 | } | |
53aea7ca DH |
137 | pp = of_find_property(np, "reg", &len); |
138 | if (!pp) | |
139 | goto bad; | |
140 | leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value; | |
141 | ||
142 | /* Find GPTIMER Timer Registers base address otherwise bail out. */ | |
2791c1a4 DH |
143 | nnp = rootnp; |
144 | do { | |
145 | np = of_find_node_by_name(nnp, "GAISLER_GPTIMER"); | |
146 | if (!np) { | |
147 | np = of_find_node_by_name(nnp, "01_011"); | |
148 | if (!np) | |
149 | goto bad; | |
150 | } | |
151 | ||
152 | ampopts = 0; | |
153 | pp = of_find_property(np, "ampopts", &len); | |
154 | if (pp) { | |
155 | ampopts = *(int *)pp->value; | |
156 | if (ampopts == 0) { | |
157 | /* Skip this instance, resource already | |
158 | * allocated by other OS */ | |
159 | nnp = np; | |
160 | continue; | |
161 | } | |
162 | } | |
163 | ||
164 | /* Select Timer-Instance on Timer Core. Default is zero */ | |
165 | leon3_gptimer_idx = ampopts & 0x7; | |
166 | ||
167 | pp = of_find_property(np, "reg", &len); | |
168 | if (pp) | |
169 | leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **) | |
170 | pp->value; | |
171 | pp = of_find_property(np, "interrupts", &len); | |
172 | if (pp) | |
173 | leon3_gptimer_irq = *(unsigned int *)pp->value; | |
174 | } while (0); | |
53aea7ca DH |
175 | |
176 | if (leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq) { | |
2791c1a4 DH |
177 | LEON3_BYPASS_STORE_PA( |
178 | &leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0); | |
179 | LEON3_BYPASS_STORE_PA( | |
180 | &leon3_gptimer_regs->e[leon3_gptimer_idx].rld, | |
181 | (((1000000 / HZ) - 1))); | |
182 | LEON3_BYPASS_STORE_PA( | |
183 | &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0); | |
5213a780 | 184 | |
8401707f KE |
185 | #ifdef CONFIG_SMP |
186 | leon_percpu_timer_dev[0].start = (int)leon3_gptimer_regs; | |
2791c1a4 DH |
187 | leon_percpu_timer_dev[0].irq = leon3_gptimer_irq + 1 + |
188 | leon3_gptimer_idx; | |
8401707f KE |
189 | |
190 | if (!(LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config) & | |
191 | (1<<LEON3_GPTIMER_SEPIRQ))) { | |
0da2b300 | 192 | prom_printf("irq timer not configured with separate irqs\n"); |
8401707f KE |
193 | BUG(); |
194 | } | |
195 | ||
2791c1a4 DH |
196 | LEON3_BYPASS_STORE_PA( |
197 | &leon3_gptimer_regs->e[leon3_gptimer_idx+1].val, 0); | |
198 | LEON3_BYPASS_STORE_PA( | |
199 | &leon3_gptimer_regs->e[leon3_gptimer_idx+1].rld, | |
200 | (((1000000/HZ) - 1))); | |
201 | LEON3_BYPASS_STORE_PA( | |
202 | &leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl, 0); | |
8401707f KE |
203 | # endif |
204 | ||
e2305e37 DH |
205 | /* |
206 | * The IRQ controller may (if implemented) consist of multiple | |
207 | * IRQ controllers, each mapped on a 4Kb boundary. | |
208 | * Each CPU may be routed to different IRQCTRLs, however | |
209 | * we assume that all CPUs (in SMP system) is routed to the | |
210 | * same IRQ Controller, and for non-SMP only one IRQCTRL is | |
211 | * accessed anyway. | |
212 | * In AMP systems, Linux must run on CPU0 for the time being. | |
213 | */ | |
214 | cpu = sparc_leon3_cpuid(); | |
215 | icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[cpu/8]); | |
216 | icsel = (icsel >> ((7 - (cpu&0x7)) * 4)) & 0xf; | |
217 | leon3_irqctrl_regs += icsel; | |
5213a780 | 218 | } else { |
53aea7ca | 219 | goto bad; |
5213a780 KE |
220 | } |
221 | ||
2791c1a4 | 222 | irq = request_irq(leon3_gptimer_irq+leon3_gptimer_idx, |
5213a780 KE |
223 | counter_fn, |
224 | (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL); | |
225 | ||
226 | if (irq) { | |
227 | printk(KERN_ERR "leon_time_init: unable to attach IRQ%d\n", | |
228 | LEON_INTERRUPT_TIMER1); | |
229 | prom_halt(); | |
230 | } | |
231 | ||
8401707f KE |
232 | # ifdef CONFIG_SMP |
233 | { | |
234 | unsigned long flags; | |
235 | struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (leon_percpu_timer_dev[0].irq - 1)]; | |
236 | ||
237 | /* For SMP we use the level 14 ticker, however the bootup code | |
238 | * has copied the firmwares level 14 vector into boot cpu's | |
239 | * trap table, we must fix this now or we get squashed. | |
240 | */ | |
241 | local_irq_save(flags); | |
242 | ||
243 | patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */ | |
244 | ||
245 | /* Adjust so that we jump directly to smpleon_ticker */ | |
246 | trap_table->inst_three += smpleon_ticker - real_irq_entry; | |
247 | ||
248 | local_flush_cache_all(); | |
249 | local_irq_restore(flags); | |
250 | } | |
251 | # endif | |
252 | ||
5213a780 | 253 | if (leon3_gptimer_regs) { |
2791c1a4 | 254 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, |
5213a780 KE |
255 | LEON3_GPTIMER_EN | |
256 | LEON3_GPTIMER_RL | | |
257 | LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN); | |
8401707f KE |
258 | |
259 | #ifdef CONFIG_SMP | |
2791c1a4 | 260 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl, |
8401707f KE |
261 | LEON3_GPTIMER_EN | |
262 | LEON3_GPTIMER_RL | | |
263 | LEON3_GPTIMER_LD | | |
264 | LEON3_GPTIMER_IRQEN); | |
265 | #endif | |
266 | ||
5213a780 | 267 | } |
53aea7ca DH |
268 | return; |
269 | bad: | |
270 | printk(KERN_ERR "No Timer/irqctrl found\n"); | |
271 | BUG(); | |
272 | return; | |
5213a780 KE |
273 | } |
274 | ||
275 | void leon_clear_clock_irq(void) | |
276 | { | |
277 | } | |
278 | ||
279 | void leon_load_profile_irq(int cpu, unsigned int limit) | |
280 | { | |
281 | BUG(); | |
282 | } | |
283 | ||
284 | ||
285 | ||
286 | ||
287 | void __init leon_trans_init(struct device_node *dp) | |
288 | { | |
289 | if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) { | |
290 | struct property *p; | |
291 | p = of_find_property(dp, "mid", (void *)0); | |
292 | if (p) { | |
293 | int mid; | |
294 | dp->name = prom_early_alloc(5 + 1); | |
295 | memcpy(&mid, p->value, p->length); | |
296 | sprintf((char *)dp->name, "cpu%.2d", mid); | |
297 | } | |
298 | } | |
299 | } | |
300 | ||
301 | void __initdata (*prom_amba_init)(struct device_node *dp, struct device_node ***nextp) = 0; | |
302 | ||
303 | void __init leon_node_init(struct device_node *dp, struct device_node ***nextp) | |
304 | { | |
305 | if (prom_amba_init && | |
306 | strcmp(dp->type, "ambapp") == 0 && | |
307 | strcmp(dp->name, "ambapp0") == 0) { | |
308 | prom_amba_init(dp, nextp); | |
309 | } | |
310 | } | |
311 | ||
8401707f KE |
312 | #ifdef CONFIG_SMP |
313 | ||
314 | void leon_set_cpu_int(int cpu, int level) | |
315 | { | |
316 | unsigned long mask; | |
317 | mask = get_irqmask(level); | |
318 | LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->force[cpu], mask); | |
319 | } | |
320 | ||
321 | static void leon_clear_ipi(int cpu, int level) | |
322 | { | |
323 | unsigned long mask; | |
324 | mask = get_irqmask(level); | |
325 | LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->force[cpu], mask<<16); | |
326 | } | |
327 | ||
328 | static void leon_set_udt(int cpu) | |
329 | { | |
330 | } | |
331 | ||
332 | void leon_clear_profile_irq(int cpu) | |
333 | { | |
334 | } | |
335 | ||
336 | void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu) | |
337 | { | |
338 | unsigned long mask, flags, *addr; | |
339 | mask = get_irqmask(irq_nr); | |
340 | local_irq_save(flags); | |
341 | addr = (unsigned long *)&(leon3_irqctrl_regs->mask[cpu]); | |
342 | LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | (mask))); | |
343 | local_irq_restore(flags); | |
344 | } | |
345 | ||
346 | #endif | |
347 | ||
5213a780 KE |
348 | void __init leon_init_IRQ(void) |
349 | { | |
bbdc2661 | 350 | sparc_irq_config.init_timers = leon_init_timers; |
5213a780 KE |
351 | |
352 | BTFIXUPSET_CALL(enable_irq, leon_enable_irq, BTFIXUPCALL_NORM); | |
353 | BTFIXUPSET_CALL(disable_irq, leon_disable_irq, BTFIXUPCALL_NORM); | |
354 | BTFIXUPSET_CALL(enable_pil_irq, leon_enable_irq, BTFIXUPCALL_NORM); | |
355 | BTFIXUPSET_CALL(disable_pil_irq, leon_disable_irq, BTFIXUPCALL_NORM); | |
356 | ||
357 | BTFIXUPSET_CALL(clear_clock_irq, leon_clear_clock_irq, | |
358 | BTFIXUPCALL_NORM); | |
359 | BTFIXUPSET_CALL(load_profile_irq, leon_load_profile_irq, | |
360 | BTFIXUPCALL_NOP); | |
361 | ||
362 | #ifdef CONFIG_SMP | |
363 | BTFIXUPSET_CALL(set_cpu_int, leon_set_cpu_int, BTFIXUPCALL_NORM); | |
364 | BTFIXUPSET_CALL(clear_cpu_int, leon_clear_ipi, BTFIXUPCALL_NORM); | |
365 | BTFIXUPSET_CALL(set_irq_udt, leon_set_udt, BTFIXUPCALL_NORM); | |
366 | #endif | |
367 | ||
368 | } | |
369 | ||
370 | void __init leon_init(void) | |
371 | { | |
ed418502 | 372 | of_pdt_build_more = &leon_node_init; |
5213a780 | 373 | } |