[deliverable/linux.git] / arch / sparc / kernel / leon_kernel.c

/*
 * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
 * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
 */

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/interrupt.h>
#include <linux/of_device.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>

#include <asm/oplib.h>
#include <asm/timer.h>
#include <asm/prom.h>
#include <asm/leon.h>
#include <asm/leon_amba.h>
#include <asm/traps.h>
#include <asm/cacheflush.h>
#include <asm/smp.h>
#include <asm/setup.h>

#include "prom.h"
#include "irq.h"

struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */
struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */

int leondebug_irq_disable;
int leon_debug_irqout;
static int dummy_master_l10_counter;
unsigned long amba_system_id;
static DEFINE_SPINLOCK(leon_irq_lock);

unsigned long leon3_gptimer_irq; /* interrupt controller irq number */
unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */
int leon3_ticker_irq; /* Timer ticker IRQ */
unsigned int sparc_leon_eirq;
#define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
#define LEON_IACK (&leon3_irqctrl_regs->iclear)
#define LEON_DO_ACK_HW 1

/* Return the last ACKed IRQ by the Extended IRQ controller. It has already
 * been (automatically) ACKed when the CPU takes the trap.
 */
static inline unsigned int leon_eirq_get(int cpu)
{
	return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f;
}

/* Handle one or multiple IRQs from the extended interrupt controller */
static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
{
	unsigned int eirq;
	int cpu = sparc_leon3_cpuid();

	eirq = leon_eirq_get(cpu);
	if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */
		generic_handle_irq(irq_map[eirq]->irq);
}

/* The extended IRQ controller has been found, this function registers it */
void leon_eirq_setup(unsigned int eirq)
{
	unsigned long mask, oldmask;
	unsigned int veirq;

	if (eirq < 1 || eirq > 0xf) {
		printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq);
		return;
	}

	veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0);

	/*
	 * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
	 * controller have a mask-bit of their own, so this is safe.
	 */
	irq_link(veirq);
	mask = 1 << eirq;
	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id));
	LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask));
	sparc_leon_eirq = eirq;
}

unsigned long leon_get_irqmask(unsigned int irq)
{
	unsigned long mask;

	if (!irq || ((irq > 0xf) && !sparc_leon_eirq)
	    || ((irq > 0x1f) && sparc_leon_eirq)) {
		printk(KERN_ERR
		       "leon_get_irqmask: false irq number: %d\n", irq);
		mask = 0;
	} else {
		mask = LEON_HARD_INT(irq);
	}
	return mask;
}

#ifdef CONFIG_SMP
static int irq_choose_cpu(const struct cpumask *affinity)
{
	cpumask_t mask;

	cpumask_and(&mask, cpu_online_mask, affinity);
	if (cpumask_equal(&mask, cpu_online_mask) || cpumask_empty(&mask))
		return boot_cpu_id;
	else
		return cpumask_first(&mask);
}
#else
#define irq_choose_cpu(affinity) boot_cpu_id
#endif

static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest,
			     bool force)
{
	unsigned long mask, oldmask, flags;
	int oldcpu, newcpu;

	mask = (unsigned long)data->chip_data;
	oldcpu = irq_choose_cpu(data->affinity);
	newcpu = irq_choose_cpu(dest);

	if (oldcpu == newcpu)
		goto out;

	/* unmask on old CPU first before enabling on the selected CPU */
	spin_lock_irqsave(&leon_irq_lock, flags);
	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu));
	LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask));
	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu));
	LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask));
	spin_unlock_irqrestore(&leon_irq_lock, flags);
out:
	return IRQ_SET_MASK_OK;
}

static void leon_unmask_irq(struct irq_data *data)
{
	unsigned long mask, oldmask, flags;
	int cpu;

	mask = (unsigned long)data->chip_data;
	cpu = irq_choose_cpu(data->affinity);
	spin_lock_irqsave(&leon_irq_lock, flags);
	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
	LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask));
	spin_unlock_irqrestore(&leon_irq_lock, flags);
}

static void leon_mask_irq(struct irq_data *data)
{
	unsigned long mask, oldmask, flags;
	int cpu;

	mask = (unsigned long)data->chip_data;
	cpu = irq_choose_cpu(data->affinity);
	spin_lock_irqsave(&leon_irq_lock, flags);
	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
	LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask));
	spin_unlock_irqrestore(&leon_irq_lock, flags);
}

static unsigned int leon_startup_irq(struct irq_data *data)
{
	irq_link(data->irq);
	leon_unmask_irq(data);
	return 0;
}

static void leon_shutdown_irq(struct irq_data *data)
{
	leon_mask_irq(data);
	irq_unlink(data->irq);
}

/* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */
static void leon_eoi_irq(struct irq_data *data)
{
	unsigned long mask = (unsigned long)data->chip_data;

	if (mask & LEON_DO_ACK_HW)
		LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW);
}

static struct irq_chip leon_irq = {
	.name			= "leon",
	.irq_startup		= leon_startup_irq,
	.irq_shutdown		= leon_shutdown_irq,
	.irq_mask		= leon_mask_irq,
	.irq_unmask		= leon_unmask_irq,
	.irq_eoi		= leon_eoi_irq,
	.irq_set_affinity	= leon_set_affinity,
};

/*
 * Build a LEON IRQ for the edge triggered LEON IRQ controller:
 *  Edge (normal) IRQ           - handle_simple_irq, ack=DONT-CARE, never ack
 *  Level IRQ (PCI|Level-GPIO)  - handle_fasteoi_irq, ack=1, ack after ISR
 *  Per-CPU Edge                - handle_percpu_irq, ack=0
 */
unsigned int leon_build_device_irq(unsigned int real_irq,
				    irq_flow_handler_t flow_handler,
				    const char *name, int do_ack)
{
	unsigned int irq;
	unsigned long mask;

	irq = 0;
	mask = leon_get_irqmask(real_irq);
	if (mask == 0)
		goto out;

	irq = irq_alloc(real_irq, real_irq);
	if (irq == 0)
		goto out;

	if (do_ack)
		mask |= LEON_DO_ACK_HW;

	irq_set_chip_and_handler_name(irq, &leon_irq,
				      flow_handler, name);
	irq_set_chip_data(irq, (void *)mask);

out:
	return irq;
}

static unsigned int _leon_build_device_irq(struct platform_device *op,
					   unsigned int real_irq)
{
	return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0);
}

void leon_update_virq_handling(unsigned int virq,
			      irq_flow_handler_t flow_handler,
			      const char *name, int do_ack)
{
	unsigned long mask = (unsigned long)irq_get_chip_data(virq);

	mask &= ~LEON_DO_ACK_HW;
	if (do_ack)
		mask |= LEON_DO_ACK_HW;

	irq_set_chip_and_handler_name(virq, &leon_irq,
				      flow_handler, name);
	irq_set_chip_data(virq, (void *)mask);
}

static u32 leon_cycles_offset(void)
{
	u32 rld, val, off;
	rld = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld);
	val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val);
	off = rld - val;
	return rld - val;
}

#ifdef CONFIG_SMP

/* smp clockevent irq */
irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused)
{
	struct clock_event_device *ce;
	int cpu = smp_processor_id();

	leon_clear_profile_irq(cpu);

	ce = &per_cpu(sparc32_clockevent, cpu);

	irq_enter();
	if (ce->event_handler)
		ce->event_handler(ce);
	irq_exit();

	return IRQ_HANDLED;
}

#endif /* CONFIG_SMP */

void __init leon_init_timers(void)
{
	int irq, eirq;
	struct device_node *rootnp, *np, *nnp;
	struct property *pp;
	int len;
	int icsel;
	int ampopts;
	int err;

	sparc_config.get_cycles_offset = leon_cycles_offset;
	sparc_config.cs_period = 1000000 / HZ;
	sparc_config.features |= FEAT_L10_CLOCKSOURCE;

#ifndef CONFIG_SMP
	sparc_config.features |= FEAT_L10_CLOCKEVENT;
#endif

	leondebug_irq_disable = 0;
	leon_debug_irqout = 0;
	master_l10_counter = (unsigned int *)&dummy_master_l10_counter;
	dummy_master_l10_counter = 0;

	rootnp = of_find_node_by_path("/ambapp0");
	if (!rootnp)
		goto bad;

	/* Find System ID: GRLIB build ID and optional CHIP ID */
	pp = of_find_property(rootnp, "systemid", &len);
	if (pp)
		amba_system_id = *(unsigned long *)pp->value;

	/* Find IRQMP IRQ Controller Registers base adr otherwise bail out */
	np = of_find_node_by_name(rootnp, "GAISLER_IRQMP");
	if (!np) {
		np = of_find_node_by_name(rootnp, "01_00d");
		if (!np)
			goto bad;
	}
	pp = of_find_property(np, "reg", &len);
	if (!pp)
		goto bad;
	leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value;

	/* Find GPTIMER Timer Registers base address otherwise bail out. */
	nnp = rootnp;
	do {
		np = of_find_node_by_name(nnp, "GAISLER_GPTIMER");
		if (!np) {
			np = of_find_node_by_name(nnp, "01_011");
			if (!np)
				goto bad;
		}

		ampopts = 0;
		pp = of_find_property(np, "ampopts", &len);
		if (pp) {
			ampopts = *(int *)pp->value;
			if (ampopts == 0) {
				/* Skip this instance, resource already
				 * allocated by other OS */
				nnp = np;
				continue;
			}
		}

		/* Select Timer-Instance on Timer Core. Default is zero */
		leon3_gptimer_idx = ampopts & 0x7;

		pp = of_find_property(np, "reg", &len);
		if (pp)
			leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **)
						pp->value;
		pp = of_find_property(np, "interrupts", &len);
		if (pp)
			leon3_gptimer_irq = *(unsigned int *)pp->value;
	} while (0);

	if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq))
		goto bad;

	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0);
	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld,
				(((1000000 / HZ) - 1)));
	LEON3_BYPASS_STORE_PA(
			&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0);

#ifdef CONFIG_SMP
	leon3_ticker_irq = leon3_gptimer_irq + 1 + leon3_gptimer_idx;

	if (!(LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config) &
	      (1<<LEON3_GPTIMER_SEPIRQ))) {
		printk(KERN_ERR "timer not configured with separate irqs\n");
		BUG();
	}

	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].val,
				0);
	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].rld,
				(((1000000/HZ) - 1)));
	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl,
				0);
#endif

	/*
	 * The IRQ controller may (if implemented) consist of multiple
	 * IRQ controllers, each mapped on a 4Kb boundary.
	 * Each CPU may be routed to different IRQCTRLs, however
	 * we assume that all CPUs (in SMP system) is routed to the
	 * same IRQ Controller, and for non-SMP only one IRQCTRL is
	 * accessed anyway.
	 * In AMP systems, Linux must run on CPU0 for the time being.
	 */
	icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]);
	icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf;
	leon3_irqctrl_regs += icsel;

	/* Mask all IRQs on boot-cpu IRQ controller */
	LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0);

	/* Probe extended IRQ controller */
	eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus)
		>> 16) & 0xf;
	if (eirq != 0)
		leon_eirq_setup(eirq);

	irq = _leon_build_device_irq(NULL, leon3_gptimer_irq+leon3_gptimer_idx);
	err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);
	if (err) {
		printk(KERN_ERR "unable to attach timer IRQ%d\n", irq);
		prom_halt();
	}

#ifdef CONFIG_SMP
	{
		unsigned long flags;

		/*
		 * In SMP, sun4m adds a IPI handler to IRQ trap handler that
		 * LEON never must take, sun4d and LEON overwrites the branch
		 * with a NOP.
		 */
		local_irq_save(flags);
		patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
		local_ops->cache_all();
		local_irq_restore(flags);
	}
#endif

	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
			      LEON3_GPTIMER_EN |
			      LEON3_GPTIMER_RL |
			      LEON3_GPTIMER_LD |
			      LEON3_GPTIMER_IRQEN);

#ifdef CONFIG_SMP
	/* Install per-cpu IRQ handler for broadcasted ticker */
	irq = leon_build_device_irq(leon3_ticker_irq, handle_percpu_irq,
				    "per-cpu", 0);
	err = request_irq(irq, leon_percpu_timer_ce_interrupt,
			  IRQF_PERCPU | IRQF_TIMER, "ticker",
			  NULL);
	if (err) {
		printk(KERN_ERR "unable to attach ticker IRQ%d\n", irq);
		prom_halt();
	}

	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl,
			      LEON3_GPTIMER_EN |
			      LEON3_GPTIMER_RL |
			      LEON3_GPTIMER_LD |
			      LEON3_GPTIMER_IRQEN);
#endif
	return;
bad:
	printk(KERN_ERR "No Timer/irqctrl found\n");
	BUG();
	return;
}

static void leon_clear_clock_irq(void)
{
}

static void leon_load_profile_irq(int cpu, unsigned int limit)
{
}

void __init leon_trans_init(struct device_node *dp)
{
	if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) {
		struct property *p;
		p = of_find_property(dp, "mid", (void *)0);
		if (p) {
			int mid;
			dp->name = prom_early_alloc(5 + 1);
			memcpy(&mid, p->value, p->length);
			sprintf((char *)dp->name, "cpu%.2d", mid);
		}
	}
}

void __initdata (*prom_amba_init)(struct device_node *dp, struct device_node ***nextp) = 0;

void __init leon_node_init(struct device_node *dp, struct device_node ***nextp)
{
	if (prom_amba_init &&
	    strcmp(dp->type, "ambapp") == 0 &&
	    strcmp(dp->name, "ambapp0") == 0) {
		prom_amba_init(dp, nextp);
	}
}

#ifdef CONFIG_SMP
void leon_clear_profile_irq(int cpu)
{
}

void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)
{
	unsigned long mask, flags, *addr;
	mask = leon_get_irqmask(irq_nr);
	spin_lock_irqsave(&leon_irq_lock, flags);
	addr = (unsigned long *)LEON_IMASK(cpu);
	LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask));
	spin_unlock_irqrestore(&leon_irq_lock, flags);
}

#endif

void __init leon_init_IRQ(void)
{
	sparc_config.init_timers      = leon_init_timers;
	sparc_config.build_device_irq = _leon_build_device_irq;
	sparc_config.clock_rate       = 1000000;
	sparc_config.clear_clock_irq  = leon_clear_clock_irq;
	sparc_config.load_profile_irq = leon_load_profile_irq;
}

void __init leon_init(void)
{
	of_pdt_build_more = &leon_node_init;
}
Commit	Line	Data
5213a780 KE	1	/*
	2	* Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
	3	* Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
	4	*/
	5
	6	#include <linux/kernel.h>
5213a780 KE	7	#include <linux/errno.h>
5213a780 KE	8	#include <linux/mutex.h>
5213a780 KE	9	#include <linux/of.h>
	10	#include <linux/of_platform.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/of_device.h>
62f08283 TK	13	#include <linux/clocksource.h>
62f08283 TK	14	#include <linux/clockchips.h>
8401707f	15
5213a780 KE	16	#include <asm/oplib.h>
	17	#include <asm/timer.h>
	18	#include <asm/prom.h>
	19	#include <asm/leon.h>
	20	#include <asm/leon_amba.h>
8401707f KE	21	#include <asm/traps.h>
8401707f KE	22	#include <asm/cacheflush.h>
4c6773c3	23	#include <asm/smp.h>
01dae0f0	24	#include <asm/setup.h>
5213a780 KE	25
	26	#include "prom.h"
	27	#include "irq.h"
	28
53aea7ca DH	29	struct leon3_irqctrl_regs_map leon3_irqctrl_regs; / interrupt controller base address */
53aea7ca DH	30	struct leon3_gptimer_regs_map leon3_gptimer_regs; / timer controller base address */
5213a780 KE	31
	32	int leondebug_irq_disable;
	33	int leon_debug_irqout;
	34	static int dummy_master_l10_counter;
7279b82c	35	unsigned long amba_system_id;
d61a38b2	36	static DEFINE_SPINLOCK(leon_irq_lock);
5213a780	37
53aea7ca	38	unsigned long leon3_gptimer_irq; /* interrupt controller irq number */
2791c1a4	39	unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */
2cf95304	40	int leon3_ticker_irq; /* Timer ticker IRQ */
5213a780	41	unsigned int sparc_leon_eirq;
a481b5d0	42	#define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
4c6773c3 DH	43	#define LEON_IACK (&leon3_irqctrl_regs->iclear)
4c6773c3 DH	44	#define LEON_DO_ACK_HW 1
5213a780	45
4c6773c3 DH	46	/* Return the last ACKed IRQ by the Extended IRQ controller. It has already
	47	* been (automatically) ACKed when the CPU takes the trap.
	48	*/
	49	static inline unsigned int leon_eirq_get(int cpu)
5213a780 KE	50	{
	51	return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f;
	52	}
	53
4c6773c3 DH	54	/* Handle one or multiple IRQs from the extended interrupt controller */
4c6773c3 DH	55	static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
5213a780	56	{
4c6773c3	57	unsigned int eirq;
01dae0f0	58	int cpu = sparc_leon3_cpuid();
4c6773c3 DH	59
	60	eirq = leon_eirq_get(cpu);
	61	if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */
	62	generic_handle_irq(irq_map[eirq]->irq);
5213a780 KE	63	}
	64
	65	/* The extended IRQ controller has been found, this function registers it */
4c6773c3	66	void leon_eirq_setup(unsigned int eirq)
5213a780	67	{
4c6773c3 DH	68	unsigned long mask, oldmask;
4c6773c3 DH	69	unsigned int veirq;
5213a780	70
4c6773c3 DH	71	if (eirq < 1 \|\| eirq > 0xf) {
	72	printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq);
	73	return;
5213a780 KE	74	}
5213a780 KE	75
4c6773c3 DH	76	veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0);
	77
	78	/*
	79	* Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
	80	* controller have a mask-bit of their own, so this is safe.
	81	*/
	82	irq_link(veirq);
	83	mask = 1 << eirq;
01dae0f0 DH	84	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id));
01dae0f0 DH	85	LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask \| mask));
4c6773c3	86	sparc_leon_eirq = eirq;
5213a780 KE	87	}
5213a780 KE	88
4ba22b16	89	unsigned long leon_get_irqmask(unsigned int irq)
5213a780 KE	90	{
	91	unsigned long mask;
	92
	93	if (!irq \|\| ((irq > 0xf) && !sparc_leon_eirq)
	94	\|\| ((irq > 0x1f) && sparc_leon_eirq)) {
	95	printk(KERN_ERR
	96	"leon_get_irqmask: false irq number: %d\n", irq);
	97	mask = 0;
	98	} else {
	99	mask = LEON_HARD_INT(irq);
	100	}
	101	return mask;
	102	}
	103
5eb1f4fc DH	104	#ifdef CONFIG_SMP
	105	static int irq_choose_cpu(const struct cpumask *affinity)
	106	{
	107	cpumask_t mask;
	108
0b5f9c00 RR	109	cpumask_and(&mask, cpu_online_mask, affinity);
0b5f9c00 RR	110	if (cpumask_equal(&mask, cpu_online_mask) \|\| cpumask_empty(&mask))
01dae0f0	111	return boot_cpu_id;
5eb1f4fc	112	else
0b5f9c00	113	return cpumask_first(&mask);
5eb1f4fc DH	114	}
5eb1f4fc DH	115	#else
01dae0f0	116	#define irq_choose_cpu(affinity) boot_cpu_id
5eb1f4fc DH	117	#endif
	118
	119	static int leon_set_affinity(struct irq_data data, const struct cpumask dest,
	120	bool force)
	121	{
	122	unsigned long mask, oldmask, flags;
	123	int oldcpu, newcpu;
	124
	125	mask = (unsigned long)data->chip_data;
	126	oldcpu = irq_choose_cpu(data->affinity);
	127	newcpu = irq_choose_cpu(dest);
	128
	129	if (oldcpu == newcpu)
	130	goto out;
	131
	132	/* unmask on old CPU first before enabling on the selected CPU */
	133	spin_lock_irqsave(&leon_irq_lock, flags);
	134	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu));
	135	LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask));
	136	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu));
	137	LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask \| mask));
	138	spin_unlock_irqrestore(&leon_irq_lock, flags);
	139	out:
	140	return IRQ_SET_MASK_OK;
	141	}
	142
6baa9b20	143	static void leon_unmask_irq(struct irq_data *data)
5213a780	144	{
a481b5d0	145	unsigned long mask, oldmask, flags;
5eb1f4fc	146	int cpu;
6baa9b20 SR	147
6baa9b20 SR	148	mask = (unsigned long)data->chip_data;
5eb1f4fc	149	cpu = irq_choose_cpu(data->affinity);
d61a38b2	150	spin_lock_irqsave(&leon_irq_lock, flags);
5eb1f4fc DH	151	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
5eb1f4fc DH	152	LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask \| mask));
d61a38b2	153	spin_unlock_irqrestore(&leon_irq_lock, flags);
5213a780 KE	154	}
5213a780 KE	155
6baa9b20	156	static void leon_mask_irq(struct irq_data *data)
5213a780	157	{
a481b5d0	158	unsigned long mask, oldmask, flags;
5eb1f4fc	159	int cpu;
6baa9b20 SR	160
6baa9b20 SR	161	mask = (unsigned long)data->chip_data;
5eb1f4fc	162	cpu = irq_choose_cpu(data->affinity);
d61a38b2	163	spin_lock_irqsave(&leon_irq_lock, flags);
5eb1f4fc DH	164	oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
5eb1f4fc DH	165	LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask));
d61a38b2	166	spin_unlock_irqrestore(&leon_irq_lock, flags);
5213a780 KE	167	}
5213a780 KE	168
6baa9b20 SR	169	static unsigned int leon_startup_irq(struct irq_data *data)
	170	{
	171	irq_link(data->irq);
	172	leon_unmask_irq(data);
	173	return 0;
	174	}
	175
	176	static void leon_shutdown_irq(struct irq_data *data)
	177	{
	178	leon_mask_irq(data);
	179	irq_unlink(data->irq);
	180	}
	181
4c6773c3 DH	182	/* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */
	183	static void leon_eoi_irq(struct irq_data *data)
	184	{
	185	unsigned long mask = (unsigned long)data->chip_data;
	186
	187	if (mask & LEON_DO_ACK_HW)
	188	LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW);
	189	}
	190
6baa9b20	191	static struct irq_chip leon_irq = {
5eb1f4fc DH	192	.name = "leon",
	193	.irq_startup = leon_startup_irq,
	194	.irq_shutdown = leon_shutdown_irq,
	195	.irq_mask = leon_mask_irq,
	196	.irq_unmask = leon_unmask_irq,
	197	.irq_eoi = leon_eoi_irq,
	198	.irq_set_affinity = leon_set_affinity,
6baa9b20 SR	199	};
6baa9b20 SR	200
4c6773c3 DH	201	/*
	202	* Build a LEON IRQ for the edge triggered LEON IRQ controller:
	203	* Edge (normal) IRQ - handle_simple_irq, ack=DONT-CARE, never ack
	204	* Level IRQ (PCI\|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR
	205	* Per-CPU Edge - handle_percpu_irq, ack=0
	206	*/
	207	unsigned int leon_build_device_irq(unsigned int real_irq,
	208	irq_flow_handler_t flow_handler,
	209	const char *name, int do_ack)
6baa9b20 SR	210	{
	211	unsigned int irq;
	212	unsigned long mask;
	213
	214	irq = 0;
4ba22b16	215	mask = leon_get_irqmask(real_irq);
6baa9b20 SR	216	if (mask == 0)
	217	goto out;
	218
	219	irq = irq_alloc(real_irq, real_irq);
	220	if (irq == 0)
	221	goto out;
	222
4c6773c3 DH	223	if (do_ack)
	224	mask \|= LEON_DO_ACK_HW;
	225
6baa9b20	226	irq_set_chip_and_handler_name(irq, &leon_irq,
4c6773c3	227	flow_handler, name);
6baa9b20 SR	228	irq_set_chip_data(irq, (void *)mask);
	229
	230	out:
	231	return irq;
	232	}
	233
4c6773c3 DH	234	static unsigned int _leon_build_device_irq(struct platform_device *op,
	235	unsigned int real_irq)
	236	{
	237	return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0);
	238	}
	239
5d07b786 DH	240	void leon_update_virq_handling(unsigned int virq,
	241	irq_flow_handler_t flow_handler,
	242	const char *name, int do_ack)
	243	{
	244	unsigned long mask = (unsigned long)irq_get_chip_data(virq);
	245
	246	mask &= ~LEON_DO_ACK_HW;
	247	if (do_ack)
	248	mask \|= LEON_DO_ACK_HW;
	249
	250	irq_set_chip_and_handler_name(virq, &leon_irq,
	251	flow_handler, name);
	252	irq_set_chip_data(virq, (void *)mask);
	253	}
	254
62f08283 TK	255	static u32 leon_cycles_offset(void)
	256	{
	257	u32 rld, val, off;
	258	rld = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld);
	259	val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val);
	260	off = rld - val;
	261	return rld - val;
	262	}
	263
	264	#ifdef CONFIG_SMP
	265
	266	/* smp clockevent irq */
	267	irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused)
	268	{
	269	struct clock_event_device *ce;
	270	int cpu = smp_processor_id();
	271
	272	leon_clear_profile_irq(cpu);
	273
	274	ce = &per_cpu(sparc32_clockevent, cpu);
	275
	276	irq_enter();
	277	if (ce->event_handler)
	278	ce->event_handler(ce);
	279	irq_exit();
	280
	281	return IRQ_HANDLED;
	282	}
	283
	284	#endif /* CONFIG_SMP */
	285
	286	void __init leon_init_timers(void)
5213a780	287	{
4c6773c3	288	int irq, eirq;
2791c1a4	289	struct device_node rootnp, np, *nnp;
53aea7ca DH	290	struct property *pp;
53aea7ca DH	291	int len;
01dae0f0	292	int icsel;
2791c1a4	293	int ampopts;
6baa9b20	294	int err;
5213a780	295
62f08283 TK	296	sparc_config.get_cycles_offset = leon_cycles_offset;
	297	sparc_config.cs_period = 1000000 / HZ;
	298	sparc_config.features \|= FEAT_L10_CLOCKSOURCE;
	299
	300	#ifndef CONFIG_SMP
	301	sparc_config.features \|= FEAT_L10_CLOCKEVENT;
	302	#endif
	303
5213a780 KE	304	leondebug_irq_disable = 0;
	305	leon_debug_irqout = 0;
	306	master_l10_counter = (unsigned int *)&dummy_master_l10_counter;
	307	dummy_master_l10_counter = 0;
	308
53aea7ca DH	309	rootnp = of_find_node_by_path("/ambapp0");
	310	if (!rootnp)
	311	goto bad;
7279b82c DH	312
	313	/* Find System ID: GRLIB build ID and optional CHIP ID */
	314	pp = of_find_property(rootnp, "systemid", &len);
	315	if (pp)
	316	amba_system_id = (unsigned long )pp->value;
	317
	318	/* Find IRQMP IRQ Controller Registers base adr otherwise bail out */
53aea7ca	319	np = of_find_node_by_name(rootnp, "GAISLER_IRQMP");
9742e72c DH	320	if (!np) {
	321	np = of_find_node_by_name(rootnp, "01_00d");
	322	if (!np)
	323	goto bad;
	324	}
53aea7ca DH	325	pp = of_find_property(np, "reg", &len);
	326	if (!pp)
	327	goto bad;
	328	leon3_irqctrl_regs = (struct leon3_irqctrl_regs_map *)pp->value;
	329
	330	/* Find GPTIMER Timer Registers base address otherwise bail out. */
2791c1a4 DH	331	nnp = rootnp;
	332	do {
	333	np = of_find_node_by_name(nnp, "GAISLER_GPTIMER");
	334	if (!np) {
	335	np = of_find_node_by_name(nnp, "01_011");
	336	if (!np)
	337	goto bad;
	338	}
	339
	340	ampopts = 0;
	341	pp = of_find_property(np, "ampopts", &len);
	342	if (pp) {
	343	ampopts = (int )pp->value;
	344	if (ampopts == 0) {
	345	/* Skip this instance, resource already
	346	* allocated by other OS */
	347	nnp = np;
	348	continue;
	349	}
	350	}
	351
	352	/* Select Timer-Instance on Timer Core. Default is zero */
	353	leon3_gptimer_idx = ampopts & 0x7;
	354
	355	pp = of_find_property(np, "reg", &len);
	356	if (pp)
	357	leon3_gptimer_regs = (struct leon3_gptimer_regs_map *)
	358	pp->value;
	359	pp = of_find_property(np, "interrupts", &len);
	360	if (pp)
	361	leon3_gptimer_irq = (unsigned int )pp->value;
	362	} while (0);
53aea7ca	363
a481b5d0 DH	364	if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq))
	365	goto bad;
	366
	367	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0);
	368	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld,
	369	(((1000000 / HZ) - 1)));
	370	LEON3_BYPASS_STORE_PA(
2791c1a4	371	&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0);
5213a780	372
8401707f	373	#ifdef CONFIG_SMP
a481b5d0	374	leon3_ticker_irq = leon3_gptimer_irq + 1 + leon3_gptimer_idx;
8401707f	375
a481b5d0 DH	376	if (!(LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config) &
	377	(1<<LEON3_GPTIMER_SEPIRQ))) {
	378	printk(KERN_ERR "timer not configured with separate irqs\n");
	379	BUG();
5213a780 KE	380	}
5213a780 KE	381
a481b5d0 DH	382	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].val,
	383	0);
	384	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].rld,
	385	(((1000000/HZ) - 1)));
	386	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl,
	387	0);
	388	#endif
	389
	390	/*
	391	* The IRQ controller may (if implemented) consist of multiple
	392	* IRQ controllers, each mapped on a 4Kb boundary.
	393	* Each CPU may be routed to different IRQCTRLs, however
	394	* we assume that all CPUs (in SMP system) is routed to the
	395	* same IRQ Controller, and for non-SMP only one IRQCTRL is
	396	* accessed anyway.
	397	* In AMP systems, Linux must run on CPU0 for the time being.
	398	*/
01dae0f0 DH	399	icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]);
01dae0f0 DH	400	icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf;
a481b5d0 DH	401	leon3_irqctrl_regs += icsel;
a481b5d0 DH	402
970def65 DH	403	/* Mask all IRQs on boot-cpu IRQ controller */
	404	LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0);
	405
a481b5d0 DH	406	/* Probe extended IRQ controller */
	407	eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus)
	408	>> 16) & 0xf;
	409	if (eirq != 0)
	410	leon_eirq_setup(eirq);
	411
4c6773c3	412	irq = _leon_build_device_irq(NULL, leon3_gptimer_irq+leon3_gptimer_idx);
62f08283	413	err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);
6baa9b20	414	if (err) {
a481b5d0	415	printk(KERN_ERR "unable to attach timer IRQ%d\n", irq);
5213a780 KE	416	prom_halt();
	417	}
	418
10f0d07c DH	419	#ifdef CONFIG_SMP
	420	{
	421	unsigned long flags;
	422
	423	/*
	424	* In SMP, sun4m adds a IPI handler to IRQ trap handler that
	425	* LEON never must take, sun4d and LEON overwrites the branch
	426	* with a NOP.
	427	*/
	428	local_irq_save(flags);
	429	patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
5d83d666	430	local_ops->cache_all();
10f0d07c DH	431	local_irq_restore(flags);
	432	}
	433	#endif
	434
a481b5d0 DH	435	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
	436	LEON3_GPTIMER_EN \|
	437	LEON3_GPTIMER_RL \|
	438	LEON3_GPTIMER_LD \|
	439	LEON3_GPTIMER_IRQEN);
8401707f KE	440
8401707f KE	441	#ifdef CONFIG_SMP
a481b5d0 DH	442	/* Install per-cpu IRQ handler for broadcasted ticker */
	443	irq = leon_build_device_irq(leon3_ticker_irq, handle_percpu_irq,
	444	"per-cpu", 0);
62f08283	445	err = request_irq(irq, leon_percpu_timer_ce_interrupt,
a481b5d0 DH	446	IRQF_PERCPU \| IRQF_TIMER, "ticker",
	447	NULL);
	448	if (err) {
	449	printk(KERN_ERR "unable to attach ticker IRQ%d\n", irq);
	450	prom_halt();
	451	}
2cf95304	452
a481b5d0 DH	453	LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl,
	454	LEON3_GPTIMER_EN \|
	455	LEON3_GPTIMER_RL \|
	456	LEON3_GPTIMER_LD \|
	457	LEON3_GPTIMER_IRQEN);
8401707f	458	#endif
53aea7ca DH	459	return;
	460	bad:
	461	printk(KERN_ERR "No Timer/irqctrl found\n");
	462	BUG();
	463	return;
5213a780 KE	464	}
5213a780 KE	465
08c9388f	466	static void leon_clear_clock_irq(void)
5213a780 KE	467	{
	468	}
	469
08c9388f	470	static void leon_load_profile_irq(int cpu, unsigned int limit)
5213a780	471	{
5213a780 KE	472	}
5213a780 KE	473
5213a780 KE	474	void __init leon_trans_init(struct device_node *dp)
	475	{
	476	if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) {
	477	struct property *p;
	478	p = of_find_property(dp, "mid", (void *)0);
	479	if (p) {
	480	int mid;
	481	dp->name = prom_early_alloc(5 + 1);
	482	memcpy(&mid, p->value, p->length);
	483	sprintf((char *)dp->name, "cpu%.2d", mid);
	484	}
	485	}
	486	}
	487
	488	void __initdata (prom_amba_init)(struct device_node dp, struct device_node ***nextp) = 0;
	489
	490	void __init leon_node_init(struct device_node dp, struct device_node **nextp)
	491	{
	492	if (prom_amba_init &&
	493	strcmp(dp->type, "ambapp") == 0 &&
	494	strcmp(dp->name, "ambapp0") == 0) {
	495	prom_amba_init(dp, nextp);
	496	}
	497	}
	498
8401707f	499	#ifdef CONFIG_SMP
8401707f KE	500	void leon_clear_profile_irq(int cpu)
	501	{
	502	}
	503
	504	void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)
	505	{
	506	unsigned long mask, flags, *addr;
4ba22b16	507	mask = leon_get_irqmask(irq_nr);
d61a38b2	508	spin_lock_irqsave(&leon_irq_lock, flags);
a481b5d0 DH	509	addr = (unsigned long *)LEON_IMASK(cpu);
a481b5d0 DH	510	LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) \| mask));
d61a38b2	511	spin_unlock_irqrestore(&leon_irq_lock, flags);
8401707f KE	512	}
	513
	514	#endif
	515
5213a780 KE	516	void __init leon_init_IRQ(void)
5213a780 KE	517	{
472bc4f2 SR	518	sparc_config.init_timers = leon_init_timers;
472bc4f2 SR	519	sparc_config.build_device_irq = _leon_build_device_irq;
08c9388f SR	520	sparc_config.clock_rate = 1000000;
	521	sparc_config.clear_clock_irq = leon_clear_clock_irq;
	522	sparc_config.load_profile_irq = leon_load_profile_irq;
5213a780 KE	523	}
	524
	525	void __init leon_init(void)
	526	{
ed418502	527	of_pdt_build_more = &leon_node_init;
5213a780	528	}