sparc32,leon: implement genirq CPU affinity
[deliverable/linux.git] / arch / sparc / kernel / leon_kernel.c
CommitLineData
5213a780
KE
1/*
2 * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
3 * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
4 */
5
6#include <linux/kernel.h>
7#include <linux/module.h>
8#include <linux/errno.h>
9#include <linux/mutex.h>
5213a780
KE
10#include <linux/of.h>
11#include <linux/of_platform.h>
12#include <linux/interrupt.h>
13#include <linux/of_device.h>
8401707f 14
5213a780
KE
15#include <asm/oplib.h>
16#include <asm/timer.h>
17#include <asm/prom.h>
18#include <asm/leon.h>
19#include <asm/leon_amba.h>
8401707f
KE
20#include <asm/traps.h>
21#include <asm/cacheflush.h>
4c6773c3 22#include <asm/smp.h>
5213a780
KE
23
24#include "prom.h"
25#include "irq.h"
26
53aea7ca
DH
27struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */
28struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */
5213a780
KE
29
30int leondebug_irq_disable;
31int leon_debug_irqout;
32static int dummy_master_l10_counter;
7279b82c 33unsigned long amba_system_id;
d61a38b2 34static DEFINE_SPINLOCK(leon_irq_lock);
5213a780 35
53aea7ca 36unsigned long leon3_gptimer_irq; /* interrupt controller irq number */
2791c1a4 37unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */
2cf95304 38int leon3_ticker_irq; /* Timer ticker IRQ */
5213a780 39unsigned int sparc_leon_eirq;
a481b5d0 40#define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
4c6773c3
DH
41#define LEON_IACK (&leon3_irqctrl_regs->iclear)
42#define LEON_DO_ACK_HW 1
5213a780 43
4c6773c3
DH
44/* Return the last ACKed IRQ by the Extended IRQ controller. It has already
45 * been (automatically) ACKed when the CPU takes the trap.
46 */
47static inline unsigned int leon_eirq_get(int cpu)
5213a780
KE
48{
49 return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f;
50}
51
4c6773c3
DH
52/* Handle one or multiple IRQs from the extended interrupt controller */
53static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
5213a780 54{
4c6773c3
DH
55 unsigned int eirq;
56 int cpu = hard_smp_processor_id();
57
58 eirq = leon_eirq_get(cpu);
59 if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */
60 generic_handle_irq(irq_map[eirq]->irq);
5213a780
KE
61}
62
63/* The extended IRQ controller has been found, this function registers it */
4c6773c3 64void leon_eirq_setup(unsigned int eirq)
5213a780 65{
4c6773c3
DH
66 unsigned long mask, oldmask;
67 unsigned int veirq;
5213a780 68
4c6773c3
DH
69 if (eirq < 1 || eirq > 0xf) {
70 printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq);
71 return;
5213a780
KE
72 }
73
4c6773c3
DH
74 veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0);
75
76 /*
77 * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
78 * controller have a mask-bit of their own, so this is safe.
79 */
80 irq_link(veirq);
81 mask = 1 << eirq;
a481b5d0
DH
82 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(0));
83 LEON3_BYPASS_STORE_PA(LEON_IMASK(0), (oldmask | mask));
4c6773c3 84 sparc_leon_eirq = eirq;
5213a780
KE
85}
86
87static inline unsigned long get_irqmask(unsigned int irq)
88{
89 unsigned long mask;
90
91 if (!irq || ((irq > 0xf) && !sparc_leon_eirq)
92 || ((irq > 0x1f) && sparc_leon_eirq)) {
93 printk(KERN_ERR
94 "leon_get_irqmask: false irq number: %d\n", irq);
95 mask = 0;
96 } else {
97 mask = LEON_HARD_INT(irq);
98 }
99 return mask;
100}
101
5eb1f4fc
DH
102#ifdef CONFIG_SMP
103static int irq_choose_cpu(const struct cpumask *affinity)
104{
105 cpumask_t mask;
106
107 cpus_and(mask, cpu_online_map, *affinity);
108 if (cpus_equal(mask, cpu_online_map) || cpus_empty(mask))
109 return 0;
110 else
111 return first_cpu(mask);
112}
113#else
114#define irq_choose_cpu(affinity) 0
115#endif
116
117static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest,
118 bool force)
119{
120 unsigned long mask, oldmask, flags;
121 int oldcpu, newcpu;
122
123 mask = (unsigned long)data->chip_data;
124 oldcpu = irq_choose_cpu(data->affinity);
125 newcpu = irq_choose_cpu(dest);
126
127 if (oldcpu == newcpu)
128 goto out;
129
130 /* unmask on old CPU first before enabling on the selected CPU */
131 spin_lock_irqsave(&leon_irq_lock, flags);
132 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu));
133 LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask));
134 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu));
135 LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask));
136 spin_unlock_irqrestore(&leon_irq_lock, flags);
137out:
138 return IRQ_SET_MASK_OK;
139}
140
6baa9b20 141static void leon_unmask_irq(struct irq_data *data)
5213a780 142{
a481b5d0 143 unsigned long mask, oldmask, flags;
5eb1f4fc 144 int cpu;
6baa9b20
SR
145
146 mask = (unsigned long)data->chip_data;
5eb1f4fc 147 cpu = irq_choose_cpu(data->affinity);
d61a38b2 148 spin_lock_irqsave(&leon_irq_lock, flags);
5eb1f4fc
DH
149 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
150 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask));
d61a38b2 151 spin_unlock_irqrestore(&leon_irq_lock, flags);
5213a780
KE
152}
153
6baa9b20 154static void leon_mask_irq(struct irq_data *data)
5213a780 155{
a481b5d0 156 unsigned long mask, oldmask, flags;
5eb1f4fc 157 int cpu;
6baa9b20
SR
158
159 mask = (unsigned long)data->chip_data;
5eb1f4fc 160 cpu = irq_choose_cpu(data->affinity);
d61a38b2 161 spin_lock_irqsave(&leon_irq_lock, flags);
5eb1f4fc
DH
162 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
163 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask));
d61a38b2 164 spin_unlock_irqrestore(&leon_irq_lock, flags);
5213a780
KE
165}
166
6baa9b20
SR
167static unsigned int leon_startup_irq(struct irq_data *data)
168{
169 irq_link(data->irq);
170 leon_unmask_irq(data);
171 return 0;
172}
173
174static void leon_shutdown_irq(struct irq_data *data)
175{
176 leon_mask_irq(data);
177 irq_unlink(data->irq);
178}
179
4c6773c3
DH
180/* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */
181static void leon_eoi_irq(struct irq_data *data)
182{
183 unsigned long mask = (unsigned long)data->chip_data;
184
185 if (mask & LEON_DO_ACK_HW)
186 LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW);
187}
188
6baa9b20 189static struct irq_chip leon_irq = {
5eb1f4fc
DH
190 .name = "leon",
191 .irq_startup = leon_startup_irq,
192 .irq_shutdown = leon_shutdown_irq,
193 .irq_mask = leon_mask_irq,
194 .irq_unmask = leon_unmask_irq,
195 .irq_eoi = leon_eoi_irq,
196 .irq_set_affinity = leon_set_affinity,
6baa9b20
SR
197};
198
4c6773c3
DH
199/*
200 * Build a LEON IRQ for the edge triggered LEON IRQ controller:
201 * Edge (normal) IRQ - handle_simple_irq, ack=DONT-CARE, never ack
202 * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR
203 * Per-CPU Edge - handle_percpu_irq, ack=0
204 */
205unsigned int leon_build_device_irq(unsigned int real_irq,
206 irq_flow_handler_t flow_handler,
207 const char *name, int do_ack)
6baa9b20
SR
208{
209 unsigned int irq;
210 unsigned long mask;
211
212 irq = 0;
213 mask = get_irqmask(real_irq);
214 if (mask == 0)
215 goto out;
216
217 irq = irq_alloc(real_irq, real_irq);
218 if (irq == 0)
219 goto out;
220
4c6773c3
DH
221 if (do_ack)
222 mask |= LEON_DO_ACK_HW;
223
6baa9b20 224 irq_set_chip_and_handler_name(irq, &leon_irq,
4c6773c3 225 flow_handler, name);
6baa9b20
SR
226 irq_set_chip_data(irq, (void *)mask);
227
228out:
229 return irq;
230}
231
4c6773c3
DH
232static unsigned int _leon_build_device_irq(struct platform_device *op,
233 unsigned int real_irq)
234{
235 return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0);
236}
237
5213a780
KE
238void __init leon_init_timers(irq_handler_t counter_fn)
239{
4c6773c3 240 int irq, eirq;
2791c1a4 241 struct device_node *rootnp, *np, *nnp;
53aea7ca
DH
242 struct property *pp;
243 int len;
e2305e37 244 int cpu, icsel;
2791c1a4 245 int ampopts;
6baa9b20 246 int err;
5213a780
KE
247
248 leondebug_irq_disable = 0;
249 leon_debug_irqout = 0;
250 master_l10_counter = (unsigned int *)&dummy_master_l10_counter;
251 dummy_master_l10_counter = 0;
252
53aea7ca
DH
253 rootnp = of_find_node_by_path("/ambapp0");
254 if (!rootnp)
255 goto bad;
7279b82c
DH
256
257 /* Find System ID: GRLIB build ID and optional CHIP ID */
258 pp = of_find_property(rootnp, "systemid", &len);
259 if (pp)
260 amba_system_id = *(unsigned long *)pp->value;
261
262 /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */
53aea7ca 263 np = of_find_node_by_name(rootnp, "GAISLER_IRQMP");
9742e72c
DH
264 if (!np) {
265 np = of_find_node_by_name(rootnp, "01_00d");
266 if (!np)
267 goto bad;
268 }
53aea7ca
DH
269 pp = of_find_property(np, "reg", &len);
270 if (!pp)
271 goto bad;
272 leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value;
273
274 /* Find GPTIMER Timer Registers base address otherwise bail out. */
2791c1a4
DH
275 nnp = rootnp;
276 do {
277 np = of_find_node_by_name(nnp, "GAISLER_GPTIMER");
278 if (!np) {
279 np = of_find_node_by_name(nnp, "01_011");
280 if (!np)
281 goto bad;
282 }
283
284 ampopts = 0;
285 pp = of_find_property(np, "ampopts", &len);
286 if (pp) {
287 ampopts = *(int *)pp->value;
288 if (ampopts == 0) {
289 /* Skip this instance, resource already
290 * allocated by other OS */
291 nnp = np;
292 continue;
293 }
294 }
295
296 /* Select Timer-Instance on Timer Core. Default is zero */
297 leon3_gptimer_idx = ampopts & 0x7;
298
299 pp = of_find_property(np, "reg", &len);
300 if (pp)
301 leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **)
302 pp->value;
303 pp = of_find_property(np, "interrupts", &len);
304 if (pp)
305 leon3_gptimer_irq = *(unsigned int *)pp->value;
306 } while (0);
53aea7ca 307
a481b5d0
DH
308 if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq))
309 goto bad;
310
311 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0);
312 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld,
313 (((1000000 / HZ) - 1)));
314 LEON3_BYPASS_STORE_PA(
2791c1a4 315 &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0);
5213a780 316
8401707f 317#ifdef CONFIG_SMP
a481b5d0 318 leon3_ticker_irq = leon3_gptimer_irq + 1 + leon3_gptimer_idx;
8401707f 319
a481b5d0
DH
320 if (!(LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config) &
321 (1<<LEON3_GPTIMER_SEPIRQ))) {
322 printk(KERN_ERR "timer not configured with separate irqs\n");
323 BUG();
5213a780
KE
324 }
325
a481b5d0
DH
326 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].val,
327 0);
328 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].rld,
329 (((1000000/HZ) - 1)));
330 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl,
331 0);
332#endif
333
334 /*
335 * The IRQ controller may (if implemented) consist of multiple
336 * IRQ controllers, each mapped on a 4Kb boundary.
337 * Each CPU may be routed to different IRQCTRLs, however
338 * we assume that all CPUs (in SMP system) is routed to the
339 * same IRQ Controller, and for non-SMP only one IRQCTRL is
340 * accessed anyway.
341 * In AMP systems, Linux must run on CPU0 for the time being.
342 */
343 cpu = sparc_leon3_cpuid();
344 icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[cpu/8]);
345 icsel = (icsel >> ((7 - (cpu&0x7)) * 4)) & 0xf;
346 leon3_irqctrl_regs += icsel;
347
348 /* Probe extended IRQ controller */
349 eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus)
350 >> 16) & 0xf;
351 if (eirq != 0)
352 leon_eirq_setup(eirq);
353
4c6773c3 354 irq = _leon_build_device_irq(NULL, leon3_gptimer_irq+leon3_gptimer_idx);
6baa9b20 355 err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);
6baa9b20 356 if (err) {
a481b5d0 357 printk(KERN_ERR "unable to attach timer IRQ%d\n", irq);
5213a780
KE
358 prom_halt();
359 }
360
a481b5d0
DH
361 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
362 LEON3_GPTIMER_EN |
363 LEON3_GPTIMER_RL |
364 LEON3_GPTIMER_LD |
365 LEON3_GPTIMER_IRQEN);
8401707f
KE
366
367#ifdef CONFIG_SMP
a481b5d0
DH
368 /* Install per-cpu IRQ handler for broadcasted ticker */
369 irq = leon_build_device_irq(leon3_ticker_irq, handle_percpu_irq,
370 "per-cpu", 0);
371 err = request_irq(irq, leon_percpu_timer_interrupt,
372 IRQF_PERCPU | IRQF_TIMER, "ticker",
373 NULL);
374 if (err) {
375 printk(KERN_ERR "unable to attach ticker IRQ%d\n", irq);
376 prom_halt();
377 }
2cf95304 378
a481b5d0
DH
379 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx+1].ctrl,
380 LEON3_GPTIMER_EN |
381 LEON3_GPTIMER_RL |
382 LEON3_GPTIMER_LD |
383 LEON3_GPTIMER_IRQEN);
8401707f 384#endif
53aea7ca
DH
385 return;
386bad:
387 printk(KERN_ERR "No Timer/irqctrl found\n");
388 BUG();
389 return;
5213a780
KE
390}
391
392void leon_clear_clock_irq(void)
393{
394}
395
396void leon_load_profile_irq(int cpu, unsigned int limit)
397{
398 BUG();
399}
400
5213a780
KE
401void __init leon_trans_init(struct device_node *dp)
402{
403 if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) {
404 struct property *p;
405 p = of_find_property(dp, "mid", (void *)0);
406 if (p) {
407 int mid;
408 dp->name = prom_early_alloc(5 + 1);
409 memcpy(&mid, p->value, p->length);
410 sprintf((char *)dp->name, "cpu%.2d", mid);
411 }
412 }
413}
414
415void __initdata (*prom_amba_init)(struct device_node *dp, struct device_node ***nextp) = 0;
416
417void __init leon_node_init(struct device_node *dp, struct device_node ***nextp)
418{
419 if (prom_amba_init &&
420 strcmp(dp->type, "ambapp") == 0 &&
421 strcmp(dp->name, "ambapp0") == 0) {
422 prom_amba_init(dp, nextp);
423 }
424}
425
8401707f
KE
426#ifdef CONFIG_SMP
427
428void leon_set_cpu_int(int cpu, int level)
429{
430 unsigned long mask;
431 mask = get_irqmask(level);
432 LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->force[cpu], mask);
433}
434
435static void leon_clear_ipi(int cpu, int level)
436{
437 unsigned long mask;
438 mask = get_irqmask(level);
439 LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->force[cpu], mask<<16);
440}
441
442static void leon_set_udt(int cpu)
443{
444}
445
446void leon_clear_profile_irq(int cpu)
447{
448}
449
450void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)
451{
452 unsigned long mask, flags, *addr;
453 mask = get_irqmask(irq_nr);
d61a38b2 454 spin_lock_irqsave(&leon_irq_lock, flags);
a481b5d0
DH
455 addr = (unsigned long *)LEON_IMASK(cpu);
456 LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask));
d61a38b2 457 spin_unlock_irqrestore(&leon_irq_lock, flags);
8401707f
KE
458}
459
460#endif
461
5213a780
KE
462void __init leon_init_IRQ(void)
463{
6baa9b20 464 sparc_irq_config.init_timers = leon_init_timers;
4c6773c3 465 sparc_irq_config.build_device_irq = _leon_build_device_irq;
5213a780
KE
466
467 BTFIXUPSET_CALL(clear_clock_irq, leon_clear_clock_irq,
468 BTFIXUPCALL_NORM);
469 BTFIXUPSET_CALL(load_profile_irq, leon_load_profile_irq,
470 BTFIXUPCALL_NOP);
471
472#ifdef CONFIG_SMP
473 BTFIXUPSET_CALL(set_cpu_int, leon_set_cpu_int, BTFIXUPCALL_NORM);
474 BTFIXUPSET_CALL(clear_cpu_int, leon_clear_ipi, BTFIXUPCALL_NORM);
475 BTFIXUPSET_CALL(set_irq_udt, leon_set_udt, BTFIXUPCALL_NORM);
476#endif
477
478}
479
480void __init leon_init(void)
481{
ed418502 482 of_pdt_build_more = &leon_node_init;
5213a780 483}
This page took 0.140177 seconds and 5 git commands to generate.