PCI: Assign resources before drivers claim devices (pci_scan_root_bus())
[deliverable/linux.git] / arch / sparc / kernel / leon_pci.c
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1/*
2 * leon_pci.c: LEON Host PCI support
3 *
4 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
5 *
6 * Code is partially derived from pcic.c
7 */
8
9#include <linux/of_device.h>
10#include <linux/kernel.h>
11#include <linux/pci.h>
7b64db60 12#include <linux/export.h>
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13#include <asm/leon.h>
14#include <asm/leon_pci.h>
15
16/* The LEON architecture does not rely on a BIOS or bootloader to setup
17 * PCI for us. The Linux generic routines are used to setup resources,
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18 * reset values of configuration-space register settings are preserved.
19 *
20 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
21 * accessed through a Window which is translated to low 64KB in PCI space, the
22 * first 4KB is not used so 60KB is available.
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23 */
24void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
25{
2b591616 26 LIST_HEAD(resources);
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27 struct pci_bus *root_bus;
28
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29 pci_add_resource_offset(&resources, &info->io_space,
30 info->io_space.start - 0x1000);
2b591616 31 pci_add_resource(&resources, &info->mem_space);
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32 info->busn.flags = IORESOURCE_BUS;
33 pci_add_resource(&resources, &info->busn);
26893c13 34
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35 root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
36 &resources);
37 if (root_bus) {
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38 /* Setup IRQs of all devices using custom routines */
39 pci_fixup_irqs(pci_common_swizzle, info->map_irq);
40
41 /* Assign devices with resources */
42 pci_assign_unassigned_resources();
b97ea289 43 pci_bus_add_devices(root_bus);
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44 } else {
45 pci_free_resource_list(&resources);
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46 }
47}
48
7c9503b8 49void pcibios_fixup_bus(struct pci_bus *pbus)
26893c13 50{
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51 struct pci_dev *dev;
52 int i, has_io, has_mem;
53 u16 cmd;
54
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55 list_for_each_entry(dev, &pbus->devices, bus_list) {
56 /*
57 * We can not rely on that the bootloader has enabled I/O
58 * or memory access to PCI devices. Instead we enable it here
59 * if the device has BARs of respective type.
60 */
61 has_io = has_mem = 0;
62 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
63 unsigned long f = dev->resource[i].flags;
64 if (f & IORESOURCE_IO)
65 has_io = 1;
66 else if (f & IORESOURCE_MEM)
67 has_mem = 1;
68 }
69 /* ROM BARs are mapped into 32-bit memory space */
70 if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
71 dev->resource[PCI_ROM_RESOURCE].flags |=
72 IORESOURCE_ROM_ENABLE;
73 has_mem = 1;
74 }
75 pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
76 if (has_io && !(cmd & PCI_COMMAND_IO)) {
77#ifdef CONFIG_PCI_DEBUG
78 printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
79 pci_name(dev));
80#endif
81 cmd |= PCI_COMMAND_IO;
82 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
83 cmd);
84 }
85 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
86#ifdef CONFIG_PCI_DEBUG
87 printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
88 "%s\n", pci_name(dev));
89#endif
90 cmd |= PCI_COMMAND_MEMORY;
91 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
92 cmd);
93 }
94 }
95}
96
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97resource_size_t pcibios_align_resource(void *data, const struct resource *res,
98 resource_size_t size, resource_size_t align)
99{
100 return res->start;
101}
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