Commit | Line | Data |
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a2bd4fd1 DM |
1 | #include <linux/string.h> |
2 | #include <linux/kernel.h> | |
f85ff305 | 3 | #include <linux/of.h> |
a2bd4fd1 DM |
4 | #include <linux/init.h> |
5 | #include <linux/module.h> | |
6 | #include <linux/mod_devicetable.h> | |
7 | #include <linux/slab.h> | |
3f23de10 | 8 | #include <linux/errno.h> |
c1b1a5f1 | 9 | #include <linux/irq.h> |
3f23de10 SR |
10 | #include <linux/of_device.h> |
11 | #include <linux/of_platform.h> | |
a2bd4fd1 | 12 | |
c9f5b7e7 RR |
13 | #include "of_device_common.h" |
14 | ||
3ca9fab4 DM |
15 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
16 | { | |
17 | unsigned long ret = res->start + offset; | |
6bda5736 | 18 | struct resource *r; |
3ca9fab4 | 19 | |
6bda5736 DM |
20 | if (res->flags & IORESOURCE_MEM) |
21 | r = request_mem_region(ret, size, name); | |
22 | else | |
23 | r = request_region(ret, size, name); | |
24 | if (!r) | |
3ca9fab4 DM |
25 | ret = 0; |
26 | ||
27 | return (void __iomem *) ret; | |
28 | } | |
29 | EXPORT_SYMBOL(of_ioremap); | |
30 | ||
e3a411a3 | 31 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 32 | { |
e3a411a3 DM |
33 | if (res->flags & IORESOURCE_MEM) |
34 | release_mem_region((unsigned long) base, size); | |
35 | else | |
36 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
37 | } |
38 | EXPORT_SYMBOL(of_iounmap); | |
39 | ||
cf44bbc2 DM |
40 | /* |
41 | * PCI bus specific translator | |
42 | */ | |
43 | ||
44 | static int of_bus_pci_match(struct device_node *np) | |
45 | { | |
7ee766d8 | 46 | if (!strcmp(np->name, "pci")) { |
a165b420 | 47 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
48 | |
49 | if (model && !strcmp(model, "SUNW,simba")) | |
50 | return 0; | |
51 | ||
a83f9823 DM |
52 | /* Do not do PCI specific frobbing if the |
53 | * PCI bridge lacks a ranges property. We | |
54 | * want to pass it through up to the next | |
55 | * parent as-is, not with the PCI translate | |
56 | * method which chops off the top address cell. | |
57 | */ | |
58 | if (!of_find_property(np, "ranges", NULL)) | |
59 | return 0; | |
60 | ||
61 | return 1; | |
62 | } | |
63 | ||
64 | return 0; | |
cf44bbc2 DM |
65 | } |
66 | ||
01f94c4a DM |
67 | static int of_bus_simba_match(struct device_node *np) |
68 | { | |
a165b420 | 69 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
70 | |
71 | if (model && !strcmp(model, "SUNW,simba")) | |
72 | return 1; | |
8c2786cf DM |
73 | |
74 | /* Treat PCI busses lacking ranges property just like | |
75 | * simba. | |
76 | */ | |
7ee766d8 | 77 | if (!strcmp(np->name, "pci")) { |
8c2786cf DM |
78 | if (!of_find_property(np, "ranges", NULL)) |
79 | return 1; | |
80 | } | |
81 | ||
01f94c4a DM |
82 | return 0; |
83 | } | |
84 | ||
85 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
86 | int na, int ns, int pna) | |
87 | { | |
88 | return 0; | |
89 | } | |
90 | ||
cf44bbc2 DM |
91 | static void of_bus_pci_count_cells(struct device_node *np, |
92 | int *addrc, int *sizec) | |
93 | { | |
94 | if (addrc) | |
95 | *addrc = 3; | |
96 | if (sizec) | |
97 | *sizec = 2; | |
98 | } | |
99 | ||
a83f9823 DM |
100 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
101 | int na, int ns, int pna) | |
cf44bbc2 | 102 | { |
a83f9823 DM |
103 | u32 result[OF_MAX_ADDR_CELLS]; |
104 | int i; | |
cf44bbc2 DM |
105 | |
106 | /* Check address type match */ | |
107 | if ((addr[0] ^ range[0]) & 0x03000000) | |
a83f9823 | 108 | return -EINVAL; |
cf44bbc2 | 109 | |
a83f9823 DM |
110 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
111 | na - 1, ns)) | |
112 | return -EINVAL; | |
cf44bbc2 | 113 | |
a83f9823 DM |
114 | /* Start with the parent range base. */ |
115 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 116 | |
a83f9823 DM |
117 | /* Add in the child address offset, skipping high cell. */ |
118 | for (i = 0; i < na - 1; i++) | |
119 | result[pna - 1 - i] += | |
120 | (addr[na - 1 - i] - | |
121 | range[na - 1 - i]); | |
122 | ||
123 | memcpy(addr, result, pna * 4); | |
124 | ||
125 | return 0; | |
cf44bbc2 DM |
126 | } |
127 | ||
e3c71a32 | 128 | static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags) |
cf44bbc2 | 129 | { |
cf44bbc2 DM |
130 | u32 w = addr[0]; |
131 | ||
e3c71a32 DM |
132 | /* For PCI, we override whatever child busses may have used. */ |
133 | flags = 0; | |
cf44bbc2 DM |
134 | switch((w >> 24) & 0x03) { |
135 | case 0x01: | |
136 | flags |= IORESOURCE_IO; | |
e3c71a32 DM |
137 | break; |
138 | ||
cf44bbc2 DM |
139 | case 0x02: /* 32 bits */ |
140 | case 0x03: /* 64 bits */ | |
141 | flags |= IORESOURCE_MEM; | |
e3c71a32 | 142 | break; |
cf44bbc2 DM |
143 | } |
144 | if (w & 0x40000000) | |
145 | flags |= IORESOURCE_PREFETCH; | |
146 | return flags; | |
147 | } | |
148 | ||
4130a4b2 DM |
149 | /* |
150 | * FHC/Central bus specific translator. | |
151 | * | |
152 | * This is just needed to hard-code the address and size cell | |
153 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
154 | * #size-cells properties, and if you walk to the root on such | |
155 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
156 | * not what we want to use. | |
157 | */ | |
158 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 159 | { |
4130a4b2 DM |
160 | return !strcmp(np->name, "fhc") || |
161 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
162 | } |
163 | ||
4130a4b2 | 164 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
165 | |
166 | /* | |
167 | * Array of bus specific translators | |
168 | */ | |
169 | ||
170 | static struct of_bus of_busses[] = { | |
171 | /* PCI */ | |
172 | { | |
173 | .name = "pci", | |
174 | .addr_prop_name = "assigned-addresses", | |
175 | .match = of_bus_pci_match, | |
176 | .count_cells = of_bus_pci_count_cells, | |
177 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
178 | .get_flags = of_bus_pci_get_flags, |
179 | }, | |
01f94c4a DM |
180 | /* SIMBA */ |
181 | { | |
182 | .name = "simba", | |
183 | .addr_prop_name = "assigned-addresses", | |
184 | .match = of_bus_simba_match, | |
185 | .count_cells = of_bus_pci_count_cells, | |
186 | .map = of_bus_simba_map, | |
187 | .get_flags = of_bus_pci_get_flags, | |
188 | }, | |
cf44bbc2 DM |
189 | /* SBUS */ |
190 | { | |
191 | .name = "sbus", | |
192 | .addr_prop_name = "reg", | |
193 | .match = of_bus_sbus_match, | |
194 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
195 | .map = of_bus_default_map, |
196 | .get_flags = of_bus_default_get_flags, | |
197 | }, | |
198 | /* FHC */ | |
199 | { | |
200 | .name = "fhc", | |
201 | .addr_prop_name = "reg", | |
202 | .match = of_bus_fhc_match, | |
203 | .count_cells = of_bus_fhc_count_cells, | |
204 | .map = of_bus_default_map, | |
205 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
206 | }, |
207 | /* Default */ | |
208 | { | |
209 | .name = "default", | |
210 | .addr_prop_name = "reg", | |
211 | .match = NULL, | |
212 | .count_cells = of_bus_default_count_cells, | |
213 | .map = of_bus_default_map, | |
cf44bbc2 DM |
214 | .get_flags = of_bus_default_get_flags, |
215 | }, | |
216 | }; | |
217 | ||
218 | static struct of_bus *of_match_bus(struct device_node *np) | |
219 | { | |
220 | int i; | |
221 | ||
222 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
223 | if (!of_busses[i].match || of_busses[i].match(np)) | |
224 | return &of_busses[i]; | |
225 | BUG(); | |
226 | return NULL; | |
227 | } | |
228 | ||
229 | static int __init build_one_resource(struct device_node *parent, | |
230 | struct of_bus *bus, | |
231 | struct of_bus *pbus, | |
232 | u32 *addr, | |
233 | int na, int ns, int pna) | |
234 | { | |
6a23acf3 | 235 | const u32 *ranges; |
21cd8833 | 236 | int rone, rlen; |
cf44bbc2 DM |
237 | |
238 | ranges = of_get_property(parent, "ranges", &rlen); | |
239 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
240 | u32 result[OF_MAX_ADDR_CELLS]; |
241 | int i; | |
242 | ||
243 | memset(result, 0, pna * 4); | |
244 | for (i = 0; i < na; i++) | |
245 | result[pna - 1 - i] = | |
246 | addr[na - 1 - i]; | |
247 | ||
248 | memcpy(addr, result, pna * 4); | |
249 | return 0; | |
cf44bbc2 DM |
250 | } |
251 | ||
252 | /* Now walk through the ranges */ | |
253 | rlen /= 4; | |
254 | rone = na + pna + ns; | |
255 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
256 | if (!bus->map(addr, ranges, na, ns, pna)) |
257 | return 0; | |
cf44bbc2 | 258 | } |
a83f9823 | 259 | |
49d23cfc DM |
260 | /* When we miss an I/O space match on PCI, just pass it up |
261 | * to the next PCI bridge and/or controller. | |
262 | */ | |
263 | if (!strcmp(bus->name, "pci") && | |
264 | (addr[0] & 0x03000000) == 0x01000000) | |
265 | return 0; | |
266 | ||
a83f9823 DM |
267 | return 1; |
268 | } | |
269 | ||
270 | static int __init use_1to1_mapping(struct device_node *pp) | |
271 | { | |
a83f9823 DM |
272 | /* If we have a ranges property in the parent, use it. */ |
273 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
274 | return 0; | |
cf44bbc2 | 275 | |
a83f9823 DM |
276 | /* If the parent is the dma node of an ISA bus, pass |
277 | * the translation up to the root. | |
5280267c DM |
278 | * |
279 | * Some SBUS devices use intermediate nodes to express | |
280 | * hierarchy within the device itself. These aren't | |
281 | * real bus nodes, and don't have a 'ranges' property. | |
282 | * But, we should still pass the translation work up | |
283 | * to the SBUS itself. | |
a83f9823 | 284 | */ |
5280267c DM |
285 | if (!strcmp(pp->name, "dma") || |
286 | !strcmp(pp->name, "espdma") || | |
287 | !strcmp(pp->name, "ledma") || | |
288 | !strcmp(pp->name, "lebuffer")) | |
a83f9823 DM |
289 | return 0; |
290 | ||
8c2786cf DM |
291 | /* Similarly for all PCI bridges, if we get this far |
292 | * it lacks a ranges property, and this will include | |
293 | * cases like Simba. | |
294 | */ | |
7ee766d8 | 295 | if (!strcmp(pp->name, "pci")) |
a83f9823 DM |
296 | return 0; |
297 | ||
298 | return 1; | |
cf44bbc2 DM |
299 | } |
300 | ||
a83f9823 DM |
301 | static int of_resource_verbose; |
302 | ||
cf44bbc2 DM |
303 | static void __init build_device_resources(struct of_device *op, |
304 | struct device *parent) | |
305 | { | |
306 | struct of_device *p_op; | |
307 | struct of_bus *bus; | |
308 | int na, ns; | |
309 | int index, num_reg; | |
6a23acf3 | 310 | const void *preg; |
cf44bbc2 DM |
311 | |
312 | if (!parent) | |
313 | return; | |
314 | ||
315 | p_op = to_of_device(parent); | |
316 | bus = of_match_bus(p_op->node); | |
317 | bus->count_cells(op->node, &na, &ns); | |
318 | ||
319 | preg = of_get_property(op->node, bus->addr_prop_name, &num_reg); | |
320 | if (!preg || num_reg == 0) | |
321 | return; | |
322 | ||
323 | /* Convert to num-cells. */ | |
324 | num_reg /= 4; | |
325 | ||
46ba6d7d | 326 | /* Convert to num-entries. */ |
cf44bbc2 DM |
327 | num_reg /= na + ns; |
328 | ||
e5dd42e4 | 329 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
330 | if (num_reg > PROMREG_MAX) { |
331 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
332 | "limiting to %d.\n", | |
333 | op->node->full_name, num_reg, PROMREG_MAX); | |
334 | num_reg = PROMREG_MAX; | |
335 | } | |
336 | ||
cf44bbc2 DM |
337 | for (index = 0; index < num_reg; index++) { |
338 | struct resource *r = &op->resource[index]; | |
339 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 340 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
cf44bbc2 DM |
341 | struct device_node *dp = op->node; |
342 | struct device_node *pp = p_op->node; | |
b85cdd49 | 343 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
344 | u64 size, result = OF_BAD_ADDR; |
345 | unsigned long flags; | |
346 | int dna, dns; | |
347 | int pna, pns; | |
348 | ||
349 | size = of_read_addr(reg + na, ns); | |
cf44bbc2 DM |
350 | memcpy(addr, reg, na * 4); |
351 | ||
e3c71a32 DM |
352 | flags = bus->get_flags(addr, 0); |
353 | ||
a83f9823 | 354 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
355 | result = of_read_addr(addr, na); |
356 | goto build_res; | |
357 | } | |
358 | ||
359 | dna = na; | |
360 | dns = ns; | |
b85cdd49 | 361 | dbus = bus; |
cf44bbc2 DM |
362 | |
363 | while (1) { | |
364 | dp = pp; | |
365 | pp = dp->parent; | |
366 | if (!pp) { | |
367 | result = of_read_addr(addr, dna); | |
368 | break; | |
369 | } | |
370 | ||
371 | pbus = of_match_bus(pp); | |
372 | pbus->count_cells(dp, &pna, &pns); | |
373 | ||
b85cdd49 | 374 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 375 | dna, dns, pna)) |
cf44bbc2 DM |
376 | break; |
377 | ||
e3c71a32 DM |
378 | flags = pbus->get_flags(addr, flags); |
379 | ||
cf44bbc2 DM |
380 | dna = pna; |
381 | dns = pns; | |
b85cdd49 | 382 | dbus = pbus; |
cf44bbc2 DM |
383 | } |
384 | ||
385 | build_res: | |
386 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
387 | |
388 | if (of_resource_verbose) | |
90181136 | 389 | printk("%s reg[%d] -> %llx\n", |
a83f9823 DM |
390 | op->node->full_name, index, |
391 | result); | |
392 | ||
cf44bbc2 | 393 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
394 | if (tlb_type == hypervisor) |
395 | result &= 0x0fffffffffffffffUL; | |
396 | ||
cf44bbc2 DM |
397 | r->start = result; |
398 | r->end = result + size - 1; | |
399 | r->flags = flags; | |
cf44bbc2 DM |
400 | } |
401 | r->name = op->node->name; | |
402 | } | |
403 | } | |
404 | ||
2b1e5978 DM |
405 | static struct device_node * __init |
406 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 407 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
408 | unsigned int *irq_p) |
409 | { | |
410 | struct device_node *cp; | |
411 | unsigned int irq = *irq_p; | |
412 | struct of_bus *bus; | |
413 | phandle handle; | |
6a23acf3 | 414 | const u32 *reg; |
2b1e5978 DM |
415 | int na, num_reg, i; |
416 | ||
417 | bus = of_match_bus(pp); | |
418 | bus->count_cells(dp, &na, NULL); | |
419 | ||
420 | reg = of_get_property(dp, "reg", &num_reg); | |
421 | if (!reg || !num_reg) | |
422 | return NULL; | |
423 | ||
424 | imlen /= ((na + 3) * 4); | |
425 | handle = 0; | |
426 | for (i = 0; i < imlen; i++) { | |
427 | int j; | |
428 | ||
429 | for (j = 0; j < na; j++) { | |
430 | if ((reg[j] & imask[j]) != imap[j]) | |
431 | goto next; | |
432 | } | |
433 | if (imap[na] == irq) { | |
434 | handle = imap[na + 1]; | |
435 | irq = imap[na + 2]; | |
436 | break; | |
437 | } | |
438 | ||
439 | next: | |
440 | imap += (na + 3); | |
441 | } | |
46ba6d7d DM |
442 | if (i == imlen) { |
443 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
444 | * properties that do not include the on-board device | |
445 | * interrupts. Instead, the device's 'interrupts' property | |
446 | * is already a fully specified INO value. | |
447 | * | |
448 | * Handle this by deciding that, if we didn't get a | |
449 | * match in the parent's 'interrupt-map', and the | |
450 | * parent is an IRQ translater, then use the parent as | |
451 | * our IRQ controller. | |
452 | */ | |
453 | if (pp->irq_trans) | |
454 | return pp; | |
455 | ||
2b1e5978 | 456 | return NULL; |
46ba6d7d | 457 | } |
2b1e5978 DM |
458 | |
459 | *irq_p = irq; | |
460 | cp = of_find_node_by_phandle(handle); | |
461 | ||
462 | return cp; | |
463 | } | |
464 | ||
465 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
466 | struct device_node *pp, | |
467 | unsigned int irq) | |
468 | { | |
6a23acf3 | 469 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 470 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
471 | |
472 | if (irq < 1 || irq > 4) | |
473 | return irq; | |
474 | ||
475 | regs = of_get_property(dp, "reg", NULL); | |
476 | if (!regs) | |
477 | return irq; | |
478 | ||
bb4c18cb | 479 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
480 | devfn = (regs->phys_hi >> 8) & 0xff; |
481 | slot = (devfn >> 3) & 0x1f; | |
482 | ||
bb4c18cb DM |
483 | if (pp->irq_trans) { |
484 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
485 | * is handling a PCI controller that lacks a proper set of | |
486 | * interrupt-map and interrupt-map-mask properties. The | |
487 | * Ultra-E450 is one example. | |
488 | * | |
489 | * The bit layout is BSSLL, where: | |
490 | * B: 0 on bus A, 1 on bus B | |
491 | * D: 2-bit slot number, derived from PCI device number as | |
492 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
493 | * L: 2-bit line number | |
bb4c18cb DM |
494 | */ |
495 | if (bus & 0x80) { | |
496 | /* PBM-A */ | |
497 | bus = 0x00; | |
498 | slot = (slot - 1) << 2; | |
499 | } else { | |
500 | /* PBM-B */ | |
501 | bus = 0x10; | |
502 | slot = (slot - 2) << 2; | |
503 | } | |
504 | irq -= 1; | |
505 | ||
506 | ret = (bus | slot | irq); | |
507 | } else { | |
508 | /* Going through a PCI-PCI bridge that lacks a set of | |
509 | * interrupt-map and interrupt-map-mask properties. | |
510 | */ | |
511 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
512 | } | |
2b1e5978 DM |
513 | |
514 | return ret; | |
515 | } | |
516 | ||
a83f9823 DM |
517 | static int of_irq_verbose; |
518 | ||
2b1e5978 DM |
519 | static unsigned int __init build_one_device_irq(struct of_device *op, |
520 | struct device *parent, | |
521 | unsigned int irq) | |
522 | { | |
523 | struct device_node *dp = op->node; | |
524 | struct device_node *pp, *ip; | |
525 | unsigned int orig_irq = irq; | |
c1b1a5f1 | 526 | int nid; |
2b1e5978 DM |
527 | |
528 | if (irq == 0xffffffff) | |
529 | return irq; | |
530 | ||
531 | if (dp->irq_trans) { | |
532 | irq = dp->irq_trans->irq_build(dp, irq, | |
533 | dp->irq_trans->data); | |
a83f9823 DM |
534 | |
535 | if (of_irq_verbose) | |
536 | printk("%s: direct translate %x --> %x\n", | |
537 | dp->full_name, orig_irq, irq); | |
538 | ||
c1b1a5f1 | 539 | goto out; |
2b1e5978 DM |
540 | } |
541 | ||
542 | /* Something more complicated. Walk up to the root, applying | |
543 | * interrupt-map or bus specific translations, until we hit | |
544 | * an IRQ translator. | |
545 | * | |
546 | * If we hit a bus type or situation we cannot handle, we | |
547 | * stop and assume that the original IRQ number was in a | |
548 | * format which has special meaning to it's immediate parent. | |
549 | */ | |
550 | pp = dp->parent; | |
551 | ip = NULL; | |
552 | while (pp) { | |
6a23acf3 | 553 | const void *imap, *imsk; |
2b1e5978 DM |
554 | int imlen; |
555 | ||
556 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
557 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
558 | if (imap && imsk) { | |
559 | struct device_node *iret; | |
560 | int this_orig_irq = irq; | |
561 | ||
562 | iret = apply_interrupt_map(dp, pp, | |
563 | imap, imlen, imsk, | |
564 | &irq); | |
a83f9823 DM |
565 | |
566 | if (of_irq_verbose) | |
567 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
568 | op->node->full_name, | |
569 | pp->full_name, this_orig_irq, | |
570 | (iret ? iret->full_name : "NULL"), irq); | |
571 | ||
2b1e5978 DM |
572 | if (!iret) |
573 | break; | |
574 | ||
575 | if (iret->irq_trans) { | |
576 | ip = iret; | |
577 | break; | |
578 | } | |
579 | } else { | |
7ee766d8 | 580 | if (!strcmp(pp->name, "pci")) { |
2b1e5978 DM |
581 | unsigned int this_orig_irq = irq; |
582 | ||
583 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
584 | if (of_irq_verbose) |
585 | printk("%s: PCI swizzle [%s] " | |
586 | "%x --> %x\n", | |
587 | op->node->full_name, | |
588 | pp->full_name, this_orig_irq, | |
589 | irq); | |
590 | ||
2b1e5978 DM |
591 | } |
592 | ||
593 | if (pp->irq_trans) { | |
594 | ip = pp; | |
595 | break; | |
596 | } | |
597 | } | |
598 | dp = pp; | |
599 | pp = pp->parent; | |
600 | } | |
601 | if (!ip) | |
602 | return orig_irq; | |
603 | ||
604 | irq = ip->irq_trans->irq_build(op->node, irq, | |
605 | ip->irq_trans->data); | |
a83f9823 DM |
606 | if (of_irq_verbose) |
607 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
608 | op->node->full_name, ip->full_name, orig_irq, irq); | |
2b1e5978 | 609 | |
c1b1a5f1 DM |
610 | out: |
611 | nid = of_node_to_nid(dp); | |
612 | if (nid != -1) { | |
96d76a74 | 613 | cpumask_t numa_mask = *cpumask_of_node(nid); |
c1b1a5f1 | 614 | |
0de26520 | 615 | irq_set_affinity(irq, &numa_mask); |
c1b1a5f1 DM |
616 | } |
617 | ||
2b1e5978 DM |
618 | return irq; |
619 | } | |
620 | ||
cf44bbc2 DM |
621 | static struct of_device * __init scan_one_device(struct device_node *dp, |
622 | struct device *parent) | |
623 | { | |
624 | struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL); | |
6a23acf3 | 625 | const unsigned int *irq; |
3d6e4702 | 626 | struct dev_archdata *sd; |
2b1e5978 | 627 | int len, i; |
cf44bbc2 DM |
628 | |
629 | if (!op) | |
630 | return NULL; | |
631 | ||
3d6e4702 DM |
632 | sd = &op->dev.archdata; |
633 | sd->prom_node = dp; | |
634 | sd->op = op; | |
635 | ||
cf44bbc2 DM |
636 | op->node = dp; |
637 | ||
638 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", | |
639 | (25*1000*1000)); | |
640 | op->portid = of_getintprop_default(dp, "upa-portid", -1); | |
641 | if (op->portid == -1) | |
642 | op->portid = of_getintprop_default(dp, "portid", -1); | |
643 | ||
644 | irq = of_get_property(dp, "interrupts", &len); | |
2b1e5978 | 645 | if (irq) { |
2b1e5978 | 646 | op->num_irqs = len / 4; |
92d9091f RR |
647 | |
648 | /* Prevent overrunning the op->irqs[] array. */ | |
649 | if (op->num_irqs > PROMINTR_MAX) { | |
650 | printk(KERN_WARNING "%s: Too many irqs (%d), " | |
651 | "limiting to %d.\n", | |
652 | dp->full_name, op->num_irqs, PROMINTR_MAX); | |
653 | op->num_irqs = PROMINTR_MAX; | |
654 | } | |
655 | memcpy(op->irqs, irq, op->num_irqs * 4); | |
2b1e5978 DM |
656 | } else { |
657 | op->num_irqs = 0; | |
658 | } | |
cf44bbc2 DM |
659 | |
660 | build_device_resources(op, parent); | |
2b1e5978 DM |
661 | for (i = 0; i < op->num_irqs; i++) |
662 | op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]); | |
cf44bbc2 DM |
663 | |
664 | op->dev.parent = parent; | |
37b7754a | 665 | op->dev.bus = &of_platform_bus_type; |
cf44bbc2 | 666 | if (!parent) |
2222c313 | 667 | dev_set_name(&op->dev, "root"); |
cf44bbc2 | 668 | else |
2222c313 | 669 | dev_set_name(&op->dev, "%08x", dp->node); |
cf44bbc2 DM |
670 | |
671 | if (of_device_register(op)) { | |
672 | printk("%s: Could not register of device.\n", | |
673 | dp->full_name); | |
674 | kfree(op); | |
675 | op = NULL; | |
676 | } | |
677 | ||
678 | return op; | |
679 | } | |
680 | ||
681 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
682 | { | |
683 | while (dp) { | |
684 | struct of_device *op = scan_one_device(dp, parent); | |
685 | ||
686 | if (op) | |
687 | scan_tree(dp->child, &op->dev); | |
688 | ||
689 | dp = dp->sibling; | |
690 | } | |
691 | } | |
692 | ||
693 | static void __init scan_of_devices(void) | |
694 | { | |
695 | struct device_node *root = of_find_node_by_path("/"); | |
696 | struct of_device *parent; | |
697 | ||
698 | parent = scan_one_device(root, NULL); | |
699 | if (!parent) | |
700 | return; | |
701 | ||
702 | scan_tree(root->child, &parent->dev); | |
703 | } | |
704 | ||
a2bd4fd1 DM |
705 | static int __init of_bus_driver_init(void) |
706 | { | |
cf44bbc2 | 707 | int err; |
a2bd4fd1 | 708 | |
3f23de10 | 709 | err = of_bus_type_init(&of_platform_bus_type, "of"); |
cf44bbc2 DM |
710 | if (!err) |
711 | scan_of_devices(); | |
712 | ||
713 | return err; | |
a2bd4fd1 DM |
714 | } |
715 | ||
716 | postcore_initcall(of_bus_driver_init); | |
717 | ||
a83f9823 DM |
718 | static int __init of_debug(char *str) |
719 | { | |
720 | int val = 0; | |
721 | ||
722 | get_option(&str, &val); | |
723 | if (val & 1) | |
724 | of_resource_verbose = 1; | |
725 | if (val & 2) | |
726 | of_irq_verbose = 1; | |
727 | return 1; | |
728 | } | |
729 | ||
730 | __setup("of_debug=", of_debug); |