[deliverable/linux.git] / arch / sparc / kernel / pci_sun4v_asm.S

/* pci_sun4v_asm: Hypervisor calls for PCI support.
 *
 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
 */

#include <linux/linkage.h>
#include <asm/hypervisor.h>

	/* %o0: devhandle
	 * %o1:	tsbid
	 * %o2:	num ttes
	 * %o3:	io_attributes
	 * %o4:	io_page_list phys address
	 *
	 * returns %o0:	-status if status was non-zero, else
	 *         %o0:	num pages mapped
	 */
ENTRY(pci_sun4v_iommu_map)
	mov	%o5, %g1
	mov	HV_FAST_PCI_IOMMU_MAP, %o5
	ta	HV_FAST_TRAP
	brnz,pn %o0, 1f
	 sub	%g0, %o0, %o0
	mov	%o1, %o0
1:	retl
	 nop
ENDPROC(pci_sun4v_iommu_map)

	/* %o0: devhandle
	 * %o1:	tsbid
	 * %o2:	num ttes
	 *
	 * returns %o0:	num ttes demapped
	 */
ENTRY(pci_sun4v_iommu_demap)
	mov	HV_FAST_PCI_IOMMU_DEMAP, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o1, %o0
ENDPROC(pci_sun4v_iommu_demap)

	/* %o0: devhandle
	 * %o1:	tsbid
	 * %o2:	&io_attributes
	 * %o3:	&real_address
	 *
	 * returns %o0:	status
	 */
ENTRY(pci_sun4v_iommu_getmap)
	mov	%o2, %o4
	mov	HV_FAST_PCI_IOMMU_GETMAP, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o4]
	stx	%o2, [%o3]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_iommu_getmap)

	/* %o0: devhandle
	 * %o1:	pci_device
	 * %o2:	pci_config_offset
	 * %o3:	size
	 *
	 * returns %o0:	data
	 *
	 * If there is an error, the data will be returned
	 * as all 1's.
	 */
ENTRY(pci_sun4v_config_get)
	mov	HV_FAST_PCI_CONFIG_GET, %o5
	ta	HV_FAST_TRAP
	brnz,a,pn %o1, 1f
	 mov	-1, %o2
1:	retl
	 mov	%o2, %o0
ENDPROC(pci_sun4v_config_get)

	/* %o0: devhandle
	 * %o1:	pci_device
	 * %o2:	pci_config_offset
	 * %o3:	size
	 * %o4:	data
	 *
	 * returns %o0:	status
	 *
	 * status will be zero if the operation completed
	 * successfully, else -1 if not
	 */
ENTRY(pci_sun4v_config_put)
	mov	HV_FAST_PCI_CONFIG_PUT, %o5
	ta	HV_FAST_TRAP
	brnz,a,pn %o1, 1f
	 mov	-1, %o1
1:	retl
	 mov	%o1, %o0
ENDPROC(pci_sun4v_config_put)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2: msiq phys address
	 * %o3: num entries
	 *
	 * returns %o0: status
	 *
	 * status will be zero if the operation completed
	 * successfully, else -1 if not
	 */
ENTRY(pci_sun4v_msiq_conf)
	mov	HV_FAST_PCI_MSIQ_CONF, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_conf)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	&msiq_phys_addr
	 * %o3:	&msiq_num_entries
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_info)
	mov	%o2, %o4
	mov	HV_FAST_PCI_MSIQ_INFO, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o4]
	stx	%o2, [%o3]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_info)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	&valid
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_getvalid)
	mov	HV_FAST_PCI_MSIQ_GETVALID, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_getvalid)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	valid
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_setvalid)
	mov	HV_FAST_PCI_MSIQ_SETVALID, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_setvalid)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	&state
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_getstate)
	mov	HV_FAST_PCI_MSIQ_GETSTATE, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_getstate)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	state
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_setstate)
	mov	HV_FAST_PCI_MSIQ_SETSTATE, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_setstate)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	&head
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_gethead)
	mov	HV_FAST_PCI_MSIQ_GETHEAD, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_gethead)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	head
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_sethead)
	mov	HV_FAST_PCI_MSIQ_SETHEAD, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_sethead)

	/* %o0: devhandle
	 * %o1: msiqid
	 * %o2:	&tail
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msiq_gettail)
	mov	HV_FAST_PCI_MSIQ_GETTAIL, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msiq_gettail)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	&valid
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msi_getvalid)
	mov	HV_FAST_PCI_MSI_GETVALID, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msi_getvalid)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	valid
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msi_setvalid)
	mov	HV_FAST_PCI_MSI_SETVALID, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msi_setvalid)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	&msiq
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msi_getmsiq)
	mov	HV_FAST_PCI_MSI_GETMSIQ, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msi_getmsiq)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	msitype
	 * %o3:	msiq
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msi_setmsiq)
	mov	HV_FAST_PCI_MSI_SETMSIQ, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msi_setmsiq)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	&state
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msi_getstate)
	mov	HV_FAST_PCI_MSI_GETSTATE, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msi_getstate)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	state
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msi_setstate)
	mov	HV_FAST_PCI_MSI_SETSTATE, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msi_setstate)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	&msiq
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msg_getmsiq)
	mov	HV_FAST_PCI_MSG_GETMSIQ, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msg_getmsiq)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	msiq
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msg_setmsiq)
	mov	HV_FAST_PCI_MSG_SETMSIQ, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msg_setmsiq)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	&valid
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msg_getvalid)
	mov	HV_FAST_PCI_MSG_GETVALID, %o5
	ta	HV_FAST_TRAP
	stx	%o1, [%o2]
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msg_getvalid)

	/* %o0: devhandle
	 * %o1: msinum
	 * %o2:	valid
	 *
	 * returns %o0: status
	 */
ENTRY(pci_sun4v_msg_setvalid)
	mov	HV_FAST_PCI_MSG_SETVALID, %o5
	ta	HV_FAST_TRAP
	retl
	 mov	%o0, %o0
ENDPROC(pci_sun4v_msg_setvalid)
Commit	Line	Data
bade5622 DM	1	/* pci_sun4v_asm: Hypervisor calls for PCI support.
bade5622 DM	2	*
fefbbc73	3	* Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
bade5622 DM	4	*/
bade5622 DM	5
fefbbc73	6	#include <linux/linkage.h>
bade5622 DM	7	#include <asm/hypervisor.h>
bade5622 DM	8
bade5622 DM	9	/* %o0: devhandle
	10	* %o1: tsbid
	11	* %o2: num ttes
	12	* %o3: io_attributes
	13	* %o4: io_page_list phys address
	14	*
6a32fd4d DM	15	* returns %o0: -status if status was non-zero, else
6a32fd4d DM	16	* %o0: num pages mapped
bade5622	17	*/
fefbbc73	18	ENTRY(pci_sun4v_iommu_map)
6a32fd4d	19	mov %o5, %g1
18397944	20	mov HV_FAST_PCI_IOMMU_MAP, %o5
bade5622	21	ta HV_FAST_TRAP
6a32fd4d DM	22	brnz,pn %o0, 1f
	23	sub %g0, %o0, %o0
	24	mov %o1, %o0
	25	1: retl
	26	nop
fefbbc73	27	ENDPROC(pci_sun4v_iommu_map)
bade5622 DM	28
	29	/* %o0: devhandle
	30	* %o1: tsbid
	31	* %o2: num ttes
	32	*
	33	* returns %o0: num ttes demapped
	34	*/
fefbbc73	35	ENTRY(pci_sun4v_iommu_demap)
18397944	36	mov HV_FAST_PCI_IOMMU_DEMAP, %o5
bade5622 DM	37	ta HV_FAST_TRAP
	38	retl
	39	mov %o1, %o0
fefbbc73	40	ENDPROC(pci_sun4v_iommu_demap)
7eae642f	41
18397944 DM	42	/* %o0: devhandle
	43	* %o1: tsbid
	44	* %o2: &io_attributes
	45	* %o3: &real_address
	46	*
	47	* returns %o0: status
	48	*/
fefbbc73	49	ENTRY(pci_sun4v_iommu_getmap)
18397944 DM	50	mov %o2, %o4
	51	mov HV_FAST_PCI_IOMMU_GETMAP, %o5
	52	ta HV_FAST_TRAP
	53	stx %o1, [%o4]
	54	stx %o2, [%o3]
	55	retl
	56	mov %o0, %o0
fefbbc73	57	ENDPROC(pci_sun4v_iommu_getmap)
18397944	58
7eae642f DM	59	/* %o0: devhandle
	60	* %o1: pci_device
	61	* %o2: pci_config_offset
	62	* %o3: size
	63	*
	64	* returns %o0: data
	65	*
	66	* If there is an error, the data will be returned
	67	* as all 1's.
	68	*/
fefbbc73	69	ENTRY(pci_sun4v_config_get)
18397944	70	mov HV_FAST_PCI_CONFIG_GET, %o5
7eae642f DM	71	ta HV_FAST_TRAP
	72	brnz,a,pn %o1, 1f
	73	mov -1, %o2
	74	1: retl
	75	mov %o2, %o0
fefbbc73	76	ENDPROC(pci_sun4v_config_get)
7eae642f DM	77
	78	/* %o0: devhandle
	79	* %o1: pci_device
	80	* %o2: pci_config_offset
	81	* %o3: size
	82	* %o4: data
	83	*
	84	* returns %o0: status
	85	*
	86	* status will be zero if the operation completed
	87	* successfully, else -1 if not
	88	*/
fefbbc73	89	ENTRY(pci_sun4v_config_put)
18397944	90	mov HV_FAST_PCI_CONFIG_PUT, %o5
7eae642f DM	91	ta HV_FAST_TRAP
	92	brnz,a,pn %o1, 1f
	93	mov -1, %o1
	94	1: retl
	95	mov %o1, %o0
fefbbc73	96	ENDPROC(pci_sun4v_config_put)
35a17eb6 DM	97
	98	/* %o0: devhandle
	99	* %o1: msiqid
	100	* %o2: msiq phys address
	101	* %o3: num entries
	102	*
	103	* returns %o0: status
	104	*
	105	* status will be zero if the operation completed
	106	* successfully, else -1 if not
	107	*/
fefbbc73	108	ENTRY(pci_sun4v_msiq_conf)
35a17eb6 DM	109	mov HV_FAST_PCI_MSIQ_CONF, %o5
	110	ta HV_FAST_TRAP
	111	retl
	112	mov %o0, %o0
fefbbc73	113	ENDPROC(pci_sun4v_msiq_conf)
35a17eb6 DM	114
	115	/* %o0: devhandle
	116	* %o1: msiqid
	117	* %o2: &msiq_phys_addr
	118	* %o3: &msiq_num_entries
	119	*
	120	* returns %o0: status
	121	*/
fefbbc73	122	ENTRY(pci_sun4v_msiq_info)
35a17eb6 DM	123	mov %o2, %o4
	124	mov HV_FAST_PCI_MSIQ_INFO, %o5
	125	ta HV_FAST_TRAP
	126	stx %o1, [%o4]
	127	stx %o2, [%o3]
	128	retl
	129	mov %o0, %o0
fefbbc73	130	ENDPROC(pci_sun4v_msiq_info)
35a17eb6 DM	131
	132	/* %o0: devhandle
	133	* %o1: msiqid
	134	* %o2: &valid
	135	*
	136	* returns %o0: status
	137	*/
fefbbc73	138	ENTRY(pci_sun4v_msiq_getvalid)
35a17eb6 DM	139	mov HV_FAST_PCI_MSIQ_GETVALID, %o5
	140	ta HV_FAST_TRAP
	141	stx %o1, [%o2]
	142	retl
	143	mov %o0, %o0
fefbbc73	144	ENDPROC(pci_sun4v_msiq_getvalid)
35a17eb6 DM	145
	146	/* %o0: devhandle
	147	* %o1: msiqid
	148	* %o2: valid
	149	*
	150	* returns %o0: status
	151	*/
fefbbc73	152	ENTRY(pci_sun4v_msiq_setvalid)
35a17eb6 DM	153	mov HV_FAST_PCI_MSIQ_SETVALID, %o5
	154	ta HV_FAST_TRAP
	155	retl
	156	mov %o0, %o0
fefbbc73	157	ENDPROC(pci_sun4v_msiq_setvalid)
35a17eb6 DM	158
	159	/* %o0: devhandle
	160	* %o1: msiqid
	161	* %o2: &state
	162	*
	163	* returns %o0: status
	164	*/
fefbbc73	165	ENTRY(pci_sun4v_msiq_getstate)
35a17eb6 DM	166	mov HV_FAST_PCI_MSIQ_GETSTATE, %o5
	167	ta HV_FAST_TRAP
	168	stx %o1, [%o2]
	169	retl
	170	mov %o0, %o0
fefbbc73	171	ENDPROC(pci_sun4v_msiq_getstate)
35a17eb6 DM	172
	173	/* %o0: devhandle
	174	* %o1: msiqid
	175	* %o2: state
	176	*
	177	* returns %o0: status
	178	*/
fefbbc73	179	ENTRY(pci_sun4v_msiq_setstate)
35a17eb6 DM	180	mov HV_FAST_PCI_MSIQ_SETSTATE, %o5
	181	ta HV_FAST_TRAP
	182	retl
	183	mov %o0, %o0
fefbbc73	184	ENDPROC(pci_sun4v_msiq_setstate)
35a17eb6 DM	185
	186	/* %o0: devhandle
	187	* %o1: msiqid
	188	* %o2: &head
	189	*
	190	* returns %o0: status
	191	*/
fefbbc73	192	ENTRY(pci_sun4v_msiq_gethead)
35a17eb6 DM	193	mov HV_FAST_PCI_MSIQ_GETHEAD, %o5
	194	ta HV_FAST_TRAP
	195	stx %o1, [%o2]
	196	retl
	197	mov %o0, %o0
fefbbc73	198	ENDPROC(pci_sun4v_msiq_gethead)
35a17eb6 DM	199
	200	/* %o0: devhandle
	201	* %o1: msiqid
	202	* %o2: head
	203	*
	204	* returns %o0: status
	205	*/
fefbbc73	206	ENTRY(pci_sun4v_msiq_sethead)
35a17eb6 DM	207	mov HV_FAST_PCI_MSIQ_SETHEAD, %o5
	208	ta HV_FAST_TRAP
	209	retl
	210	mov %o0, %o0
fefbbc73	211	ENDPROC(pci_sun4v_msiq_sethead)
35a17eb6 DM	212
	213	/* %o0: devhandle
	214	* %o1: msiqid
	215	* %o2: &tail
	216	*
	217	* returns %o0: status
	218	*/
fefbbc73	219	ENTRY(pci_sun4v_msiq_gettail)
35a17eb6 DM	220	mov HV_FAST_PCI_MSIQ_GETTAIL, %o5
	221	ta HV_FAST_TRAP
	222	stx %o1, [%o2]
	223	retl
	224	mov %o0, %o0
fefbbc73	225	ENDPROC(pci_sun4v_msiq_gettail)
35a17eb6 DM	226
	227	/* %o0: devhandle
	228	* %o1: msinum
	229	* %o2: &valid
	230	*
	231	* returns %o0: status
	232	*/
fefbbc73	233	ENTRY(pci_sun4v_msi_getvalid)
35a17eb6 DM	234	mov HV_FAST_PCI_MSI_GETVALID, %o5
	235	ta HV_FAST_TRAP
	236	stx %o1, [%o2]
	237	retl
	238	mov %o0, %o0
fefbbc73	239	ENDPROC(pci_sun4v_msi_getvalid)
35a17eb6 DM	240
	241	/* %o0: devhandle
	242	* %o1: msinum
	243	* %o2: valid
	244	*
	245	* returns %o0: status
	246	*/
fefbbc73	247	ENTRY(pci_sun4v_msi_setvalid)
35a17eb6 DM	248	mov HV_FAST_PCI_MSI_SETVALID, %o5
	249	ta HV_FAST_TRAP
	250	retl
	251	mov %o0, %o0
fefbbc73	252	ENDPROC(pci_sun4v_msi_setvalid)
35a17eb6 DM	253
	254	/* %o0: devhandle
	255	* %o1: msinum
	256	* %o2: &msiq
	257	*
	258	* returns %o0: status
	259	*/
fefbbc73	260	ENTRY(pci_sun4v_msi_getmsiq)
35a17eb6 DM	261	mov HV_FAST_PCI_MSI_GETMSIQ, %o5
	262	ta HV_FAST_TRAP
	263	stx %o1, [%o2]
	264	retl
	265	mov %o0, %o0
fefbbc73	266	ENDPROC(pci_sun4v_msi_getmsiq)
35a17eb6 DM	267
	268	/* %o0: devhandle
	269	* %o1: msinum
	270	* %o2: msitype
	271	* %o3: msiq
	272	*
	273	* returns %o0: status
	274	*/
fefbbc73	275	ENTRY(pci_sun4v_msi_setmsiq)
35a17eb6 DM	276	mov HV_FAST_PCI_MSI_SETMSIQ, %o5
	277	ta HV_FAST_TRAP
	278	retl
	279	mov %o0, %o0
fefbbc73	280	ENDPROC(pci_sun4v_msi_setmsiq)
35a17eb6 DM	281
	282	/* %o0: devhandle
	283	* %o1: msinum
	284	* %o2: &state
	285	*
	286	* returns %o0: status
	287	*/
fefbbc73	288	ENTRY(pci_sun4v_msi_getstate)
35a17eb6 DM	289	mov HV_FAST_PCI_MSI_GETSTATE, %o5
	290	ta HV_FAST_TRAP
	291	stx %o1, [%o2]
	292	retl
	293	mov %o0, %o0
fefbbc73	294	ENDPROC(pci_sun4v_msi_getstate)
35a17eb6 DM	295
	296	/* %o0: devhandle
	297	* %o1: msinum
	298	* %o2: state
	299	*
	300	* returns %o0: status
	301	*/
fefbbc73	302	ENTRY(pci_sun4v_msi_setstate)
35a17eb6 DM	303	mov HV_FAST_PCI_MSI_SETSTATE, %o5
	304	ta HV_FAST_TRAP
	305	retl
	306	mov %o0, %o0
fefbbc73	307	ENDPROC(pci_sun4v_msi_setstate)
35a17eb6 DM	308
	309	/* %o0: devhandle
	310	* %o1: msinum
	311	* %o2: &msiq
	312	*
	313	* returns %o0: status
	314	*/
fefbbc73	315	ENTRY(pci_sun4v_msg_getmsiq)
35a17eb6 DM	316	mov HV_FAST_PCI_MSG_GETMSIQ, %o5
	317	ta HV_FAST_TRAP
	318	stx %o1, [%o2]
	319	retl
	320	mov %o0, %o0
fefbbc73	321	ENDPROC(pci_sun4v_msg_getmsiq)
35a17eb6 DM	322
	323	/* %o0: devhandle
	324	* %o1: msinum
	325	* %o2: msiq
	326	*
	327	* returns %o0: status
	328	*/
fefbbc73	329	ENTRY(pci_sun4v_msg_setmsiq)
35a17eb6 DM	330	mov HV_FAST_PCI_MSG_SETMSIQ, %o5
	331	ta HV_FAST_TRAP
	332	retl
	333	mov %o0, %o0
fefbbc73	334	ENDPROC(pci_sun4v_msg_setmsiq)
35a17eb6 DM	335
	336	/* %o0: devhandle
	337	* %o1: msinum
	338	* %o2: &valid
	339	*
	340	* returns %o0: status
	341	*/
fefbbc73	342	ENTRY(pci_sun4v_msg_getvalid)
35a17eb6 DM	343	mov HV_FAST_PCI_MSG_GETVALID, %o5
	344	ta HV_FAST_TRAP
	345	stx %o1, [%o2]
	346	retl
	347	mov %o0, %o0
fefbbc73	348	ENDPROC(pci_sun4v_msg_getvalid)
35a17eb6 DM	349
	350	/* %o0: devhandle
	351	* %o1: msinum
	352	* %o2: valid
	353	*
	354	* returns %o0: status
	355	*/
fefbbc73	356	ENTRY(pci_sun4v_msg_setvalid)
35a17eb6 DM	357	mov HV_FAST_PCI_MSG_SETVALID, %o5
	358	ta HV_FAST_TRAP
	359	retl
	360	mov %o0, %o0
fefbbc73	361	ENDPROC(pci_sun4v_msg_setvalid)
35a17eb6	362